25.

The Role fo Central Processing Unit

1. Definition & Function

- The Central Processing Unit (CPU) is an electronic device that takes input, processes data,
and delivers output.

- It is considered the "brain" of a computing device.

2. Examples of CPU Operations

- A calculator app: Takes user input (e.g., pressing "5"), processes it (calculation), and displays
the result.

- A gaming console: Takes controller inputs, processes game data, and provides audio-visual
output.

3. Devices Using CPUs

- Found in desktop PCs, laptops, consoles, tablets, smartphones, and more.

4. Terminology

- The CPU is also called a microprocessor, processor, chip, or multi-processor.

- For simplicity, CPU and microprocessor are interchangeable terms in most cases.

5. Structure

- Typically installed as an integrated circuit on a single microchip.

1. Overview

- The CPU processes input, interacts with memory, and produces output in forms like visuals,
sound, or vibrations.

- This video introduces core CPU components, with later videos explaining how they work
together.

2. Main Components of the CPU

- Control Unit (CU):

- Directs data flow between the CPU and other components.

- Decodes and executes instructions.

- Sends memory read/write requests and control signals.

- Program Counter (PC):

- Holds the address of the next instruction to execute.

- Works closely with the Memory Address Register (MAR).

- Memory Address Register (MAR):

- Holds memory addresses from which data is fetched or written.

- Sends addresses via the Address Bus.

- Memory Data Register (MDR) (or Memory Buffer Register):

- Temporarily stores data being transferred between CPU and memory.

- Acts as the "gateway" to the processor.

- Current Instruction Register (CIR):

- Holds the current instruction being executed.

- Contains an opcode (operation) and operand (data).

- Arithmetic Logic Unit (ALU):

- Performs arithmetic (add, subtract, multiply, divide) and logic operations (AND, OR, NOT).
 - Works with general-purpose registers, including the Accumulator (ACC).

- Accumulator (ACC):

- Temporarily holds data/results of calculations for quick access.

- Improves CPU speed compared to accessing main memory.

3. Buses in the CPU

- Address Bus (Unidirectional): Sends memory addresses from CPU to memory.

- Data Bus (Bidirectional): Transfers actual binary data between CPU and memory.

- Control Bus (Bidirectional): Carries control signals (e.g., read/write requests).

4. Additional CPU Components

- Decode Unit: Converts binary instructions into executable operations.

- Status Register: Tracks processor states using on/off flags.

- Clock: Synchronizes operations with pulses (measured in hertz). Higher clock speed means a
faster CPU.

- Interrupt Register: Handles interrupt requests (e.g., keyboard inputs).

- Cache Memory:

- Small, fast memory near the CPU for frequently used data.

- Levels: L1 (fastest, smallest), L2, L3 (slower, larger).

- Faster than RAM but has limited storage.

1. Introduction

- The Von Neumann architecture is a stored-program computer design proposed by John von
Neumann in 1945.

- It allows computers to store programs in memory, unlike early fixed-program machines (e.g.,
calculators).

2. Key Characteristics of Von Neumann Architecture

- Central Processing Unit (CPU) with a single Control Unit (CU).

- Arithmetic Logic Unit (ALU) for calculations and logic operations.

- Cache memory for fast instruction/data access.

- Internal clock to synchronize operations.

- Shared memory for both instructions and data (binary form).

3. Fetch-Decode-Execute Cycle (FDE Cycle)

- The CPU follows a methodical sequence to process instructions:

1. Fetch Stage

- The Program Counter (PC) holds the memory address of the next instruction.

- The Memory Address Register (MAR) uses this address to fetch the instruction from memory.

- The instruction is stored in the Memory Data Register (MDR).

- The PC increments to point to the next instruction.

2. Decode Stage

- The Control Unit (CU) decodes the fetched instruction.

3. Execute Stage

- The CPU executes the instruction, which may involve:

- Fetching additional data from memory.

- Performing calculations using the Arithmetic Logic Unit (ALU).

- Storing results in the Accumulator (ACC).

4. Main CPU Registers in Von Neumann Architecture

- Program Counter (PC): Holds the address of the next instruction.

- Memory Address Register (MAR): Holds the address of memory location to read/write.

- Memory Data Register (MDR): Holds fetched data/instructions from memory.

- Accumulator (ACC): Stores results of ALU operations.

5. Summary

- Von Neumann architecture uses a single memory for both data and instructions.

- The CPU executes instructions using the Fetch-Decode-Execute cycle.

- Registers (PC, MAR, MDR, ACC) help manage memory operations and processing.
28. Fetch-Decode-Execute Cycle

The Fetch-Decode-Execute (FDE) cycle is the fundamental process that a CPU follows to
execute instructions from a computer program. This cycle repeats billions of times per second,
allowing the CPU to carry out tasks efficiently.

1. Fetch Stage (Retrieving the Instruction)

 The CPU fetches an instruction from main memory (RAM).

 The Program Counter (PC) holds the memory address of the next instruction.

 The address in the PC is copied into the Memory Address Register (MAR).

 The MAR sends this address through the Address Bus to main memory.

 The Control Unit (CU) sends a read signal through the Control Bus, instructing the main
memory to send the instruction stored at the specified address.

 The instruction is fetched from memory and sent through the Data Bus to the Memory
Data Register (MDR).

 The instruction in MDR is copied into the Current Instruction Register (CIR).

 The Program Counter (PC) is incremented to point to the next instruction.

2. Decode Stage (Understanding the Instruction)

 The Control Unit (CU) decodes the instruction stored in the Current Instruction Register
(CIR).

 Instructions consist of two parts:

 Opcode: Specifies what operation to perform.

 Operand: Specifies the data or memory location to use.

 The CU determines if the operand contains actual data or a memory address where data
is stored.

3. Execute Stage (Performing the Instruction)

 If the instruction involves data retrieval, the address is sent to the Memory Address
Register (MAR).

 The Memory Data Register (MDR) receives the required data from main memory.

 The Arithmetic Logic Unit (ALU) processes calculations or logical comparisons.