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COA GATE Material

The document outlines key concepts in Computer Organization and Architecture (COA) relevant for GATE preparation, including computer components, instruction set formats, memory architecture, and I/O devices. It details the Von Neumann architecture, types of registers, instruction types, and addressing modes, emphasizing the importance of efficient data processing and communication within computer systems. The document serves as a comprehensive guide for understanding the foundational elements of computer architecture necessary for examination success.

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Amit Modh
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0% found this document useful (0 votes)
43 views7 pages

COA GATE Material

The document outlines key concepts in Computer Organization and Architecture (COA) relevant for GATE preparation, including computer components, instruction set formats, memory architecture, and I/O devices. It details the Von Neumann architecture, types of registers, instruction types, and addressing modes, emphasizing the importance of efficient data processing and communication within computer systems. The document serves as a comprehensive guide for understanding the foundational elements of computer architecture necessary for examination success.

Uploaded by

Amit Modh
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as DOCX, PDF, TXT or read online on Scribd
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COA GATE Material – 8 to 11 Marks

Here we would discuss for both the software and hardware concepts
Architecture – Entire design of the computer components
Organization – How to properly organize the devices and communicate among
them.
GATE syllabus
 Basics of computer components and its design
 Instruction set formats and addressing modes ** (2 – 3 Marks)
o Types of addressing modes ** (1 – 2 marks)
o Subroutine calls and Interrupt *
o RISC and CISC
 Memory *** (3 – 4 Marks)
o Memory architecture understanding
o Cache memory and Main memory mapping ** (2 – 3 marks)
o Secondary Memory ** (1 – 2 Marks)
 Instruction Pipelining ** (2 – 3 marks)
o Difference of sequential and parallel approach
o Pipeline execution stages
o Pipeline Hazards and stalls
 I/O Devices
o I/O modules and devices connection
o Types of I/O ** (1 marks around)
 Programmed I/O
 Interrupt Driver I/O
 Direct Memory Access I/O
 Control Unit Design (0 – 1 Marks)
o Micro operations understanding
o Hardwired and Micro programmed control unit
 Computer Arithmetic and ALU
o Integer arithmetic and representation (Mostly Not in syllabus)
o Floating point arithmetic (Mostly Not in syllabus)

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Chapter 1: Basics of COA

 The basic concept about the understanding of the different components present in the
computer system is described by the Von Nuemann Architecture (1945) as described below:

Von Neumann Architecture

CPU  register  cache  main memory  Secondary memory (nue lite memory)

Register in CPU  fast access and temp storage in CPU

Left to right  size increases & speed decreases

Bus size 

Memory (Secondary)  8 GB  2^33 Bytes  Address bus  33 bits

Word size 64 bits  64 bits (Data bus)  ALU operations  64 bits

Word size  around the same control bus size (Never ever determined)

 It majorly show how the entire data is processed internally.


 Main Memory – it stores the data and set of instructions which are used to execute the
program. Majorly they are kept in the main memory and if required for faster retrieval, it
can be kept in cache also.
 CPU is the main unit where all the processing can happen.
 CPU contains ALU, CU and registers
 ALU contains circuits which can be used for performing arithmetic and logical operations like
addition, subtraction, AND, OR etc.
 Registers is the fastest memory which stores the temp data, having the smallest size.
 Registers are the sequence of bits (flip flops), whose size is around 16 to 32 bits.
 There are many types of registers which helps in faster processing of the data, which are as
follows:

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o Address Register – It carries the address used to fetch the word or data from the
memory.
o Data Register – It is used to store the word, which is fetched by the address register.
o Accumulator – It is used for the intermediary data storage, when executing the ALU
operation. It is ideally of same size as the data register.
o Program counter – It is used to the address of the next instruction. Its size is same as
the address register.
0
current 50
PC  51
100
o Stack Pointer – It mainly stores the top element of the stack in the instruction where
the stacks are required for processing the output. It’s size is same as address bus
size.
o Instruction Register – It stores the instruction to be executed. It contains addressing
modes, op code and operands. Its size is same as data bus.
C = a + b  Addressing modes ADD c, a, b
Op code operands
o Temp Registers – It is used for storing the temporary data if required in case of any
processing. Size  max(data bus, address bus).
o Input registers – It takes the data from I/O and gives that data to ALU for processing.
o Output Registers – It takes the data from ALU and gives to back to the output
devices. Size of input and output registers is around the data bus size.
 Control Unit – Timing and control signal
o Timing signals – which instruction would execute first and which would execute
after. It handles the sequence of the steps in order to get proper output.
o Control signals – Controls all the different types of registers for reading and writing
the data, such that we can efficiently use the register data as per proper
requirements.
 I/O System – which are the peripherals devices and can able to communicate through
outside by user interactive process.
 Now we have all the different types of the system, in order to connect them and process the
data, we have different types of buses, which are majorly use for the transfer of the data.
o Address Bus – It is used to carry the addresses where the actual data are stored. It is
always unidirectional to either the memory or I/O devices, where we need to send
the address and compute the required data values. Addresses are generally
generated by the processor only, which means the CPU unit.
o Data Bus – It contains the data, which is a bidirectional bus, which can communicate
to and fro in case of I/O devices, memory or registers. The length of the data bus is
equal to the length of the data.
o Control Bus – It is used to transfer the control signals and timing signals and it is
handled solely by the Control unit only. It is also a unidirectional bus.
 Ideally, in COA, all the communication happens through word length. A word is basically a
smallest indivisible unit of the memory.
 Word – based on the architecture of the system.
 All of these bus are connecting through multiplexers with different registers as well as
memory unit also.

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 Instruction Set Architecture
 An Instruction is basically a set of commands which we give to the processor, based on
which it performs operations and provide us some output.
 For example, we give a = b + c, so basically we told the processor to add b and c, and store
the result in a.
 We have 3 types of instructions for performing any type of operations in the real scenarios:
o Data transfer instructions – basically used in a concept to transfer the data between
different registers or register to memory or memory to register via any common bus
or between any I/O devices.
Common instructions here are  MOV, PUSH, POP, LD, ST, XCHG
o Data manipulation instructions – Want to make any changes to the given data.
It has basically 3 types
1. Arithmetic – ADD, SUB, MUL, DIV, MOD
2. Logical – AND, OR, XOR, NOT, NAND, NOR
3. Shift / Conversion – SHR, SHL, SHAL, SHAR, ROR, ROL, RORC, ROLC
o Program Control instructions – execution decision for processing the program like if,
for, while etc.
Common operation here are – BR, JMP, SKP, CALL, RET
 Data Transfer instructions
o MOV R1, R2  R1 = R2
o LD M[X]  load data into ACC from Memory (By default in Acc)
o STA X  Store into memory from ACC
o XCHG R1, R2  swap R1 and R2.
o PUSH and POP, when we store memory in form of stack. – SP is used here
 Data Manipulation Instructions
o Shift operations
1. SHL (Logical shift left)  consider R1 = 00001010  10
If we apply SHL R1  00010100  20 (10 * 2)
We shift all the bits to the left, MSB is ignored and add 0 at the end.
2. SHR R1  00000101  5 (10 / 2)
We shift all the bits to the right, LSB is ignored

3. SHAR (We use the signed number here) – which means if the first bit is 1, means the
given number is negative.
Consider R1 = 10100011  SHAR R1  11010001
(Here the signed does not change)
4. SHAL – same as Logical shift left (Here, the changes could be happen in case of
negative sign or first 2 is not having the same value)

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5. Rotate right and rotate left

6. RORC and ROLC happens same as ROL and ROR, but it happens through carry.
 Program control instructions – these instructions majorly handles the entire flow of
execution of the program.
 Normally, when a program executes, it gets run in sequential mode (implicit mode), means
line by line, but we can change this flow by making certain conditions checking into our
program.
 Following are most common program control instructions:
o Branch – unconditional (always move to another location) and conditional branch
(move to another location based on certain condition)
o Conditional BR –
1. BE R1 R2 2000(Branch if equal to 2000)
2. BN R1 R2 2000(Branch if not equal to 2000)
3. BHI R1 R2 2000(Branch if R1 is higher than R2 to 2000)
4. BLO R1 R2 2000(Branch if R1 is lower than R2 to 2000)

o JMP – always unconditional. Here we don’t have to check condition, so we would


not waste space for condition, which results in larger jump.
o SKP – it would skip the next instruction
o CALL – call 3000, we are calling some other function at 3000 location
o RET – RET 2000, after returning back to the previous program
 sad
 Instructions contents
 Instructions contains 3 parts  Addressing modes, op code and operands.
 Addressing modes tells where exactly the operand is stored in the memory.
 Op code describes which operation to be perform in the given instruction.

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 Operand is basically a constant, a register address or a memory location address, on which
actually the operation is to be performed.
 Example  ADD R1, R2 [ADD – op code, and R1 and R2 are operands]
 This instruction is stored in the Instruction Register.
 Normally we have 4 types of addressing instructions format.
o 3 address instructions (3 operands)
o 2 address instructions (2 operands)
o 1 address instructions (1 operands)
o 0 address instructions (0 operands)
 Any program written by us internally gets converted into set of micro instructions which is
easily understandable by the computer.
 Consider the following basic instructions, and need to convert the same into instructions
format:
o A = b * c + d [Consider a, b, c, d as registers only]
1. 3 address instructions
MUL b, b, c [b * c  b]
ADD a, b, d [b + d  a]
2. 2 address instructions
MUL b, c [b * c  b]
ADD b, d [b + d  b]
MOV a, b [b  a]
3. 1 address instructions (Use default accumulator here)
LD b [b  acc]
MUL c [acc * c  acc]
ADD d [acc + d  acc]
ST a [acc  a]
4. 0 address instructions (Use stack here)
PUSH b [push b into stack]
PUSH c [push c into stack]
MUL [pop b and c  multiply and push result in stack]
PUSH d [push d into stack]
ADD [pop b and d  add and push result in stack]
POP a [pop the result in output a]
 We can check here, that we go from higher to lower address instructions, the size of the
instruction decreases (result in small word size and store more data), but the number of
instructions increases (results in more time for execution of the entire command).
 There is always trade off whether we need to optimize the memory or optimize the time.
 As today majorly everyone needs to execute the program with less time, so always 2 or 3
address instructions are used in real scenarios.
 There are different types of addressing modes as follows:
o
 ss

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