Computer Organization and Architecture

Q1. Differentiate between Computer Organization and Computer Architecture.

Computer Architecture is a functional description of requirements and design implementation for the various
parts of a computer. It deals with the functional behavior of computer systems. It comes before the computer
organization while designing a computer.

Computer Organization comes after the decision of Computer Architecture first. Computer Organization is
how operational attributes are linked and contribute to realizing the architectural specification. Computer
Organization deals with a structural relationship.

.
No. Computer Architecture Computer Organization

1. Architecture describes what the computer does. The Organization describes how it does it.

Computer Architecture deals with the functional behavior Computer Organization deals with a structural
2. of computer systems. relationship.

In the above figure, it’s clear that it deals with high-level In the above figure, it’s also clear that it deals
3. design issues. with low-level design issues.

4. Architecture indicates its hardware. Whereas Organization indicates its performance.

As a programmer, you can view architecture as a series of The implementation of the architecture is called
5. instructions, addressing modes, and registers. organization.

For designing a computer, an organization is

For designing a computer, its architecture is fixed first.
6. decided after its architecture.

Computer Architecture is also called Instruction Set Computer Organization is frequently called
7. Architecture (ISA). microarchitecture.
 .
No. Computer Architecture Computer Organization

Computer Architecture comprises logical functions such

Computer Organization consists of physical units
as instruction sets, registers, data types, and addressing
like circuit designs, peripherals, and adders.
8. modes.

The different architectural categories found in our CPU organization is classified into three
computer systems are as follows: categories based on the number of address
fields:
1. Von-Neumann Architecture
2. Harvard Architecture 1. Organization of a single
3. Instruction Set Architecture Accumulator.
4. Micro-architecture 2. Organization of general registers
9. 5. System Design 3. Stack organization

It offers details on how well the computer

It makes the computer’s hardware visible.
10. performs.

Architecture coordinates the hardware and software of Computer Organization handles the segments of
11. the system. the network in a system.

Q2. What is the number system?

A Number system is a method of showing numbers by writing, which is a mathematical way of representing
the numbers of a given set, by mathematically using the numbers or symbols. The writing system for
denoting numbers using digits or symbols in a logical manner is defined as a Number system. The numeral
system Represents a useful set of numbers, reflects the arithmetic and algebraic structure of a number, and
Provides standard representation. The digits from 0 to 9 can be used to form all the numbers. With these
digits, anyone can create infinite numbers. For example, 156,3907, 3456, 1298, 784859 etc.
Types of Number Systems
Based on the base value and the number of allowed digits, number systems are of many types. The four
common types of Number System are:
• Decimal Number System
• Binary Number System
• Octal Number System
• Hexadecimal Number System
Decimal Number System
Number system with a base value of 10 is termed a Decimal number system. It uses 10 digits i.e. 0-9 for the
creation of numbers. Here, each digit in the number is at a specific place with place value a product of
different powers of 10. Here, the place value is termed from right to left as first place value called units,
second to the left as Tens, so on Hundreds, Thousands, etc. Here, units have the place value as 100, tens
have the place value as 101, hundreds as 102, thousands as 103, and so on.
For example, 10264 has place values as,
(1 × 104) + (0 × 103) + (2 × 102) + (6 × 101) + (4 × 100)
= 1 × 10000 + 0 × 1000 + 2 × 100 + 6 × 10 + 4 × 1
= 10000 + 0 + 200 + 60 + 4
= 10264
Binary Number System
Number System with base value 2 is termed as Binary number system. It uses 2 digits i.e. 0 and 1
for the creation of numbers. The numbers formed using these two digits are termed Binary Numbers.
The binary number system is very useful in electronic devices and computer systems because it can
be easily performed using just two states ON and OFF i.e. 0 and 1.
Decimal Numbers 0-9 are represented in binary as: 0, 1, 10, 11, 100, 101, 110, 111, 1000, and 1001
 For example, 14 can be written as 1110, 19 can be written as 10011, 50 can be written as 110010.
Example of 19 in the binary system

Octal Number System

Octal Number System is one in which the base value is 8. It uses 8 digits i.e. 0-7 for the creation of Octal
Numbers. Octal Numbers can be converted to Decimal values by multiplying each digit with the place value
and then adding the result. Here the place values are 80, 81, and 82. Octal Numbers are useful for the
representation of UTF8 Numbers. Example,
(135)10 can be written as (207)8
(215)10 can be written as (327)8

Hexadecimal Number System

Number System with base value 16 is termed as Hexadecimal Number System. It uses 16 digits for the
creation of its numbers. Digits from 0-9 are taken like the digits in the decimal number system but the digits
from 10-15 are represented as A-F i.e. 10 is represented as A, 11 as B, 12 as C, 13 as D, 14 as E, and 15 as
F. Hexadecimal Numbers are useful for handling memory address locations.The hexadecimal number system
provides a condensed way of representing large binary numbers stored and processed. Examples,
(255)10 can be written as (FF)16
(1096)10 can be written as (448)16
(4090)10 can be written as (FFA)16

HEXADECIMAL 0 1 2 3 4 5 6 7 8 9 A B C D E F

DECIMAL 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15

Q3.What is the arithmetic logic shift unit?

Arithmetic Logic Shift Unit (ALSU) is a member of the Arithmetic Logic Unit (ALU) in a computer system. It
is a digital circuit that performs logical, arithmetic, and shift operations. Rather than having individual
registers calculating the micro-operations directly, the computer deploys several storage registers which are
connected to a common operational unit known as an arithmetic logic unit or ALU.

Now, to implement the micro operation, the contents of specified registers are allocated in the inputs of the
common Arithmetic Logic Unit. The Arithmetic Logic Unit performs an operation that leads as a result and
gets transferred to a destination register. Arithmetic Logic Unit may be a combinatory circuit in order that the
complete register transfer operation from the supply registers through the ALU and into the destination
register is performed throughout one clock pulse amount. Sometimes, the shift micro operations are
performed in a separate unit, but sometimes it is made as a part of full ALU.
 One stage of ALSU

We can combine and make one ALU with common selection variables by adding arithmetic, logic, and shift
circuits. We can see the, One stage of an arithmetic logic shift unit in the diagram below. Some particular
micro operations are selected through the inputs S1 and S0.

4 x 1 multiplexer at the output chooses between associate arithmetic output between Ei and a logic output in
Hi. The data in the multiplexer are selected through inputs S3 and S2 and the other two data inputs to the
multiplexer obtain the inputs Ai – 1 for the shr operation and Ai + 1 for the shl operation.
Note: The output carry Ci + 1 of a specified arithmetic stage must be attached to the input carry Ci of the next
stage in the sequence.
The circuit whose one stage is given in the below diagram provides 8 arithmetic operations, 4 logic
operations, and 2 shift operations, and Each operation is selected by the 5 variables S3, S2, S1, S0, and Cin.

Q4.What is the bus ? also explain the bus architecture with details.

In computer organization and architecture, a bus refers to a communication system that transfers data between
components within a computer or between computers. It serves as a pathway for transmitting signals and data
between various components such as the CPU (Central Processing Unit), memory, input/output devices, and other
peripherals.

• The bus is a communication channel.

• The characteristic of the bus is shared transmission media.
• The limitation of a bus is only one transmission at a time.
• A bus used to communicate between the major components of a computer is called a System
bus.
Computer:
Bus architecture in computer organization and architecture typically consists of three main types of buses:

1. Address Bus: The address bus is responsible for carrying memory addresses generated by the CPU. It
determines which memory location is being read from or written to. The width of the address bus
determines the maximum memory capacity that can be addressed by the CPU. For example, a 16-bit
address bus can address up to 2^16 (64K) memory locations.
2. Data Bus: The data bus is used for transferring data between the CPU, memory, and other devices. It
carries the actual data being processed or transferred. The width of the data bus determines the amount
of data that can be transferred in parallel. For example, a 32-bit data bus can transfer 32 bits of data
simultaneously.
3. Control Bus: The control bus carries control signals that coordinate and synchronize the activities of
various components within the computer system. It includes signals such as read/write signals, interrupt
signals, clock signals, and bus control signals.

Q5. Numbers system Conversion.

a) Convert (166.125)10 into a binary number system.
b) Convert (1AC7)16 into the decimal number system.
c) Convert (1110010.101)2 into a octal number system.
d) Convert (DAB27)16 into the binary number system.
e) Convert (5652)8 into the binary number system.

a) Convert (166.125)10 into binary:

To convert the integer part (166) into binary: 166 ÷ 2 = 83 remainder 0 83 ÷ 2 = 41 remainder 1 41 ÷ 2 = 20
remainder 1 20 ÷ 2 = 10 remainder 0 10 ÷ 2 = 5 remainder 0 5 ÷ 2 = 2 remainder 1 2 ÷ 2 = 1 remainder 0 1 ÷ 2
= 0 remainder 1

Reading the remainders from bottom to top gives us 10100110 in binary.

To convert the fractional part (0.125) into binary: 0.125 * 2 = 0.25 (0) 0.25 * 2 = 0.5 (0) 0.5 * 2 = 1.0 (1)

Reading the digits gives us 0.001 in binary.

Combining both parts, we get (166.125)10 = (10100110.001)2 in binary.

b) Convert (1AC7)16 into decimal:

(1AC7)16 = 1 * 16^3 + 10 * 16^2 + 12 * 16^1 + 7 * 16^0 = 4096 + 2560 + 192 + 7 = 6855

So, (1AC7)16 = (6855)10 in decimal.

c) Convert (1110010.101)2 into octal:

First, separate the integer and fractional parts:

Integer part: (1110010)2 Fractional part: (0.101)2

To convert the integer part (1110010)2 into octal: Group the binary digits into groups of three from the right:
(1)(110)(010)

Converting each group to octal: (1)(6)(2)

So, the octal representation of the integer part is (162).

To convert the fractional part (0.101)2 into octal: Multiply the fractional part by 8 and separate the integer part of
the result: 0.101 * 8 = 0.65625 The integer part is 0.

So, the octal representation of the fractional part is 0.

Combining both parts, we get (1110010.101)2 = (162.0)8 in octal.

d) Convert (DAB27)16 into binary:

D = 1101 A = 1010 B = 1011 2 = 0010 7 = 0111

So, (DAB27)16 = (110110101011001001110111)2 in binary.

e) Convert (5652)8 into binary:

5 = 101 6 = 110 5 = 101 2 = 010

So, (5652)8 = (101110101010)2 in binary.

Q6. Explain the Differences between Combinational and Sequential circuits with
suitable examples.
Combinational circuits are defined as the time independent circuits which do not depends upon previous
inputs to generate any output are termed as combinational circuits. Sequential circuits are those which are
dependent on clock cycles and depends on present as well as past inputs to generate any
output. Combinational Circuit –
1. In this output depends only upon present input.
2. Speed is fast.
3. It is designed easy.
4. There is no feedback between input and output.
5. This is time independent.
6. Elementary building blocks: Logic gates
7. Used for arithmetic as well as boolean operations.
8. Combinational circuits don’t have capability to store any state.
9. As combinational circuits don’t have clock, they don’t require triggering.
10. These circuits do not have any memory element.
11. It is easy to use and handle.
Examples – Encoder, Decoder, Multiplexer, Demultiplexer Block Diagram –

Sequential Circuit –
1. In this output depends upon present as well as past input.
2. Speed is slow.
3. It is designed tough as compared to combinational circuits.
4. There exists a feedback path between input and output.
5. This is time dependent.
 6. Elementary building blocks: Flip-flops
7. Mainly used for storing data.
8. Sequential circuits have capability to store any state or to retain earlier state.
9. As sequential circuits are clock dependent they need triggering.
10. These circuits have memory element.
11. It is not easy to use and handle.

Q7. Differentiate between Von-Neumann Architecture and Harvard Architecture

Von Neumann Architecture:
Von Neumann Architecture is a digital computer architecture whose design is based on the concept of stored
program computers where program data and instruction data are stored in the same memory. This
architecture was designed by the famous mathematician and physicist John Von Neumann in 1945.
Harvard Architecture:
Harvard Architecture is the digital computer architecture whose design is based on the concept where there
are separate storage and separate buses (signal path) for instruction and data. It was basically developed to
overcome the bottleneck of Von Neumann Architecture.

VON NEUMANN ARCHITECTURE HARVARD ARCHITECTURE

It is ancient computer architecture based on stored It is modern computer architecture based on Harvard Mark
program computer concept. I relay based model.

Same physical memory address is used for instructions Separate physical memory address is used for instructions
and data. and data.

Separate buses are used for transferring data and

There is common bus for data and instruction transfer.
instruction.

Two clock cycles are required to execute single

An instruction is executed in a single cycle.
instruction.

It is cheaper in cost. It is costly than Von Neumann Architecture.

CPU can not access instructions and read/write at the CPU can access instructions and read/write at the same
same time. time.

It is used in personal computers and small computers. It is used in micro controllers and signal processing.
Q8. What is the register transfer language explain with details?

Register Transfer Language (RTL) is a type of high-level description language used to specify the operations and
data transfers that occur within a digital system at the register transfer level. It serves as an abstraction that
describes the flow of data between registers and the operations performed on that data within a digital system.
RTL is commonly used in digital design and hardware description languages (HDLs) such as Verilog and VHDL to
design and describe digital circuits and systems.

Here's an explanation of RTL with details:

1. Registers: In RTL, the primary components are registers, which are temporary storage elements capable
of holding binary data. Registers can hold data such as binary numbers, control signals, or addresses.
Each register has a unique name and width (number of bits).
2. Data Transfer: RTL describes how data is transferred between registers in a digital system. It specifies
operations such as loading data into registers, transferring data between registers, and storing data from
registers into memory or output devices. Data transfers in RTL are typically represented using
assignment statements or transfer operations.
3. Operations: RTL describes the operations performed on data as it moves between registers. These
operations include arithmetic operations (addition, subtraction, multiplication, division), logical
operations (AND, OR, NOT, XOR), shifting operations (left shift, right shift), and comparison operations
(equality, inequality). RTL also includes control operations such as conditional branching and looping
constructs.
4. Timing: RTL may include timing information to specify the sequence and timing of data transfers and
operations within a digital system. Timing constraints ensure that data is transferred and processed
correctly according to the system's clock cycle and timing requirements.
5. Hierarchy: RTL can describe the hierarchical structure of a digital system by organizing registers and
operations into modules or blocks. Modules represent functional units within the system, and RTL
describes how data flows between these modules at the register transfer level. Hierarchical RTL design
allows for modularity, reusability, and easier verification of complex digital systems.
6. Verification and Simulation: RTL descriptions can be simulated and verified using specialized software
tools called simulators. Simulation allows designers to validate the functionality and performance of a
digital system described in RTL before implementing it in hardware. Design errors and performance
issues can be identified and corrected early in the design process through RTL simulation.

Q9. Convert the (83.5)10 number into floating point representation with IEEE-754 single
precision format.

1. Convert 83.583.5 into binary:

• Integer part: 8383 in binary is 10100111010011 .
• Fractional part: 0.50.5 in binary is 0.10.1.
2. Normalize the binary representation:
• 1010011.11010011.1
3. Determine the exponent and bias:
• Move the decimal point to the left until there's only one digit to the left
of the decimal point.
• Count the number of places moved. In this case, 83.583.5 is
1.0428125×261.0428125×26.
• Exponent: 66 (Note: Bias for single precision in IEEE-754 is 127127 , so
6+127=1336+127=133 in binary is 1000010110000101).
4. Combine the sign bit, exponent, and mantissa:
• The sign bit is 00 since the number is positive.
 • Exponent: 1000010110000101
• Mantissa:
0100111000000000000000001001110000000000000000 (the
digits after the normalized point)
• Combine:
0 10000101 010011100000000000000000100001010100111000
0000000000000

So, the IEEE-754 single-precision representation of 83.583.5 is:

0 10000101 0100111000000000000000001000010101001110000000000000
000
Q10. What is the bus and memory transfer? Explain with details.
In computer architecture, a bus is a communication system that allows different components within a computer
system to transfer data between each other. It serves as a pathway for transmitting signals and information
between the CPU (Central Processing Unit), memory, input/output devices, and other peripherals.

The concept of a bus can be likened to a highway where data travels between different destinations within the
computer system. It consists of several parallel electrical lines, each capable of carrying a single bit of data,
control signals, and addresses. Buses can vary in width, determining the number of bits that can be transferred
simultaneously.

There are several types of buses commonly found in computer systems:

1. Data Bus: The data bus carries data between the CPU, memory, and input/output devices. It is bi-
directional, allowing data to flow in both directions.
2. Address Bus: The address bus carries memory addresses generated by the CPU. It specifies the location
in memory where data is read from or written to.
3. Control Bus: The control bus carries control signals that coordinate and synchronize the activities of
various components within the computer system. It includes signals such as read/write signals, interrupt
signals, clock signals, and bus control signals.

Memory transfer, on the other hand, refers to the process of transferring data between the CPU and memory. This
process typically involves the following steps:

1. Addressing: The CPU generates a memory address specifying the location in memory from which data
should be read or to which data should be written. This address is sent over the address bus.
2. Read/Write Operation: Depending on the instruction being executed, the CPU sends a control signal
indicating whether it wants to read data from memory or write data to memory. This control signal is
sent over the control bus.
3. Data Transfer: If it's a read operation, the data stored at the specified memory address is retrieved from
memory and sent back to the CPU over the data bus. If it's a write operation, the CPU sends the data to
be written to memory over the data bus.
4. Acknowledgment: Once the data transfer is complete, the CPU may receive an acknowledgment signal
from the memory indicating the success or failure of the operation.