Modelling of VSC-HVDC with power

synchronization method including frequency

support
Giulio Macchia Michele Trovato
Dept. of Electrical and Information Engineering Dept. of Electrical and Information Engineering
Politecnico di Bari Politecnico di Bari
Bari, Italy Bari, Italy
[email protected] [email protected]

Maria Dicorato Giuseppe Forte

Dept. of Electrical and Information Engineering Bari, Italy
Politecnico di Bari [email protected]
Bari, Italy
[email protected]

Abstract— In order to enhance the control ability of HVDC traditionally realized through synchronous generators in
systems, more and more attention is devoted to Voltage Source power plants, can be realized by VSC-HVDC. In fact, VSC-
Converters (VSCs), enabling instantaneous control of large HVDC terminals can be utilized to provide primary
amounts of power with improved stability features and frequency support to AC grids [11], mainly by means of a
providing ancillary services to the AC system. A crucial issue droop characteristic analogous to synchronous generators.
in VSC control is represented by their synchronization with the The control method is supposed to be local and autonomous,
AC grid usually obtained by phase locked loop techniques. In in order to react quickly in the case of network contingency
this paper, the Virtual Synchronous Machine concept is and to operate properly even if a communication failure
exploited through Power-Synchronization Method (PSM),
occurs [12].
aiming to mimic the behavior of synchronous generators with
VSCs. Therefore, a full and detailed dynamic model of a PSM- In order to realize frequency and voltage support, two
controlled VSC is developed, tuned and tested by means of main control procedures have been proposed in literature,
time domain simulations. either based on the master-slave method, allowing DC
voltage control for only one converter, and the voltage-droop
Keywords— Voltage source converter, Power method, enabling both converters to control active power and
Synchronization Method, Dynamic stability DC voltage at the same time [11]. However, the voltage
I. INTRODUCTION droop affects frequency control, modifying the desired
dynamic response [13].
The increasing interest in Voltage Source Converter
(VSC) for HVDC technology lies in its ability to produce AC In this paper, a detailed dynamic model of a PSM-
voltage wave independently on system connection, eluding controlled VSC is developed. The model involves different
limitations from weak AC networks [1][2] and in the full, control loops, aiming to obtain fast and stable response in the
fast and precise control of both active and reactive power. presence of different disturbances [14]. Moreover, a
This involves the possibility to provide support to the modified VSC model is developed to provide primary
connected AC system without any extra-cost [3][4]. In order voltage and frequency regulation. Control parameters are
to provide stable connection and to prevent over-currents, the tuned in order to get the desired response features with
vector current control has been widely adopted to determine changes in direct/alternating voltage or active/reactive
voltage references from current levels [5]. power. The effectiveness of the proposed models and
regulation is initially tested on a simple HVDC link between
A critical element in the design of a HVDC converter is two synchronous generators considering master-slave and
its synchronization with the AC system, in order to avoid voltage-droop configuration of converters. A further
short-circuit current caused by phase difference. The VSC demonstration is provided by inserting the HVDC link in a
phase-angle synchronization is traditionally carried out by realistic power system consisting of two asynchronous parts.
the phase-locked loop, but it suffers from several issues due
to nonlinearity and mutual interactions, particularly on weak II. PSM MASTER SLAVE MODEL
networks [6]-[8]. Therefore, efforts to investigate on
effective alternatives have been put in force. A. Model description
In the complete VSC control scheme, shown in Fig. 1,
An important step is provided by the concept of virtual the following control loops are included:
synchronous machine, implementing synchronous generator
features into the VSC control system [6][9][10]. In this • Power Synchronization Loop (PSL);
sense, the development of Power Synchronization Model • Alternating-Voltage Control (AVC);
(PSM), based on integral equation linking electric power to • Reactive Power Control (RPC);
angular frequency, reveals to be immediate and effective.
• Current Reference Control (CRC);
In this way, the provision of important ancillary services • Vector Current Control (VCC);
for the AC systems such as frequency and voltage support,

978-1-7281-2071-3/19/$31.00 ©2019 IEEE

 • Direct Voltage Control (DVC). component vCd of the VSC desired voltage, as shown in the
The PSL is in charge to provide to the VSC the voltage following equation:
phase-angle for grid voltage synchronization. Assuming that
the VSC-AC voltage v C is on the d axis of the dq rotating
 (
KV ⋅  ΔVref + Vref − V 
 )
frame, the angle θ C is the displacing between the VSC dq vCd = (3)
s
frame and the xy synchronous reference frame.
The term ΔVref in the AVC is the required change of
VSC voltage to modulate reactive power. It results from the
RPC, where a PI controller is used, having as an input the
difference between actual reactive power Q and its
reference value Qref , as described in (4).

 KQ 
 s 
(
ΔVref =  K PQ + I  ⋅ Qref − Q ) (4)

However, RPC and AVC, even designed as cascading,
are actually alternative. In fact, in the presence of a stiff AC
network, with negligible voltage variations, the RPC is active
and Vref − V = 0 in (3), whereas in the case of a weak AC
network, RPC is switched off and ΔVref = 0 .
Fig. 1. Overall control scheme of the VSC The CRC is implemented in order to obtain current
reference values, whereas VCC should avoid the risk of
The PSL is characterized by the following equation: overcurrent in the presence of the PLL. The following
ωC − ωref (ωN + ΔωC ) − ωref equations implement CRC, where LC is phase reactor
θC = = = inductance and α C is the desired closed-loop bandwidth:
s s
(1)
( )
 K P ⋅ Pref − P + ΔPV + 1 ⋅ ωN − ωref vCd − vd + ωC ⋅ LC ⋅ iq
=  idref = + id (5.a)
DC

s αC ⋅ LC
where ΔωC is proportional to the difference between actual −vq + ωC ⋅ LC ⋅ id
active power P and reference value Pref .
iqref = + iq (5.b)
α C ⋅ LC
It is worth noting that, differently from the conventional After properly limiting idref and iqref at ± I max , VCC is
swing equations, only one integration is present in (1) to realized through the following equations:
avoid stability issues. However, the PSL actually operates
until the current flowing through the VSC is within its
maximum and minimum limits. In the case of overcurrent,
( )
vCd = αC ⋅ LC ⋅ idref − id − ωC ⋅ LC ⋅ iq + vd (6.a)
the control system will be automatically switched to the PLL vCq = αC ⋅ LC ⋅ ( iqref − iq ) − ωC ⋅ LC ⋅ id + vq (6.b)
operating mode.
The difference between master and slave controllers lies This formulation allows to perform AVC in normal
in the response to variation of DC voltage. In master control, operation, where the limit on ± I max is not attained and (5)-
DC voltage changing yields active power variation ΔPVDC (6) are inactive, and to implement VCC in the case of
overcurrent.
added to active power difference in the PSL, but in slave
configuration this term is neglected. The component ΔPVDC Then, a high-pass filter (HP) fed by current components
is exploited to improve damping of transmission network:
comes out from the DVC, where a PI controller acts on the
difference between actual DC voltage value VDC and s
HP ( s ) = K HP ⋅ (7)
reference value VDCref : s + α HP
Finally, the presence of phase reactor, with inductance
 K DC 
 s 
(
ΔPVDC =  K PDC + I  ⋅ VDCref − VDC )
(2) LC and resistance RC , involves equations relating voltage
and current in the dq frame.

The goal of the AVC is to control the AC voltage at grid The time domain simulations are carried out by means of
connection, mimicking the exciter control of a synchronous RAMSES, a power system dynamic simulator software
machine. However, it is found to be more beneficial to have developed by University of Liège based on the phasor
integral process for the VSC to suppress high-frequency approximation, operating in the xy synchronous reference
disturbances [1][14]. The AVC involves the difference frame [15]. For this reason, dq-xy coordinate conversions
between measured voltage magnitude V at grid connection (and vice versa) exploiting the phase angle estimation are
point and reference value Vref , providing in output the d present.
B. Parameter tuning LTOT LTOT

The Test System 1 is reported in Fig. 2. Relevant data are

shown in Table I, where quantities in per unit are referred to
the nominal power of the VSC. The DC Source (DCS) keeps
constant the DC voltage, whereas the Thévenin Equivalent
(TE) keeps constant the AC frequency.
Fig. 4. Scheme of the Test System 2.

In order to tune K PDC and K IDC , a 0.01 p.u. step change

is applied to VDCref of VSC2 (master). Moreover, the
behaviour of VDC is tested as well by varying the Pref by
0.1 p.u. in VSC1 (slave), with the aim of evaluating the best
Fig. 2. Scheme of the Test System 1. compromise between a small settling time and a moderate
oscillation.
TABLE I. TEST SYSTEM 1: PARAMETERS
A synthesis of the parameter values obtained with this
Quantity Value Quantity Value analysis is shown in Table II.
Sn,C 1000 MVA Vnom,AC 400 kV
Pn,C 1000 MW Vnom,DC ±320 kV TABLE II. MASTER/SLAVE VSC CONTROL – PARAMETER VALUES
LC 0.2 p.u. Snom,TE 100 TVA Control Loop PSL AVC RPC DVC HP
RC 0.01 p.u. Snom,DCS 5 TVA Quantity KP KV K PQ K IQ K PDC K IDC K HP α HP
Lline 32 Ω ωN = ωref 314.16 rad/s
Value 0.1 45 12 0.5 5 50 0.1 1

In order to tune the PSL proportional gain K P , all other III. FREQUENCY REGULATION SCHEMES
control loops are considered inactive. Starting from a zero Frequency regulation action of the VSC is aimed at
power-flow from the converter to the grid, at t = 0.1 s the replicating the frequency droop features of conventional
VSC is required to increase its active power from 0 to 0.1 synchronous generators, by a negative relation between grid
p.u. by a step change in the active power reference Pref . frequency deviation and active power variation through the
parameter R f . Similarly, the DC voltage can be regulated by
Results are reported in Fig. 3, where it can be seen that the
response is slow for K P < 0.05 and unstable for K P > 0.1 . a voltage droop characteristic, by a parameter RDC , making
active power increase along with DC voltage.
The general scheme reported in Fig. 1 is modified in the
PSL part to include the frequency droop, as reported in Fig.
5, where the droop R f is applied to ΔωC to obtain active
power deviation ΔPω , subtracted to active power difference
in (1). Moreover, LP(s) is a low-pass filter with a delay Tω
= 5 s aimed to reduce the influence of ΔPω on AC voltage
and current controls already set. In the new steady-state
condition, the closed-loop gain of the PSL is
Fig. 3. Time domain response of VSC control to active power step change
under different PSL regulations.
(
K Pf = K P / 1 + K P ⋅ R f . )
Analogous tests are carried out to tune the gain of AVC
(by a step reduction of AC voltage by 0.01 p.u.) and RPC
parameters (by a step increase of reactive power by 0.1 p.u.).
In a successive stage, the HP filter is tailored to damp fast
oscillations and to reduce overshoot of the three response.
In order to inspect the case of DC voltage variation, the
Test System 2, shown in Fig. 4, is considered. In this system,
the AC part of Test System 1 is replicated (where Fig. 5. Modification of the PSL to include frequency droop.
LTOT = LC + Lline ) and two VSCs are connected by a DC
The described control is applied to the VSCs in the Test
link, composed by two shunt capacitors ( C = 200 μF) and a System 3, reported in Fig. 6. It is analogous to Test System
resistance ( RDC = 10 Ω). 2, with VSC2 as Master and VSC1 as Slave, but the TEs are
replaced by 10-TVA synchronous machines (SM) with a
round-rotor standard model, including a speed governor with
power-frequency droop δ = 0.04 p.u. [16], and a constant
admittance load at each generator bus is added.
  1 
LTOT LTOT ΔPC = K PDC ⋅ ΔvDC +  + R f  ⋅ Δf (10)
 KP 
The mutual interactions of frequency and voltage droops
on both sides of an HVDC should be analyzed. By
neglecting DC link resistance, ΔPC1 + ΔPC 2 = 0 and ΔvDC is
equal on both sides, therefore the following relations hold
Fig. 6. Scheme of the Test System 3. (neglecting Δf 2 ):

It has to be remarked that, in the case of a load power 1  1 

change ΔPL at one side of the system, a frequency deviation ΔvDC = − ⋅ + R f  ⋅ Δf1 (11.a)
K PDC
1 + K PDC
2  KP 
Δf results, and the SM and the VSC react with power
variations ΔPG and ΔPC respectively. Their expressions are  K DC   1 
ΔPC1 =  1 − DC P1 DC  ⋅  + R f  ⋅ Δf1 (11.b)

given below, where Pn,G and Pn,C are generator nominal  K P1 + K P 2   KP 
power and converter nominal power, respectively:
By assuming K PDC DC
1 = K P 2 = 5, as in Table II, the
ΔPL = ΔPG + ΔPC (8.a) frequency deviation Δf = 0.395·10-3 p.u. of the case SR =
Δf ⋅ Pn,G 10 is obtained with R f = 36, yielding ΔvDC = –1.817·10-3
ΔPG = (8.b)
δ p.u. as well.
Δf ⋅ Pn,C  1  The results of time domain simulations are reported in
ΔPC = = + R f  ⋅ Δf ⋅ Pn,C (8.c) Fig. 8, where the trends of active power by VSC1 (Fig. 8.A)
K Pf  KP  and SM1 (Fig. 8.B) are reported, comparing the behavior
Therefore, for K P = 0.1, the value of R f can be with the only frequency droop, obtaining close results (the
slight difference is given by the contribution of Δf 2 ) with a
obtained by imposing the value Sharing Ratio SR , defined
as: better damping in the presence of voltage droop. The
corresponding trends of angular frequency are depicted in
ΔPG Fig. 9.
SR = (9)
ΔPC DC voltage trends are reported in Fig. 10, where it can be
In the Test System 3, by imposing SR = 10, R f = 13 is seen that respects the calculated deviation, whereas vDC 2 is
different due to DC link resistance. In order to make DC
obtained. A load variation ΔPL = 100 MW yields ΔPG = voltage return to the set point of 1.0 p.u., a secondary integral
90.9 MW, ΔPC = 9.09 MW and Δf = 0.395·10-3 p.u.. The regulation action should be designed.
behavior of DC voltage at the two terminals is depicted in
Fig. 7. It can be noted that, after the transient, vDC 2 is strictly
kept at 1 p.u. thanks to the presence of DVC in VSC2.
Whereas, vDC1 is lower due to the voltage drop on DC link
resistance.

Fig. 7. DC voltage variations in Test System 3 due to load variation. B

However, the presence of the PI in the DVC in the master
controller cancels out the frequency regulation contribution
of the VSC if ΔPL occurs at side 2 of the test system. In Fig. 8. Modified Test System 3: Trends of VSC1 active power (A) SM1
active power (B) due to an increase of L1 by 100 MW, comparing
order to overcome this issue and to obtain bidirectional frequency droop and voltage droop.
frequency regulation, the DVC model is changed to a simple
proportional regulator, where K PDC corresponds to the
voltage droop. Therefore, for each VSC, active power
deviation is:
 - At t = 10 s the VSC1 is requested to increase its
output active power from 0 to 0.1 p.u. with a slope of 0.01
p.u./s;
- At t = 150 s the generator g1-b of the right-side
system (generating 600 MW), close to VSC connection, is
tripped.
The VSC1 active power trend is reported in Fig. 12.A.
The power output increase does not reach 0.1 p.u. due to the
mutual interactions of voltage and frequency variation
Fig. 9. Modified Test System 3. Trends of SM1 frequency due to an described in Section III. In the second part of the evolution,
increase of L1 by 100 MW, comparing frequency droop and voltage the positive influence of the VSC is verified by the
droop. increasing active power flow towards Nordic - b when the
generator g1-b is lost.
In order to show the system behavior for the considered
scenario, the Centre Of Inertia (COI) angular speed ωCOI is
determined, as the average of angular speeds of synchronous
machines ωi weighted by inertias in p.u. M i :
m
 M i ⋅ ωi
i =1
ωCOI = m
(12)
 Mi
Fig. 10. Modified Test System 3. DC voltage trends in the presence of i =1
voltage droop due to an increase of L1 by 100 MW. In Fig. 12.B, ωCOI of the two systems is reported. It can
IV. APPLICATION TO A REALISTIC SYSTEM be seen that, as expected, once VSC1 starts to inject active
power into Nordic-b, ωCOI −b initially increases due to an
The bidirectional frequency and voltage regulation
abilities of the developed VSC-HVDC control model are excess of power produced in that area, and ωCOI − a shows an
tested in the context of a realistic transmission system. In opposite trend. When the generator g1-b is tripped, both the
particular, the Nordic test system, based on a data set angular speed values decrease because of overall generation
reported in [17], is accounted, involving 20 generators, 74 shortage, but ωCOI −b is more affected.
buses at different voltage levels, 82 lines and 20
transformers. The system has a total installed capacity of 4.6
GW hydro and 6.9 GW thermal, and feeds a total load of 11
GW.
In this section, the Double Nordic is investigated. It
includes two symmetrical Nordic Test Systems (in the
following, named with suffix a and b), connected through a
1000-MW VSC-HVDC link between two corresponding A
buses, as depicted in Fig. 11. The VSC converters are
voltage-droop controlled, RPC is active, and the frequency
droop is R f = 13.

LTOT LTOT

Fig. 12. Double Nordic Test System. Trends of VSC1 active power (A) and
Fig. 11. Scheme of the Double Nordic Test System. Center-of-Inertia angular speed of each Nordic (B) in the presence of
load ramp with subsequent loss of generator g1-b.
Simulations are carried out according to the scenario
As regards the g1-b tripping, a comparison is carried out
described hereinafter:
on the Nordic - b system in the absence of the HVDC link
- Initially the two systems are balanced (Case 1) with the considered Double Nordic (Case 2).
independently, and no power exchange across the HVDC
The valuable VSC contribution to the frequency support
link is present;
can be seen in Fig. 13.A, since both the undershoot and the
steady-state value of ωCOI −b are reduced for Case 2. The the participation of VSC-HVDC in proper secondary
comparison of AC voltage at HVDC connection bus is regulation actions could be investigated, as well as the
illustrated in Fig. 13.B. It is evident that the VSC has a behavior within a synchronous network.
strong ability to control the AC voltage, since in Case 2 it has ACKNOWLEDGMENT
better performances than in Case 1 (in terms of oscillations,
overshoot and steady state value). Authors want to thank Prof. T. Van Cutsem and Dr. L.
Papangelis from University of Liège for the support in
developing theoretical aspects and simulations in RAMSES
software during a joint Erasmus program.
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