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Manual 7

This laboratory manual for CSE-241 at the Institute of Business Administration, Karachi, focuses on constructing binary adders, specifically half-adders and full-adders. It outlines the objectives, required equipment, and theoretical background, including truth tables and Boolean expressions for both types of adders. The manual includes tasks for connecting circuits and verifying operations with 3-bit numbers using a full adder IC.

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0% found this document useful (0 votes)
3 views5 pages

Manual 7

This laboratory manual for CSE-241 at the Institute of Business Administration, Karachi, focuses on constructing binary adders, specifically half-adders and full-adders. It outlines the objectives, required equipment, and theoretical background, including truth tables and Boolean expressions for both types of adders. The manual includes tasks for connecting circuits and verifying operations with 3-bit numbers using a full adder IC.

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© © All Rights Reserved
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Digital Logic Design CSE-241

INSTITUTE OF BUSINESS ADMINISTRATION, KARACHI


Digital Logic Design (CSE-241)
Laboratory Manual
LAB # 7
Binary Adders
Objective:

Digital computers perform a variety of information-processing tasks. Among the basic functions
encountered are the various arithmetic operations. The most basic arithmetic operation is the addition
of two binary digits. In this experiment we will construct the circuits that will add binary digits.

Equipment: Components:

1. One- Single Polarity fixed 5V DC Power 1. One- quad 2-input XOR gate, 74LS86
Supply 2. One- Quadruple 2-input AND gate,
2. Logic Probe 74LS08
3. One- quad 2-input OR gate, 74LS32
4. One-4-bit Full Adder, 74LS83
5. Switches
6. One- Bread Board

Note: Do consult the data sheets before connecting you ICs

Theory:

A combinational circuit that performs the addition of two bits is called a half-adder. This circuit
requires two binary inputs and two binary outputs. Let the inputs be A & B. The low order output will be
called “S” because it represents the sum, and the high order output will be called “C” because it
represents the carry out.

A B C S

0 0 0 0

0 1 0 1

1 0 0 1

1 1 1 0

Faculty of Computer Science Page 1


Instructor: Muhammad Usman Arif
Digital Logic Design CSE-241

The simplified Boolean functions for the two outputs can be obtained directly from the truth table. The
simplified sum of the products expressions are:

S  A.B  A.B  A  B Figure 1: Half Adder

Full Adder:

A full adder is a combinational circuit that forms the arithmetic sum of three input bits. It consists of
three inputs and two outputs. Two of the input variables represent the two significant bits to be added.
The third input represents the carry from the previous lower significant position. Let the inputs be A (k),
B (k), C (k-1). The two outputs are designated by the symbols S (k) for sum and C (k) for carry. The binary
variable S (k) gives the value of the least significant bit of the sum. The binary variable C (k) gives the
output carry. The truth table if the full-adder is as follows:

A (k) B (k) C (k-1) C (k) S (k)

0 0 0 0 0

0 0 1 0 1

0 1 0 0 1

0 1 1 1 0

1 0 0 0 1

1 0 1 1 0

1 1 0 1 0

1 1 1 1 1

The simplified sum of the products expressions are:

Faculty of Computer Science Page 2


Instructor: Muhammad Usman Arif
Digital Logic Design CSE-241

S=̅̅C+̅B̅ +A ̅ ̅ +ABC

C=AB+AC+BC

Figure 2(a): Full Adder

A full adder circuit becomes a necessity when it comes to adding binary numbers with a large number of
bits. The full adder circuit overcomes the limitation of the half-adder, which can be used to add two bits
only. Because while adding larger binary number we not only need to add the two present numbers of
that stage but also consider the carry bit from the last two binary numbers. We have a similar situation
for the other higher order bits also until we reach the MSB. A full adder is therefore essential for the
hardware implementation of an adder circuit capable of adding larger binary numbers. A half-adder can
be used for addition of LSBs only.

  ( A  B)  Cin
Cout  AB  ( A  B)Cin

Faculty of Computer Science Page 3


Instructor: Muhammad Usman Arif
Digital Logic Design CSE-241

Having a detailed look at the above two equations tells us that two half adders can be used to construct
a Full adder. This implementation can be seen in the figure below.

Figure 2(b): Full Adder using two half adders.

Task 1:
 Connect the circuit as shown in the figure 2(b).
 Vary the inputs as shown in the truth table of a full adder. See if the circuit gives us the result as
shown in the table.

Task 2:
 Implement a circuit (using full adder IC 74LS83) for the addition of two 3-bit numbers.
 Verify the operation of your circuit for at-least 10 combinations of the two number. Construct
the truth table showing the outcomes of those 10 combinations in the space given.

Faculty of Computer Science Page 4


Instructor: Muhammad Usman Arif
Digital Logic Design CSE-241

Faculty of Computer Science Page 5


Instructor: Muhammad Usman Arif

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