The concept of logic algebra

While processing information two kinds of variables are used:

1) information presented by numbers;
2) information presented by logic gates.
The information given by numbers characterizes the quantitative indicators of the
system. Logical information determines the state of the system. The logic variables
show the following two opposite situations: yes / no; true / false (True / False);
joined / opened and so on. These symbols are indicated by the symbols "1" and "0"
for short. It should be noted that these symbols do not have numerical values, that is,
quantitative indicators. The operations on logic variables are based on logic algebra.
This algebra was proposed by Irish mathematician J. Bull in the middle of the
nineteenth century (1847). That is why logic algebra is sometimes called Bull
algebra.
As mentioned, each variable (or argument) in a logical algebra can take two
situations: "1" or "0". Depending on the number of variables, the number of
possible variants can be specified as follows:
, (1.1)
where n is the number of variables; N is the number of possible variants of variables.
And the number of logical functions corresponding to the number of possible
variants of variables is:
(1.2)
is defined by the expression.
The following tables summarize the numbers of N and M and the logic functions
for different values of variables (n).

Table 1.1.
The positions of logical functions
N 1 2 3 4 Note
N 2 4 8 16
M 4 16 256 65536

Table 1.2.
Truth table for 2 variabels
n=1 M=4
N= 2 X Y1 Y2 Y3 Y4
0 0 1 0 1
1 0 0 1 1

Table 1.3.
Truth table for 4 variabels

1
 Table 1.4.
Truth table for 8 variabels

The following logical operations are used in logic algebra:

1) Disjunction operation. This operation implements the OR logic. Table 1.5
shows the results of this operation for two variables, the electrical contact equivalent
and the conventional sign.
Analytical presentation for “OR” operation is as follows:

Y = X1 X2 , (1.3)

As can be seen from Table 1.5, the operations on X1 and X2 formally resemble the
binary numbering system (except 1 + 1 = 1). Therefore, they call this operation a
logical addition operation:
Y = X1 + X2.
2) Conjunction operation. This operation implements the "AND" logic. The
logical results of the AND operation for the two variables, the concept of electrical
contact, and the conventional sign are shown in Table 1.6. Analytical representation
of the AND operation is as follows:

Y = X1 X2. (1.4)

As can be seen from Table 1.6, the logical operations on X1 and X2 are similar to
the binary number production operations. That is why they call this operation logical
production:
Y = X1 * X2 = X1 X2.
3) Inversion operation. This operation implements the "NO" ("HET", "NOT")
logic. The inversion operation is analytically expressed as follows:
Y= (1.5)

2
 A table description of this operation, the concept of electrical contact, and the
conventional symbol are given in Table 1.7.
More complex logical transformations can be made using "AND", "AND",
"NO" logical operations. The following identities for logical algebra conjunctions
and designing operations are presented (Tables 1.8 and 1.9).

Table 1.5.
Truth table for 2 variabels of the OR gate

Table 1.6.
Truth table for 2 variabels of the AND gate

Table 1.7.
Truth table of the NOT gate

Table 1.8.
Truth table of the conjuction
Y=X1X2

Table 1.9.
3
 Truth table of the disjunction
Y=X1+X2

THE BASIC LAWS OF BOOLEAN ALGEBRA

Boolean algebra is mainly based on 4 laws. These laws are as follows:

1) Commutative laws
X1+X2=X2+X1;
X1 X2

V1 X2 V1 V2 X1 V2
12 V 12 V 12 V 12 V

X1X2=X2X1 (1.6)

X1 X2 X2 X1

2) Associative laws
(X1+X2)+X3=X1+(X2+X3); (1.7)
(X1X2)X3=X1(X2X3) (1.8)

4
 X1
X1

X2
X2
V1 X3 V2
12 V V1
12 V X3 V2
12 V
12 V

3) Distributive laws
(X1+X2) X3=(X1X3)+(X2X3) (1.9)

(X1X2)+X3=(X1+X3)(X2+X3) (1.10)
X1 X2
X1 X2

X3 X3 X3 V1
12 V
12 V
V2

4) Inversion (de Morqan) laws

X 1 X 2=X 1+ X 2 ; (1.11)

X 1+ X 2= X 1 X 2 (1.12)

Commmutative, associative and distributive laws for logical addition matches with
that of ordinary algebra. That is why there is no need to prove them. The distributive
laws for logical multiplication and inversion doesnot match with that of ordinary
algebra. To prove these kind of equations table method is used.at the same time they
can be proved by analytical and logical methods. For example, for distributive:
(X1X2)+X3=(X1+X3)(X2+X3)
Let’s prove that:
(X1+X3)(X2+X3)=X1X2+X1X3+X3X2+X3X3=
=X1X2+X1X3+X3X2+X3=X1X2+
+(X1+X2+1) X3=X1X2+1X3=(X1X2)+X3.
5
 Based on the distrubution law, we can obtain the fillowing exspressions:
1. (X1X2)+(X1 X 2)=X1(X2+ X 2)=X11=X1;
2. (X1+X2)(X1+ X 2)=X1X1+X1 X 2+X2X1+
+X2 X 2=X1+X1( X 2+X2)+0=X1+X11=
=X1+X1=X1;
3. X1+(X1X2)=X1(1+X2)=X11=X1;
4. X1 (X1+X2)=X1X1+X1X2=X1+X1X2=
=X1 (1+X2)=X11=X1;
5. X1+( X 1X2)=X11+ X 1X2=X1(1+ X2)+ X 1X2 =
=X1+X1X2+ X 1X2=X1+X2(X1+ X 1)=X1+X2;
6. X1( X 1+X2)=X1 X 1+X1X2=0+X1X2=X1X2.

Lets look at below examples to prove the inversion laws:

1) Let us denote by D that any course process takes place. In order for this process
to occur, it is necessary to have a teacher (M) and a student's participation (T). The
interpretation is logically expressed as follows:
D=MT
This expression can also be written as below:
D= D T (1.13)
At the same time, for the classroom to fail ( ) it is enough for the student ( ) OR
the teacher ( ) to be absent. This comment can be logically written as follows:
= + (1.14)
Based on expressions (1.13) and (1.14) below equation can be written
= + . (1.15)

2) Let’s assume that, we have both electric heaters (E) and water radiator (R) for
heating any room (İ). For heating the room, it is enough to connect an electric heater
(E) or a radiator (R). So :
İ=E+R or = . (1.16)
In order not to heat it is necessary not to connect the electric heater AND the
radiator at the same time,
I =E R . (1.17)
Based on both (1.16) and (1.17) expressions
=E R . (1.18) (1.15) and (1.18)
express the expressions (1.11) and (1.12).

6
 ANALYTIC FORM OF BOOLEAN FUNCTIONS

As can be seen from the tables (1.1) - (1.4) as the number of boolean variables
increases their description in table form becomes more and more difficult.For
example, for 3 variables it will be 256 and for 4 variables it will be 65536. That is
why to express the logic functions with analytic equations is more convinent. The
most convinent method is the standard way of describing the logic function. The
basis of standard description is elementary conjunction and disjunction .
When said elementar conjunction (minterm), the all possible variants of
products of logic variablesare considered (table 1.10).
When said elementary disjunction (maxterms) all possible variants of logical
sums of logic variables (table 1.10).
As can be seen from the table 1.10 elementary conjunction returns 1 only in
minterms from all possible variants. And elementary disjunction returns 0 only in
maxterms from all possible variantsElementar dizyunksiya isə giriş arqumentlərinin
bütün mümkün variantlarında ancaq bir halda sıfır qiymətini (maksterm) alır. If
boolean expression is expressed only with inversion, disjunction and conjunction
then this kind of boolean function is called normal function.
The boolean expression can be given in both disjunctive and conjunctive forms.
Disjunctive normal form means the sum of minterms (elementary conjunctions). For
example:
Y=X1*X2+ *X2.
Conjunctive normal form means the product of maxterms (elementary
conjunctions). For example, (X1+X2)*( +X2). The number of elementary
conjunctions and disjunctions are called its rank.

7
 Table 1.10.

Thruth table of the Minterm and Maxterm

8
 For example, the expression Y=X* *X3 is a three variable elementary
conjunction, and the expression Y= +X2+X3+X4 is 4 variable elementary
disjunction.
If boolean expression contains elementary conjunctions that have the same
ranks and if they are connected by disjunctions then, such function is called “Full
disjunctive normal form - FDNF”. If boolean expression contains elementary
disjunctions that have the same ranks and if they are connected by conjunctions
then , such function is called “Full conjunctive normal form - FCNF”
It is proven in boolean algebra that, any boolean function except Y=0 and any
boolean function except Y=1 can be expressed with FDNF and FCNF respectively.
Assume that the values of 3 variable logic function are given in table 1.11.
Lets note the minterms corresponding to values “1” in boolean expression and
maxterms corresponding to “0” in boolean expression. The sum of minterms (FDNF)
will be the analytic expression of boolean function. At the same time, the product of
maxterms (FCNF) will the analytic expression of boolean function. It should be
noted that, both forms of boolean function is exactly same with each other.

9
 Table 1.11.
Values of 3 variable logic function

10
 Table 1.12.
X1 X2 Y
0 0 0
1 0 0
0 1 1
1 1 1

In above table 1.12 truth table for the 2 logic variables (X1, 2) is given. Using these
values lets write analytic expression of this logic function. The FDNF form will be
like below:
Y= X2 + X1X2.
Lets simplfy this expression
Y= X2+X1X2=X2( +X1)=X21=X2.
The analytic form of this logic function in FCNF form will be like below:
Y=(X1+X2)( +X2).
Lets simplfy this expression:
Y=(X1 +X2)( +X2) =X1 +X1X2 + X2 + X2X2=
=0+X1X2 + X2 +X2 =X2(X1+ +1)= X21=X2.

As can be seen from the obtained expressions both forms of logic functions are
exactly same with each other.

Task 1. Create an analytical expression and equivalent contacts in accordance with

the specified logical table and simplify it.
X1 X2 Y
0 0 1
1 0 0
0 1 1
1 1 0

Y= X 1 X 2+ X 1 X 2= X 1 ( X 2+ X 2 )=X 1 1=X 1 ;

X1 X2 X2
Y Y
X1

X1 X2 X2
V1
12 V

Y
X1

Task 2. Create an analytical expression and equivalent contacts in accordance with

the specified logical table and simplify it.
11
 X1 X2 Y
0 0 0
1 0 1
0 1 0
1 1 1

Y= X 1 X 2+ X 1 X 2 = X 1 ( X 2+ X 2 )=X 1 1=X 1
X2 Y X2 Y
X1
X1
X1 X2 X2

V1
X1
12 V

Task 3. Create an analytical expression and equivalent contacts in accordance with

the specified logical table and simplify it.

X1 X2 Y
0 0 0
1 0 0
0 1 1
1 1 1

Y= X 1 X 2+ X 1 X 2 = X 2 ( X 1+ X 1 )=X 2 1=X 2

Task 4. Create an analytical expression and equivalent contacts in accordance with

the specified logical table and simplify it.

X1 X2 Y
0 0 1
1 0 0
0 1 0
1 1 1

12
 Y= X 1 X 2+ X 1 X 2

X1 X2 Y

V1 X1 X2
12 V

Task 5. Create an analytical expression and equivalent contacts in accordance with

the specified logical table and simplify it.

X1 X2 Y
0 0 0
1 0 1
0 1 1
1 1 0

Y= X 1 X 2+ X 1 X 2

MINIMIZING (SIMPLIFICATION)
OF LOGIC FUNCTIONS

If the logical function of any process is presented in a table, then the analytical
expression of that function is obtained by writing MDNF or MKNF forms. To
simplify the obtained analytical expression, it is necessary to use the basic rules of
logic function to minimize it.
İn order to minimize the logic expression Karnaugh-Veitch (KV maps) method is
also used.the use of this method is convinent if the number of variables are no more
than 4. Fig. 1.1 shows a Karnaugh map with 4, 6, and 16 cells, respectively, for two,
three, and four arguments

13
 Fig. 1.1. Karnaugh map for two, three, and four arguments

Should be written into the cells of Karnaugh map where the minterms of logic
function returns 1. To minimize the logic expression by this method you should
follow the below rules:
1) If the "1" is located in rows and columns corresponding to the adjacent cell,
then the conjunctions corresponding to these "1"-s will be reduced to one grouped
term, and in this conjunction variables of the same character are stored.
2) if the cells in which 1-s have been stored make square form then the
corresponding conjunctions are reduced by 2 rank. In this conjunction the variables
of the same type are stored.
3) if conjunction contains only 1 cell then logic expression remains same.
Example: simplfy the 3 variable logic expression corresponding table 1.12.
Lets write down analytic expression of logic function corresponding to Table 1.12
Table 1.12.
Analytic expression of logic function
X1 X2 X3 Y
0 0 0 0
1 0 0 0
0 1 0 0
1 1 0 1
0 0 1 1
1 0 1 1
0 1 1 0
1 1 1 1
Y=X1X2 + X3+X1 X3+X1X2X3 (1.19)
14
 Let’s first simplfy this expression by using the basic laws of booean algebra:
Y=X1X2 + X3+X1 X3+X1X2X3=X1X2 + +X1X2X3+ X3+X1
X3=X1X2( +X3)+
+ X3( +X1)=X1X2*1+ X31=
=X1X2+ X3 (1.20)

Lets analyze the simplification of that function by appling Karnaugh map.

X1
a 1
X3 1 b 1 b 1
X2

The terms that return 1-s in the Karnaugh map are X1X2 and X1X2X3. İf we
reduce these conjunctions by 1 rank and keep the same variables we will get the term
X1X2. The cells in which 1-s have been stored are conjunctions X1 X3 , X3.
İf we decrease these conjunctions by 1 rank and keep the same variables we will get
conjunction X3. As a result, the function simplified by using Karnaugh map is
shown below.
Y= X1X2+ X3 (1.21)
This expression is same with the expression (1.20). So, the logic funtion written with
the expression (1.19) can be expressed as boolean expression (1.20) or (1.21) after
simplification process.

Sample soluation:

I. Create equivalent contacts of the logical functions:

1. Y= X2+X1X2=X2( +X1)=X2

2. Y=X1+X1X2+X3=X1(1+X2)+X3=X1+X3

15
 X1
Y X1 Y
X1 X2

12 V X3 12 V X3
V1 V1

3. Y= +X1 = ( +X1)=
X1
X2 R
X1 X2 Y
X1
Y
X1 X2 R
12 V
V1

4.12Y=X1(
V +X2)+X2( +X3)+X3=X1 +X1X2+
V1
+X2 +X2X3+X3=0+X1X2+0+X2X3+X3=
=X1X2+X3(X2+1)=X1X2+X3

X1
X1
X2

X2 Y
X2 X1 X2 Y
X3

12 V X3 X3
V1

II. Prove the identities of logical functions:

5. (X1+X2)(X1+ )=X1;
X1X1+X1 +X2X1+X2 =X1+X1 +X2X1+0=
=X1(1+ +X2)=X11=X1.
X1 X2 Y

Y
X2 X2 X1

6. (X1+X2)(X1+X3)=X1+X2X3
(X1+X2)(X1+X3)=X1X1+X1X3+X2X1+X2X3=
=X1+X1X3+X2X1+X2X3=X1(1+X3+X2)+X2X3=
X2
=X1+X2X3.
Y
X1 X1 Y X1

X2 X3 X2 X3

III. Simplify logical functions:

7. Y = X 1 X 2+ X 1 X 2+ X 1 X 2+ X 1 X 2= X 1 ( X 2+ X 2 ) ++ X 2(X 1+ X 1)= X1+X2.

16
 X1 X2 Y X1
0 0 0
1 0 1 X2 X1X2 X2
0 1 1
1 1 1 X1

X1X2 X1
X1X2 } X1X2
; X1X2 X2 }
X1 X2
X1 X2 Y Y
X1
X1 X2
X1 X2 X2

12 V
V1 8. Y=X1X2
X1 X2 Y X1
0 0 0
1 0 0 X2 X1X2 X2
0 1 0 X1
1 1 1

X1 X2 Y

9. Y = X 1 X 2 X 3+ X 1 X 2 X 3+ X 1 X 2 X 3+ X 1 X 2 X 3=¿
¿ X 1 X 2 ( X 3+ X 3 ) + X 1 X 2 ( X 3+ X 3 )=¿
¿ X 1 X 2+ X 1 X 2=X 2 ( X 1+ X 1 )=X 2
X1 X2 X3 Y
0 0 0 0
1 0 0 0
0 1 0 1
1 1 0 1
0 0 1 0
1 0 1 0
0 1 1 1
1 1 1 1

X2
X1 X1X2 X1X2X3
X2X3 X2X3
X3
17
 }
X 1 X 2X 3
X 1 X 2X 3 X 2
X 1 X 2X 3
X 1 X 2X 3

X1 X2 X3

X1 X2 X3 Y

X1 X2 X3
Y
X1 X2 X3 X2

12 V
V1 10. Y = X 1 X 2+ X 1 X 2+ X 3= X 1 X 2+ X 1+ X 2+ X 3=¿
¿ X 2 ( X 1+ 1 )+ X 1+ X 3= X 1+ X 2+ X 3 = X 1 X 2 X 3
X1 X2 X3 Y
0 0 0 1
1 0 0 1
0 1 0 1
1 1 0 1
0 0 1 1
1 0 1 1
0 1 1 1
1 1 1 0

X1
X3 b
1 a 1 1

c 1 1 1 1

X2

}
X 1 X 2X 3
X 1 X 2X 3
}
a - X 1 X 2 X 3 X 1 X 2;
X 1 X 2X 3 X1 X 3
b - X 1 X 2 X 3 = X 1 X 3 X 1; }
X 1 X 2X 3
X 1 X 2X 3
}
c - X 1 X 2 X 3 X 1 X 3;

Y= X 1 X 2+ X 1+¿+ X 1 X 3= X 1 ¿.
X 1 dəyişənini X1+1 ifadəsi ilə əvəz etsək, alarıq:
Y= X 1( X 2+ X 3)+ X 1=(X1+1)(X 2+ X 3)+ X 1=X1X3+
+X1 X 2+X1 X 3+ X 2+ X 3+ X 1= X 3+ X 2+ X 1= X 3 X 2 X 1
18
 X1 X2
Y
X1 X2 R

X3

12 V X1 R
V1 X2 X3
X1 Y
X2 Y

X3 R

11. Y = X 1 X 2+ X 1 X 2= X 2( X 1+ X 1)= X 2

X1 X2 Y X1
0 0 1
1 0 1 X2 1 1
0 1 1
1 1 1 1 1

Y Y
X1 X2 X1 X2
X1 X2 X1 X2

12. Y= X 1 X 2+ X 1 X 2+ X 1 X 2= X 1 X 2+ X 1 ( X 2+ X 2 )=¿
= X 1 X 2+ X 1=X 1 X 2+ X 1 (1+ X 2 )=X 1 X 2+ X 1+ ¿
+ X 1 X 2= X 1+ X 2 ( X 1+ X 1 )= X 1+ X 2

X1 X2 Y X1
0 0 0
1 0 1 X2 1 1
0 1 1
1 1 1 1

X1X2
X1X2
=X1; } X1X2
X1X2
=X2; }
X1 X2
Y Y
X1 X2 X1
X1 X2 X2

13. Y=X1X2
19
 X1 X2 Y X1
0 0 0
1 0 0 X2 1
0 1 0
1 1 1

Y
X1 X2

14. Y= X 1 X 2 X 3+ X 1 X 2 X 3= X 1 X 3 ( X 2+ X 2 )= X 1 X 3
X1 X2 X3 Y
0 0 0 0
1 0 0 0
0 1 0 0
1 1 0 0
0 0 1 1
1 0 1 0
0 1 1 1
1 1 1 0

X2
X1
1 1
X3

X 1 X 2X 3
X 1 X 2X 3 }
=X 1 X 3
Y
X1 X2 X3
Y
X1 X2 X3 X1 X3

INFORMATION ABOUT
PROGRAMMABLE LOGIC CONTROLLERS (PLC)

PLC are special electronic devices that can be programmed and are used for
automating technological processes. Unlike computers PLC-s give signals to the
system according to input signals. First logic controllers were designed in a module

20
such that relays and contacts are connected to each other according to certain. The
very first PLC was produced in 1968 by Modicon-084 and had 4 kB memory.
Programmable logic controllers that have some certain limited capacity are also
called as programmable intellectual relays.
The name of some PLC-s and PIR produced by different companies have been
given below:
 PLC called ‘Simatic S5’ and ‘Simatic S7’ by Simens;
 PLC called ‘Modicon’ by Schneider Electric;
 PLC called ‘LOGO’ by Simens
 PIR called ‘Zelio logic’ by Schneider Electric
 PIR called ‘EASY’ by Moeller;
The programming languages used for PLC and PIR are shown below:
Graphical languages:
 LD (Ladder Diagram) – relay, schematic language for electric contacts;
 FBD (Function Block Diaqram) – functional block diagram;
 SFC (Sequential Function Chart) – sequantial function chart.
Text languages:
- STL (Statement list) – operator sheet.

The description of rectifiers.

Rectifier classification. Single phase half wave rectifiers.
Single phase full wave rectifier.

The rectifiers as a static converter are used to convert the alternating current to
a direct current. The power part of this converter device mainly consists of the
following parts :1-transformer; 2-rectifier elements; 3-output filter.
2 3
1 =Uout
~Uin

Rectifiers are classified according to the following features:

 power;
 voltage;
 number of phases of the first side of the transformer;
 rectification circuit;
 method of output voltage regulation.

Rectifiers with a power up to 1 kW considered as a small, with a power up to

100 kW medium, and the with a power of higer than 100 kW are called high
powered.
21
 Rectifiers with a voltage up to 250V is called low voltage, with a voltage of up
to 1000V is medium voltage and the high voltage rectifiers are with a voltage of
more than 1000V.
The transformers could be 1-phase and 3-phase based on number of primary
side phases.
Rectifier circuits are classified as follows:
- Single phase half-wave;
- Single phase full-wave;
- Single bridge circuit;
- Multi phase rectifier circuit;

Single phase half wave rectifiers

The rectifier circuit consists of transformer (Tr), rectifier diode (D) and active
resistance (R d ). In the figure below illustrates voltage and current diagrams. Since
the R d is active resistance, it coincides with the voltage and current in phase.
The instantaneous value of the voltage in the secondary side of the transformer
is expressed as follows:
U ab =√ 2U 2 sin ωt ,
where U2 – the RMS value of transformers seconfary side voltage
 - angular fequency of grid voltage (=2f).
The constant component of rectified voltage can be determined using the
equation below: Uab
D id
Tr a Uab
id id

~U1 Ud Rd
 2 t

a) Ud, Uds b)

Uab
id
t
 2

22
 c)

Single phase half wave rectifier

π
√ 2U 2 sin θdθ= √ U 2=0 , 45U 2
1 2 2
U ds = ∫
2π 0 2π ,
here t is rotation angle of AC vector.
When U2=220 V the Uds=0,45Uds=0,45220=99 V.
For the active inducuctive load of single-phase halfwave rectifier circuit lets
look at MATLAB - Simulink  "SimPower Systems" modeling .

The single-phase bridge scheme

Single phase bridge rectifier circuit consist of four thyristors VS1VS4,

transformer Tr, Ld-inductance and Rd active resistance. In circuit diagram key k
changes nature of resistance between active and active-inductive. Current and voltage
fot the condition = 0 is the same as in Fig. 1.6.
 The average value of the rectified voltage:
2 √2
Ud= U2
π = 09U2; (1.27)
 The maximum valur of the reverse voltage in thyristor:
Uəkcm = U2;√ 2 (1.28)
 The maximum value of the current through thyristor:
I VSm =
U
√2 2

R ; d (1.29)
Ld

VS1 VS2
tr k
A
i1
B
id Rd

VS3 VS4
23
 The circuit of single-phase bridge rectifier

Active luggage following parameters are characterized scheme.

 Average valur of current through thyristor:
Id
Ivsor =;
2
 r.m.s. value of current through thyristor:
❑
Ivsef = id 4
 The r.m.s. values of current throug primary and secondary sides of
transformer can be determined using following expressions:
i sin θdθ ; I ⋅π=∫ √ 2 I
π π

I d⋅π=∫ 2 d 2 ef sin θdθ ;

0 0

√ 2 I (−cos)| ; I π
I =1,11⋅I ;
π π
I d⋅π=∫ =
0
2 ef 0 I d⋅π=2 √2 I 2 ef ; 2 ef 2 √ 2 d d

1 ,11⋅ I ;
I =
π
I d=
d

k k
1 ef

. T 2 √2 T

In Active-inductive load (Ld =) the current throughtThyristors and

transformers will be in the rectangular form. The average valur of the rectified
voltage is same as in active load.
When  0, depending on the nature of the load (active or active inductive)
bridge circuit could be characterized by the following parameters.
1) The average value of the output voltage
 active load:
1+ cos
Ud Udo = =; 2
 active - inductive load (L =):
Ud Udo = cos;
2) Thyristors maximum voltage:
 active load

}
U əksm =√ 2U 2
√2
U düz m= U 2 sin .
2
 active – inductive load:
Uəksm = U2, √ 2
Uflat m U2 = sin√ 2.
3) The maximum current value of thyristors
 active load:
IVSM = U2 / Rd √ 2
24
  active - inductive load:
IVSM= Id.
4) And average and r.m.s. value of the current through thyristor
 active load:
Ud
Ivsor = 2 R
d

Ivsef = Kf  Ivsor.
 active - inductive load:
U d Id
Ivsor = Ivef = 2 R
d √2

Three phase bridge circuit

The circuit of the three-phase bridge rectifier consists of 6 thyristos (VS1-

VS6), transformer (Tr), active (Rd) and inductive (Ld) loads. Key k is used to ensure
the appropriate operation of circuit with active-inductive and only active load (Fig.
1.20). Fir the active load and =0 case (k switch is turned off), current and voltage
graphs is given in the figure below. As can be seen from the figure, current passes
through VS1 and VS6 thyristiors starting from T1 . In this case, the linear voltage
Uab is applied to Rd resistance. Rectified current Id flows by the following loop:
phase a, VS1 thyristor, Rd resistance, VS6 thyristor, b-phase. This process continues
until the moment t2. After the time t2, the potential of phase c is becomes more is
negative. VS2 thyristor opens and passes currernt, as control signal reseived. VS6
thyristor is turned off, and oppsite Uab voltage will be applied. Through VS1 and
VS2 thyristors current will pass in Rd resistance. At t3-time the control signal is send
to VS3, the thyristor is opened and VS1 thyristor is closed. Thus, over a period of /3
following thyristor couples a switched:
VS6-VS1; VS1-VS2; VS2, VS3; VS3, VS4; VS4, VS5; VS5-VS6.

ia VS1 VS3 VS5

Ld k
a
ib
b
ic
id Rd
c

VS4 VS6 VS2

Sək120. The three-phase bridge circuit

25
 Rectified voltage:
2 /3
3
Ud = U2 sin ❑ ∫ √ 6d = U2 = 234U2 = 1.35 UAB 3 √6 (1.44)
❑ ❑
3

Where U2 is r.m.s. value of transformers secindary side pghase voltage. This

statement is true for the both active and active-inductive load.
In the case Ld = the circuit parameters characterasied by following
quantities:
 The maximum value of the reverse voltage applied to thyristor:
Uərsm = U2x √ 2
U2x here – r.m.s. value of linear voltage.
 Maximum value of thyristor current:
Ivsmax =Id
 Average value of thyristor current:
Id
Ivsor =.
3
To regulate the output voltage of the rectifier, the thyristors must be given
control pulses starting at the intersection of the phase voltages (0). Rectified
current of the control pulses in 0/3 - Regardless of the nature of the load, it will
be uninterrupted. In this mode, the value of the rectified voltage is calculated as
follows:
Ud = 2.34 U2cos = Ud0cos
Ud0 = 2.34 U2 voltage here rectified =0 into a proper value.
=/ 3 us boundry condition for the continuous current.
Ua Ub end Ua Ub

t
T1 t2 t3

UAB UAC UBC Uba high UCB UAB

Ud
t

VS1 VS2 VS3 VS4 VS5 VS6 VS1

VS6 VS1 VS2 VS3 VS4 VS5 VS6 Id
t

US1

26
iVS1 iVS1
t
 Sək121. Three-phase bridge circuit graphs

At the angle value /3 of active load the interruptions uccurs in the value of
the voltage and current. The average value of the voltage for this situation is
expressed as follows:
Ud = Ud0 [1+ cos (/ 3 +)] (1.49)
Aaverage value of rectified voltage at active-inductive load control angle
/3:
Ud = Ud0cos (1.50)
In Fig.1.22 given the regulation characteristics of three-phase bridge circuit fo
the active (1st curve) and active-inductive (2nd curve) load.

Ud

Ud0

27

1
 Fig. 1.22. Characteristics of the 3-phase bridge circuit for active (1st curv) and
active-inductive (2nd curve) loads

The characteristic of the control angle in the 0 /3 range is expressed in

the same expression for theboth active and active-inductive loads:
Ud = Udo cos
The regulation characteristics for the active load after the >/3 value are
determined by the following expression.
Ud = Udo [1 + cos (/ 3 +)]
(1.52)

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