LECTURE - 22 Basics of Real Basics of Real - Time Time Scheduling Scheduling
LECTURE - 22 Basics of Real Basics of Real - Time Time Scheduling Scheduling
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70% of all processors built today are destined for embedded systems
Example:
HTCs HD2 uses Qualcomm 1 GHz processor HTC s Samsung I9100 Galaxy: Dual-core 1.2 GHz ARM Cortex-A9
Why? y
Moores law Transistor is cheaper => Processor is cheaper Couldnt imagine putting a PKR.10,000 processor in a PKR. 20,000 microwave oven
Now embedded processor < PKR. 1000 Now, PKR
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Real-Time means quantitative notion of time There is a physical mean to measure time Th i h i l i
Say, a physical clock Example: A chemical plant p p
D Described with event ordering such as b f ib d ith t d i h before, after, d i ft during, succeeds, precedes Example: Query from a web-server or data-base
Safety-critical
Safety can only be ensured through increased reliability Standard reliability criterion for a flight-control computer?
1 failure per 109 (I Giga) flying hours
C1 V O T I N G
C2
C3
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Types of RT Tasks
100%
Deadline
Utility
Hard RT task
Response Time
Considered failed if deadline is surpassed Collision detection & avoidance tasks for a robot
Firm RT task
Th There i a d fi d deadline is defined d dli
But failure to meet deadline doesnt mean system failure
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Types of RT Tasks
Deadline 100%
Soft RT task
Utility 0
Response Time
Non-RT task
Gi me an example! Give l !
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Events in RT-System RT
Stimulus Events
Generated by environment and used by system , p Periodic, Aperiodic
Response Events
Produced by system and used by environment
Delay constraint
delay
t 0
t(e1)
delay
t(e2)
Deadline constraint
deadline
t(e2)
deadline
Duration constraint
Deadline Constraints
Stimulus-Response (S-R) Type
Also called Performance Constraint
Await Dial DialTone Await 1st Digit
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Deadline Constraints
Response-Stimulus (R-S) Type
Await 2nd Digit
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Deadline Constraints
Stimulus-Stimulus (S-S) Type
Await 3rd Digit Di it
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Deadline Constraints
Response-Response (R-R) Type
Await RingBack Tone Await Call Pick UP Pick-UP
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Delay Constraints
Stimulus-Stimulus (S-S) Type
Timer Expired Await 2nd Digit Di i Await 3rd Digit
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Important Notions
Task Instance
E er time an event happens, it triggers a response Every e ent ha ens tri ers res nse
A piece of code has to be run, etc. Mostly periodic, but could be aperiodic
The most common are deadline-constrained tasks Relative vs. Absolute Deadline
Absolute: Measured with the help of a real clock R l Relative: referenced to some other event f d h
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Important Notions
Relative Deadline of Ti =di
i Ti (1)
0
Arrival or activation of Ti (1)
Ti (2)
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Important Notions
Task Precedence
If a task must complete before the second task to start g Its recurring Defines partial ordering among tasks
T1 T3
T4
T2
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Important Notions
Data Sharing g
Tasks often need to share data p p g p g Example: A temperature sensing and processing node Data sharing can imply a task precedence
But there can be task precedence without data sharing p g And there can be data sharing among concurrent tasks
T1 T3
T4
T2
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TASK CLASSIFICATION
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di
pi
ei
i Ti (1)
0
Arrival or activation of Ti (1)
Ti (2)
p = Period d = Deadline
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Pre/post-Labs can be done during any free slot available to students in-between the lab sessions
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24/1 Intro 3rd Week 9/2 Lab1 L b1 (PIC18F452) 28/2 Resource Sharing in MP 15/3 Mid term 10/4 HW Accelerators 13th Week 26/4 FPGA Lab3
26/1 RT Scheduling RT-Scheduling 14/2 Dynamic Scheduling Algos 1/3 Commercial RTOS 27/3 RT Comm. 12/4 Commercial Embedded Platforms
h 14th Week 1/5 FPGA Lab4
31/1 Static Scheduling Algos 16/2 Resource R Sharing 7th Week 6/3 Lab3 (Mini6410) 29/3 RT Databases 12th Week 17/4 Lab5 (TS7200)
h 14th Week 4/5 FPGA Lab5 1/26/2012
2/2 Mem-mapped I/Os GPIO I/Os, etc. 5th Week 21/2 Linux D Device L Drivers 7th Week 8/3 Lab3 (Mini6410) 10th Week 3/4 4 Lab4 (TS7200) 12th Week 19/4 FPGA Lab1
3rd Week 7/2 Lab1 (PIC18F452) 5th Week 23/2 Lab2 L b2 (Mini6410) 13/3 RT Comm. 10th Week 5/4 4 Lab4 (TS7200) 13th Week 24/4 FPGA Lab2
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