Coa MCQS
Coa MCQS
Mandal’s
Shri Shivaji Institute of Engineering & Management Studies,Vasmat Road,
Parbhani – 431 401 (M.S.).
Ph. (02452) 234109, Fax (02452) 221958
Email: [email protected] web: www.ssiems.org.in
DTE Code: 2252 University Code: 2252
Shri. Prakash Shri. Satish Chavan Shri. Anil Nakhate Dr. Anand K.
Solanke Pathrikar
President Secretary Joint Secretary Director
Unit 1: Introduction
b) set of principles and methods that specify the functioning, organization, and implementation
of computer systems
c) set of functions and methods that specify the functioning, organization, and implementation
of computer systems
Answer: b) set of principles and methods that specify the functioning, organization, and
implementation of computer systems
Answer: a) RISC
Answer: c) Transistors
a) ROM
b) EROM
c) RAM
d) Workspace
Answer: d) Workspace
7. Which memory device is generally made of semi-conductors?
a) RAM
b) Hard-disk
c) Floppy disk
d) Cd disk
Answer: RAM
a) Accumulators
b) Registers
c) Heap
d) Stack
Answer: a) Accumulators
11. Which component of the CPU is responsible for performing arithmetic and logical operations?
a) Control Unit
b) Memory
c) Register
12. Which of the following register keeps track of how instructions are being executed?
a) Instruction registers
13. Which of the following register is used to store the currently executed instruction?
a) Instruction registers
14. Which register holds the address of the next instruction to be executed?
16. In a Von Neumann architecture, where are the data and instructions stored?
a) CPU
b) Cache
c) Main memory
d) Registers
17. Which of the following represents the binary equivalent of the decimal number 15?
a) 101
b) 1111
c) 111
d) 1001
Answer: b) 1111
18. Which of the following components is responsible for storing data temporarily during processing?
a) Hard drive
c) CPU
19. Which of the following is the correct order of the CPU components that process data?
a) CU → ALU → Register
b) ALU → CU → Register
c) Register → CU → ALU
d) Register → ALU → CU
c) Store programs
Answer: d) 1001
22. The ALU gives the output of the operations and the output is stored in the ________.
a) Memory Devices
b) Registers
c) Flags
d) Output Unit
Answer: b) Registers
a) RAM
b) ROM
c) CPU
d) PC
Answer: c) CPU
a) Machine level
b) Assembly
c) Natural
d) High-level
Answer: d) High-level
25. Which level of RAID refers to disk mirroring with block striping?
a) RAID level 1
b) RAID level 2
c) RAID level 0
d) RAID level 3
26. With multiple disks, we can improve the transfer rate as well by ___________ data across multiple
disks.
a) Striping
b) Dividing
c) Mirroring
d) Dividing
Answer: a) Striping
27. The RAID level which mirroring is done along with stripping is
a) RAID 1+0
b) RAID 0
c) RAID 2
d) Both RAID 1+0 and RAID 0
28. The primary memory (also called main memory) of a personal computer consists of
a) RAM only
b) ROM only
d) Cache memory
Answer: a) Sequential
31. How many storage locations are available when a memory device has twelve address lines?
a) 144
b) 512
c) 2048
d) 4096
Answer: d) 4096
a) the EPROM can be erased with ultraviolet light in much less time than an EEPROM
b) the EEPROM can be erased and reprogrammed without removal from the circuit
c) the EEPROM has the ability to erase and reprogram individual words
d) the EEPROM can erase and reprogram individual words without removal from the circuit
Answer: d) the EEPROM can erase and reprogram individual words without removal from the
circuit
33. Which of these memory devices can be removed from the computer?
a) Floppy
b) RAM
c) Hard disk
d) Register
Answer: a) Floppy
a) RAM
b) ROM
c) Cache
d) Both A and B
a) It is fast
c) It is volatile
d) All of these
Answer: c) It is volatile
a) Erasable RAM
b) Dynamic RAM
c) Programmable RAM
d) None of these
d) All of these
a) It needs refreshing
d) None of these
a) hit rate
b) refresh cycle
c) refresh rate
d) refresh time
a) Software
b) Peripheral
c) Input
d) Output
Answer: a) Software
[Unit 5] Control Unit and Input / Output Organization
a) Expensive
b) Complex hardware
c) RISC
42. Which block holds the present microinstruction while the next address is computed and read from
memory?
d) Control memory
a) Accumulator
b) Branch Register
c) Sequence Register
d) Pipeline Register
44. Microinstructions are stored in control memory in groups, with each group specifying ________.
a) Micro program
b) Mapping
c) Routine
d) None
a) Micro program
b) Mapping
c) Routine
d) None
Answer: b) Mapping
47. In micro-programmed control units, the sequence of micro-instruction execution is stored in:
a) General-purpose registers
b) Control memory
c) RAM
d) ALU registers
a) Lack of flexibility
d) Difficulty in modification
d) Instruction registers