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Unit 4 Digital Electronics Complete Notes

The document outlines the syllabus for Digital Electronics as part of the Electronics & Communication Engineering curriculum at Dr. A.P.J. Abdul Kalam Technical University. It covers topics such as the difference between analog and digital signals, various number systems (decimal, binary, octal, hexadecimal), binary arithmetic, logic gates, and Boolean algebra. Additionally, it includes methods for simplification of Boolean functions and K-map minimization techniques.

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0% found this document useful (0 votes)
138 views58 pages

Unit 4 Digital Electronics Complete Notes

The document outlines the syllabus for Digital Electronics as part of the Electronics & Communication Engineering curriculum at Dr. A.P.J. Abdul Kalam Technical University. It covers topics such as the difference between analog and digital signals, various number systems (decimal, binary, octal, hexadecimal), binary arithmetic, logic gates, and Boolean algebra. Additionally, it includes methods for simplification of Boolean functions and K-map minimization techniques.

Uploaded by

bayowe7061
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
You are on page 1/ 58

FUNDAMENTALS OF

ELECTRONICS ENGINEERING
(BEC101 / BEC201)

I/II SEMESTER
Electronics & Communication Engineering

UNIT-4
DIGITAL ELECTRONICS

As per the syllabus of


Dr. A.P.J. Abdul Kalam Technical University, UTTAR PRADESH.

Dr. ARUN KUMAR. G


Professor & HOD
Department of Electronics & Communication Engg.
JSS Academy of Technical Education , Noida, UP.
CONTENTS
UNIT-4: DIGITAL ELECTRONICS
4.1 INTRODUCTION 142
4.1.1 DIFFERENCE BETWEEN ANALOG AND DIGITAL SIGNAL: 143
4.2 NUMBER SYSTEMS 143
4.2.1 DECIMAL NUMBER SYSTEM 143
4.2.2 BINARY NUMBER SYSTEM 144
4.2.3 OCTAL NUMBER SYSTEM 144
4.2.4 HEXADECIMAL NUMBER SYSTEM 145
4.3 BINARY ARITHMETIC 155
4.3.1 BINARY ADDITION 156
4.3.2 BINARY SUBTRACTION 157
4.3.3 COMPLEMENT OF BINARY NUMBERS 157
4.3.4 SUBTRACTION USING 1’S COMPLIMENT 157
4.3.5 2’S COMPLEMENT 158
4.3.6 SUBTRACTION USING 2’S COMPLEMENT 158
4.4 LOGIC GATES 164
4.4.1 BASIC GATES 164
4.4.2 UNIVERSAL GATES 165
4.4.3 NAND GATE AS UNIVERSAL GATE 166
4.4.4 NOR GATE AS UNIVERSAL GATE 167
4.4.5 REALIZATION OF GATES USING ONLY BASIC GATES 168
4.4.6 BOOLEAN ALGEBRA 169
4.4.7 BASIC RULES OF BOOLEAN ALGEBRA 169
4.4.8 PROPERTIES OF BOOLEAN ALGEBRA 170
4.4.9 DE-MORGAN’S THEOREM 170
4.4.10 ALGEBRAIC SIMPLIFICATION 174
4.5 K-MAP 185
4.5.1 CANONICAL AND STANDARD FORMS 185
4.5.2 STANDARD FORM 186
4.5.3 MIN TERMS 186
4.5.4 MAXTERM 187
4.5.5 TWO-VARIABLE KARNAUGH MAPS 188
4.5.6 THREE-VARIABLE KARNAUGH MAPS 189
4.5.7 FOUR VARIABLE K-MAP 189
4.5.8 FIVE-VARIABLE KARNAUGH MAPS 192
4.5.9 SIX VARIABLE K-MAP 193
4.5.10 DON’T-CARE CONDITION 194

i
Unit-4 DIGITAL ELECTRONICS

UNIT
DIGITAL
ELECTRONICS
SYLLABUS
Digital Electronics: Number system & representation, Binary arithmetic, Introduction of Basic
and Universal Gates, using Boolean algebra simplification of Boolean function. K Map
Minimization up to 6 Variables.

4.1. Introduction
There are two types of signals, one is the analog or continuous signal and the second one is
discrete or digital signal.

Analog Signal

Figure 1: Analog signal


 An analog signal is one which varies continuously with respect to time.
 The maximum and minimum values of the analog signals can be either positive or
negative.

Examples: Audio/Sound Signals, Temperature, Pressure, Light, Sine wave, Square wave,
Triangular wave etc.

Note: The square wave is not a digital signal because it has got both maximum value (Positive)
and minimum value (Negative) as shown in Figure 2 below.

Figure 1: Analog signal: Sine and Square wave

Page | 142
Unit-4 DIGITAL ELECTRONICS
Digital Signal

Figure 3: Digital signal


A digital signal is one whose amplitude does not vary continuously with respect to time.
It has two discrete states: HIGH (5V), logic high and LOW (0V), logic low.
The HIGH is represented by bit ‘1’ and LOW is represented by bit ‘0’ as shown in the
figure 5.3.
Examples: Clock signals in digital circuits, Text, Integers, Images etc.

4.1.1 Difference between analog and digital signal:


Sl.
Analog signal Digital Signal
No.

1.

2. Continuous Discrete
Independent variable t, dependent Independent variable t, dependent
3.
variable is the amplitude variable is the amplitude
It can have infinite number of values in It can have only a limited number of values
4.
a range (0 & 1)
5. Requires less bandwidth Requires large bandwidth
6. Low level of security High level of security
7. Low noise immunity High noise immunity
Examples: Audio signals, Temperature,
Examples: Clock signals in digital circuits,
8. Pressure, Light, Sine wave, Square
Text, Integers, Images etc.
wave, Triangular wave etc.

4.2 Number Systems


There are four number systems in arithmetic, they are:
1) Decimal number system
2) Binary number system
3) Hexadecimal number system
4) Octal number system.

General rule for representing numbers in any number system is.


bn bn-1…….. b2 b1 b0 = bnrn + bn–1 rn–1 +……. b2r2 + b1r1 + b0r0,
where
bn, bn–1 ……. b0  Digits
b0  LSD Least significant Digit
bn  MSD Most significant Digit
r  Base of number system

4.2.1 Decimal number system


 Decimal number system consists of 10 digits from 0 to 9. These digits can be used to
represent any numerical value.
 Decimal number system is the base 10 system that we use every day.

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Unit-4 DIGITAL ELECTRONICS
 Decimal numbers uses 10 digits, i.e., 0 to 9. It also requires a dot (decimal point) to
represent decimal fractions.
 The decimal system is a positional-value system, wherein each decimal digit has its own
value expressed as a power of 10.
For example, the binary number (1245.984) 10 representation in power of 10 is as shown
below.
Table 1: Base 10 representation
Decimal
103 102 101 100 10-1 10-2 10-3
point
1 2 4 5 . 9 8 4
1 × 103 2 × 102 4 × 101 5 × 100 . 9 × 10-1 8 × 10-2 4 × 10-3
1000 + 200 + 40 + 5 . 0.9 + 0.08 + 0.004
(1245.984)10

4.2.2 Binary number system


 The binary number system is also known as base 2 system. It has two digits ‘0’ and ‘1’,
called as binary bits.
 The binary system is also a positional-value system, wherein each binary digit has its
own value expressed as a power of 2.
 The binary number system is used in the computer systems.
For example, the binary number (1001.111)2 representation in power of 2 is as shown
below
Table 1: Base 2 representation
23 22 21 20 2-1 2-2 2-3
1 0 0 1 . 1 1 1
1 x 23 0 x 22 0 x 21 1 x 20 . 1 x 2-1 1 x 2-2 1 x 2-3
1x8 0x4 0x2 1x1 . 0.2 0.02 0.002
8 + 0 + 0 + 1 . 0.2 + 0.02 + 0.002
(9.222)10

4.2.3 Octal number system


 The octal number system has a base of 8. It has eight digits, i.e., 0,1,2,3,4,5,6,7.
 The octal system is also a positional-value system, wherein each digit has its own value
expressed as a power of 8.
 The octal number system is very important in digital computer works.
 For example, the octal number (4567.123) 8 representation in power of 8 is as shown
below.
Table 1: Base 8 representation
83 82 81 80 8-1 8-2 8-3
4 5 6 7 . 1 2 3
4 x 83 5 x 82 6 x 81 7 x 80 . 1 x 8-1 2 x 8-2 3 x 8-3
4 x 512 5 x 64 6x8 7x1 . 0.8 0.16 0.024
2048 + 320 + 48 + 7 . 0.8 + 0.16 + 0.024
(2423.984)10

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Unit-4 DIGITAL ELECTRONICS
4.2.4 Hexadecimal number system
 The Hexadecimal number system has a base of 16. Thus, it has 16 digits, i.e.,
0,1,2,3,4,5,6,7,8,9,A,B,C,D,E & F.
 The Hexadecimal system is also a positional-value system, wherein each digit has its
own value expressed as a power of 16.
For example, the Hexadecimal number (456A.12B) 16 representation in power of 16 is as
shown below

Table 5.4.4: Base 16 representation


163 162 161 160 16-1 16-2 16-3
4 5 6 A . 1 2 B
4 x 163 5 x 162 6 x 161 10 x 160 . 1 x 16-1 2 x 16-2 11 x 16-3
4x
5 x 256 6 x 16 10 x 1 . 1.6 0.32 0.176
4096
16384 + 1280 + 96 + 10 . 1.6 + 0.32 + 0.176
(17772.096)16

Relationship between decimal, binary, octal and hexadecimal

Note:

Table 5.4.6: Decimal, Binary, Octal and Hexadecimal numbers

Decimal Binary Octal Hexadecimal


0 0000 0 0
1 0001 1 1
2 0010 2 2
3 0011 3 3
4 0100 4 4
5 0101 5 5
6 0110 6 6
7 0111 7 7
8 1000 10 8
9 1001 11 9
10 1010 12 A
11 1011 13 B
12 1100 14 C
13 1101 15 D
14 1110 16 E
15 1111 17 F
Conversion between Decimal, Hexadecimal, Binary and Octal numbers

Problem 1:
Binary to Decimal Conversion
i) (1110111)2
(1110111)2 = 1x26 + 125 +124 + 023 + 122 + 121 + 120
= 64 + 32 + 16 + 0 + 4 + 2 + 1
= (119)10
ii) (11101.10111)2
(11101.10111)2 = 124 +123 +122+021+120+121+022+123+124+125
= 16+8+4+0+1+ (1/2) +0+ (1/8) + (1/16) + (1/32)
= (29.71875)10

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Unit-4 DIGITAL ELECTRONICS
iii) (110110)2(11101.10111)2 = 124 +123
+12 +02 +12 +12 +02 +12 +124+125
2 1 0 1 2 3

= 16+8+4+0+1+ (1/2) +0+ (1/8) + (1/16) + (1/32)


= (29.71875)10

(110110)2 = 125 +124 +023 + 122+ 121+ 020


= 32 +16 + 0 + 4 + 2 + 0
= (54)10
iv) (110001101)2
(110001101)2 = 1 28 + 1 27 + 0 26 + 0 25 + 0 24 + 1 23 + 1 22 + 021
+ 120
= 256 +128 + 0 + 0 + 0 + 8 + 4 + 1
= (397)10
v) (0.0110111)2
(0.0110111)2 = 0 21+ 1 22+ 1 23 + 0 24 + 1 25 + 1 26
= 0 +(1/4) + (1/8) + (1/32) + (1/64) + (1/128)
= 0 + 0.25 + 0.125 + 0.03125 + 0.015625 + 0.0078125
= (0.4296875)10
vi) (1110111.101)2
(1110111.101)2 = 1 26 + 125 + 124 + 023 + 122 + 121 + 120 + 121
+ 022+ 123
= 64 + 32 + 16 + 0 + 4+ 2 + 1 + 0.5 + 0 + 0.125
= (119.625)10

Problem 2:
Convert the following into its equivalent decimal numbers:
We can convert the numbers with any base (radix) into its equivalent decimal.
(476.26) 8 = 482 + 781 + 680 + 281 + 682
= 256 + 56 + 6 + (2 x 1/8) + (6 x 1/64)
= (318.328125)10

(AB2.1B)16 = A (10) 162 + B (11) 161 + 2 160 + 1  161 + B (11)  162


= 2560 + 176 + 2 + (1x1/16) + (11 x 1/256)
= 2560 + 176 + 2 + 0.0625 + 0.04296875
= (2738.10546)10

(4102.10)4 = 443 + 142 + 041 + 240 + 141 + 042


= 256 + 16 + 0 + 2 + (1/4) + (0 x 1/16)
= (274.0625)10

(666.15)7 = 6  72 + 6  71 + 6  70 + 1  71+ 5  72


= 294 + 42 + 6 + (1/7) + (5 x 1/49)
= 294 + 42 + 6 + 0.142857 + 0.102
= (342.24486)10
Problem 3:
Decimal to Binary conversion
(29)10 = (?)2 (25.3)10 = (?)2
= (11101)2 = (11001.01)2

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Unit-4 DIGITAL ELECTRONICS
0 .3  2
0
0.6
0 .6  2
1
1 .2

Problem 4:
Decimal to octal conversion
1) (416.11)10= (?)8

0.11  8 0.88  8 0.04  8 0.32  8 0.56  8


0 7 0 2 1
0.88 7.04 0.32 2.56 1.12
(416.11)10= (640.07021)8

Problem 5:
Decimal to Hexadecimal conversion
(3509)10 = (?)16
= (DB5)16

1) (2604.105)10= (?)16
The whole numbers part is converted by repeated, division by 16.

(2604)10= (A2C) 16
The fraction part is converted by repeated multiplication by 16 and by keeping track of the
integer.
0.105  16
1
1.68
0.68  16
 10 ( A)
10.88
0.88  16
 14( E )
14.08
(0.105)10 = (.1AE) 16
 (2604.10546875)10 = (A2C.1AE) 16

Problem 6:
Binary to Octal
Table 5.8: Binary to octal

Octal Binary
numbers equivalent
0 000
1 001
2 010
3 011
4 100
5 101
6 110
7 111

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Unit-4 DIGITAL ELECTRONICS
 For binary to octal conversion of whole numbers group, the given binary number in
groups of those three starting from the right most (LSB) and replace each group by the
octal number shown in above table.
 For conversion of fraction part, make group of three starting with LSB.

1) (01101111)2= (?)8

Binary Digital Value (01101111)2


Group the bits into three’s 01 101 111
starting from the right hand side
001 101 111
1 5 7
Whole Number
Append ‘0’ to last group
(MSB). because it has only two
bits.

Octal Number form (157)8

2) (11100.0110110)2 = (?)8

Binary Digital Value (11100.0110110)2


Group the bits into three’s for whole 11100 . 0110110
and fraction number as shown below.
11 100 . 011 011 0
011 100 . 011 011 000
Whole . Fraction
3 4 . 3 3 0
part part
Append ‘0’ to last Append ‘00’ to
11100 . 0110110
group because it has last group
. only two bits. because it has
only one bits.
Octal Number form (34.330)8

Problem 7:
Octal numbers to binary
To convert octal to binary, simply replace each octal number by its equivalent binary bits.
Octal 0 1 2 3 4 5 6 7
Binary 000 001 010 011 100 101 110 111

1) (717)8 = (?)2
(717)8 = 111 001 111
(717)8 = (111001111)2

2) (366.025)8 = (?)2
(366.25)8 = 011 110 110 . 000 010 101
= (011110110.000010101)2

3) (0.776)8 = (?)2
(0.776)8 = (0. 101 111 110)2
(0.776)8 = (0.101111110)2

Page | 148
Unit-4 DIGITAL ELECTRONICS
Problem 8:
Convert the following into its equivalent numbers
1) Convert
i) (284.66)10= (?)8= (?)16

(Integer part) 284 . 66 (Fraction part)

0.66  16
 10  A
10.56
MSD
0.56  16
8 
8.96
LSD
wkt 0.96  16
 15  F
12 – C 15.36 wkt
10 – A, 15 - F

11C . A8F
(11C.A8F) 16

(284.65)10 = (11C.A8F) 16

(11C.A8F)16 = 000 100 011 100. 101 010 001 111


(11C.A66)16 = (0434.5217)8
(284.65)10 = (0434.5217)8= (11C.A8F) 16

ii) Convert (ABEF) = (?)2 = (?)10


(FBFA) 16 = (1111 1011 1111 1010)2
(FBFA) 16 = (15163) + (11162) + (15161) + (10160)
(FBFA) 16 = (64506)10
(FBFA) 16 = (1111 1011 1111 1010)2= (64506)10

2) i) (532.66)10=(?)16 = (?)2
Integer Part: Fraction part :
0.66  16
10  A
10.56
MSD
0.56  16
8 
8.96
(2114)16 LSD
0.96  16
 15  F
15.36

(.A8F)16
(532.66)10 = (2114.A8F)16
(2114.466)16 = (0010 0001 0100.1010 1000 1111)2
(532.66)10 = (2114.A8F)16= (0010 0001 0100.1010 1000 1111) 2

ii) (ABCD) 16 = (?)2= (?)8


(FABCD) 16 = (1111 1010 1011 1100 1101)2
(011,111,010, 101, 111, 001,101) 2 = (3725715)8
(FABCD) 16 = (011111010101111001101) 2
= (3725715)8

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Unit-4 DIGITAL ELECTRONICS
3) Perform the following
i) (55.6)8 = (?)2= (?)16
(55.6)8 = (101101.110)2= (0010 1101. 1100) = (2D.C)16

ii) (192)16 = (?)8 = (?)10


(192)16 = 0001 1001 0010
(192)16 = 000 110 010 010 = (622)8
(192)16 = (1162) +(9161) +2160) = (402)10

Problem 9:
Carryout the following conversions:
i) (F9AC.5D8B) 16 = (?)10
F = 15, A = 10, B= 11, C = 12, D = 13

(F9AC.508B) 16 = [F (15) 163] + [9 162] + [A (10) 161] + [C(12)  160] +


[5  161] + [D (13)  162] + [8  163] + [B (11)  164]
= (63916.36532)10

ii) (457.248)16 =(?)10


(457.248)16 = (4 82) + (5 81) + (7 80) + (2  81) + (4  82) + (8  83)
(457.248)16 = (303.32226)10

Convert
i) (2AB.8)16 =(?)10 =(?)8
(2AB.8)16 = 2 162 + A(10) 161 + B(11) 160 + 8 161
= (683.5)10
= 001 010 101 011 . 100 0
1 2 5 3 . 4 0
= (1253.40)10
(2AB.8)16 = (683.5)10 = (1253.40)10

ii) (764.352)8= (?)16 = (?)8


(764.352)8 = 111 110 100 . 011 101 010
= 1F4.75
(764.352)8 = (1F4.75)16 = (111110100 . 011101010)2

Problem 10:
Convert the following
i) (101010.101)2 =(?)10
(101010.101)2 = 125 + 024 + 123 + 022 + 121 + 020 + 121+ 022+ 123
(101010.101)2 = (42.625)10
ii) (7034)8 =(?)10
(7034)8 = 783 + 082 + 381 + 480
(7034)8 = (3612)10
iii) (2616)10 = (?)16

(2616)10 =(A38)16

iv) (934)10 = (?)8

(934)10 = (1646)8

Page | 150
Unit-4 DIGITAL ELECTRONICS
Problem 11:
Convert the following
i) (A3B)16 = (?)10 A = 10, B = 11
(A3B)16 = 10 162 + 3 161 + 11 160
(A3B)16 = (2619)10

ii) (2F3)16 =(?)10 F = 15


(2F3)16 = (2162)+(15161) +(3160)
(2F3)16 = (755)10

Solve
i) (0.7642)10= (?)12
0.7642  2
 1 MSD 
1.5284
0.5284  2
1
1.0568
0.0568  2
0
0.1136
0.1136  2
0
0.2272
0.2272  2
0
0.4544
0.4544  2
0
0.9088
0.9088  2
1
1.8176
0.8176  2
 1 LSD 
1.6352
, (0.7642)10 = (0.11000011)2

ii) (ADECB)16 = (?)8


= (10, 101, 101, 011, 011, 001, 011) 2
(ADECB)10 = (2557313)8

iii) (11011.1011)2 = (?)8


= 11,011.101.1
3 3 5 K
(11011.1011)2 = (33.54)8

iv) (1011.1101)2 = (?)10


= (123) +(022)+120) +(120) +(1x2-1)
+ (12-2) +(0-23) +02-4) + (12-5)
= (13.78125)10
(1011.11001)2 = (13.78125)10

Problem 12:
Convert (10110011010)2 into octal decimal and hexadecimal
(10110011010)2 = (?)8 = (?)10 = (?)16

10,110,011,010 = (2632)8
101, 1001, 1010 = (59A)16.
= (12-10) +(029) +128) +(127) +(020) +(025)
+(124)+(123)+(022)+(121)+020

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Unit-4 DIGITAL ELECTRONICS
= (1.434)10
 (10110011010)2 = (2632)8=(59A)16 =(1434)10

Problem 13:
Convert the following binary numbers to decimal numbers.
i) (1101)2 = (123) +(122) +(024) +(120) = (13)10
ii) (10001)2 = (124) +(023) +(022) +(021) +(120) = (17)10
iii) (10101)2 = (124) +(023) +(122)+(122)+021)+120) = (21)10

Problem 14:
Convert
i) (𝟓𝟐𝟔. 𝟒𝟒)𝟖 = (? )𝟐 = (? )𝟏𝟎
ii) (𝟒𝟖𝟑𝟓𝟎)𝟏𝟎 = (? )𝟏𝟔 = (? )𝟖

Solution:
i) (526.44)8 = (101 010 110.100 100)2 = (342.5625)10
ii) (48350)10 = (BCDE)16 = (1011110011011110)8

Problem 15:
Convert the following
i) Convert A6B.F5 to Binary.
ii) Convert binary 𝟏𝟏𝟎. 𝟏𝟏𝟏 into decimal equivalent.

Solution:
i) (A6B.F5 16 = (1010 0110 1011.11110101)2
ii) (110.111)2 = (6.875)10

Problem 16:
Convert the following
i) (𝟏𝟕𝟐. 𝟔𝟐𝟓)𝟏𝟎 = (? )𝟐
ii) (𝐀𝐁𝐂𝐃. 𝟕𝟐)𝟏𝟔 = (? )𝟖
iii) (𝟏𝟎𝟏𝟏𝟏𝟏𝟎𝟏. 𝟎𝟏𝟎𝟏)𝟐 = (? )𝟏𝟎
Solution:
i) (𝟏𝟕𝟐. 𝟔𝟐𝟓)𝟏𝟎 = (? )𝟐

ii) (𝐀𝐁𝐂𝐃. 𝟕𝟐)𝟏𝟔 = ( )𝟖


Convert HEX to binary
A B C D . 7 2
1010 1011 1100 1101 ⋅ 0111 0010

001, 010, 101, 111, 001, 101 . 011, 100, 100


1 2 5 7 1 5 . 3 4 4

∴ (𝐀𝐁𝐂𝐃. 𝟕𝟐)𝟏𝟔 = (𝟏𝟐𝟓𝟕𝟏𝟓. 𝟑𝟒𝟒)𝟖

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iii) (𝟏𝟎𝟏𝟏𝟏𝟏𝟎𝟏. 𝟎𝟏𝟎𝟏)𝟐 = (? )𝟏𝟎
(1 × 27 ) + (0 × 26 ) + (1 × 25 ) + (1 × 24 ) + (1 × 23 ) + (1 × 22 ) + (0 × 21 )
+(1 × 20 ) ⋅ (0 × 2−1 ) + (1 × 2−2 ) + (0 × 2−3 ) + (1 × 2−4 )
128 + 0 + 32 + 16 + 8 + 4 + 0 + 1.0 + 0.25 + 0 + 0.06 = (𝟏𝟖𝟗. 𝟑𝟏)𝟏𝟎

(𝟏𝟎𝟏𝟏𝟏𝟏𝟎𝟏. 𝟎𝟏𝟎𝟏)𝟐 = (𝟏𝟖𝟗. 𝟑𝟏)𝟏𝟎

Problem 17:
Convert (𝟏𝟏𝟎𝟏𝟏𝟎𝟏)𝟐 = ( )𝟏𝟎 and (𝟔𝟗)𝟏𝟎 = ( )𝟐
Solution:
(1101101)2 = 1 × 26 + 1 × 25 + 0 × 24 + 1 × 23 + 1 × 22 + 0 × 21 + 1 × 20
= 64 + 32 + 0 + 8 + 4 + 0 + 1
(1101101)2 = (109)10

Problem 18:
Convert (𝟏𝟎𝟏𝟎𝟏𝟏𝟏𝟎𝟏𝟏𝟏𝟏𝟎𝟏𝟎𝟏)𝟐 = (𝐉𝟏𝟔 and ( FA876 )𝟏𝟔 = ( )𝟐
(FA876)16 = (1111,1010,1000,0111,0110)2

Problem 19:
Convert: i) (𝟑𝟒𝟐. 𝟓𝟔)𝟏𝟎 = (? )𝟐 = (? )𝟖
ii) (𝐵𝐶𝐷𝐸) = (? )2 = (? )𝑠
Ans: 1) (342.56)10 = (101010110.100011)2 = (526.4)8
ii) (BCDE) = (101111001101 1110)2 = (136336)8

Problem 20:
Convert i) (𝟐𝟗𝟒. 𝟔𝟖𝟕)𝟏𝟎 = (? )𝟖 ii) (𝟑𝟓𝟔𝟏𝟓)𝟖 = (? )𝟐 = (? )𝟏𝟎

Solution:
i) (294.687)10 = (? )8

ii) (356.15)8 = (? )2 = (? )10


(356.15)8 = (011101110.001101)2
(356.15)8 = (? )10
= 3 × 82 + 5 × 81 + 6 × 80 + 5 × 8−2 = 192 + 46 + 6 + 0.125 + 0.078

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(356.15)8 = (238.203)10
(356.15)8 = (011101110.001101)2

Problem 21:
Convert the following
i) (25.628)10 to (? )2
ii) (75.62)8 to (? )16

Solution:
i) (25.628)10 to (? )2

(𝟏𝟏𝟎𝟎𝟏. 𝟏𝟎𝟏)𝟐

ii) (75.62)8 = (? )16


Solution:

(75.62)8 = 111101 ⋅ 110010


= 00111101 ⋅ 11001000
(75.62)8 = (3𝐷 ⋅ 𝐶8)16

Problem 22:
Convert the following:
i) 1101101.101011 to hexadecimal
ii) (134.69)8 = (? )2
iii) (345 ⋅ 𝐴𝐵)16 = (? )10
iv) 2135.67)8 = (? )10
Solution:
i) 1101101.1010111 = 0110,1101.1010,1100 = (6D ⋅ AC)16
ii) (134.67)8 = (001011100,110111)2
iii) (345. AB)16 = (837 ⋅ 66796)10
iv) (2135.67)8 = (1117.859375)10

Problem 23:
Perform the following conversions:
i) (1234.56)8 = (? )10
ii) (10110101001.101011)2 = (? )6
iii) (988.86)10 = (? )2 iv) (5332.65)10 = (? )16

Solution:
i) (1234.56)8 = (? )10
= 1 × 83 + 2 × 82 + 3 × 81 + 4 × 80 + 5 × 8−1 + 6 × 8−2
= 512 + 128 + 24 + 4 + 0.625 + 0.0093
(1234.56)8 = (668.718)10

ii) (𝟏𝟎𝟏𝟏𝟎𝟏𝟎𝟏𝟎𝟎𝟏. 𝟏𝟎𝟏𝟎𝟏𝟏)𝟐 = (? )16


0101. 1010, 1001. 1010, 1100 = (5A9 ⋅ AC)16

iii) (988.86)10 = (? )2

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4.2.5 Determine the base ‘x’ of a given number system

Determine the value of base x


(100)𝑥 = (61)8
1 × x 2 + 0 × x1 + 0 × x 0 = 6 × 81 + 1 × 80
x 2 = 48 + 1
x 2 = 49
x=7
𝟏𝟎𝟎)𝟕 = (𝟔𝟏)𝟖

Determine the value of base x


(100)𝑥 = (16)10
1 × x 2 + 0 × x1 + 0 × x 0 = 1 × 101 + 6 × 100
x 2 = 10 + 6
x 2 = 4916
x=4
𝟏𝟎𝟎)𝟒 = (𝟔𝟏)𝟖

4.3 Binary Arithmetic


4.3.1 Binary Addition

There are four basic cases of binary addition:


1) 0 + 0 = 0
2) 0 + 1 = 1
3) 1 + 0 = 1
4) 1 + 1 = 10 (Carry =1, Sum = 0)

Problem 24:
Add the following
1) (13)10 and (11)10
Sol.:
Step 1: Convert Decimal numbers into binary.
13 = 1101
11 = 1011

Step 2: Perform addition.


1 1
1 1 0 1
+ 1 0 1 1

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1 1 0 0 0

Sum of (13)10 and (11)10= (24)10 = (11000)2

2) (4.25)10 and (5.57)10


Sol.:
Step 1: Convert Decimal numbers into binary.
(4.25)10 = (100.01)2
(5.57)10 = (101.11) 2
Step 2: Perform addition.
1 1 1 1
1 0 0 . 0 1
+ 1 0 1 . 1 1

1 0 1 0 . 0 0

Sum of (4.25)10 and (5.57)10 = (10)10 = (11000)2

3) (111.111)2 and (110)2


Sol.:
1 1
1 1 1 . 1 1 1
+ 1 1 0 . 0 0 0

1 1 0 1 . 1 1 1

Sum of (111.111)2 and (110)2 = (1101.111)2

4.3.2 Binary Subtraction


There are 4 basic cases of binary subtraction

1) 0 - 0 = 0
2) 0 - 1 = 1 (Taking Borrow)
3) 1 - 0 = 1
4) 1 - 1 = 0

1) (1101)2 -(1011)2
Sol.:
1 1 0 1
- 1 0 1 1

0 0 1 0
The result of (1101)2 - (1011)2 = (0010)2

2) (1001)2 -(1010)2
Sol.:
B 0 1
1 0 0 1
- 1 0 1 0

0 0 1 1
The result of (1001)2 - (1010)2 = (0011)2

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4.3.3 Complement of Binary Numbers
1st complement
The 1st complement of any binary number is obtained by changing each 0’s in the number by
1 and each 1’s in the number by a 0.
Ex: 1) 1000 1’s complement is 0111
2) 11010100 1’s compliment is 00101011

4.3.4 Subtraction using 1’s compliment


Procedure:
1) Get the 1’s complement of subtrahend
2) Add it with minuend.
3) If carry is present add it to the result, answer is positive.
4) If carry is not present, take 1 st complement of the result and place “a negative sign with
result”.

Problem 25:
Find Subtraction of 10010 and 1101 using 1's complement method

Sol.:
Step 1: Take 1's Complement of 01101 = 10010
Step 2: Add it with Minuend
1 1
1 0 0 1 0
+ 1 0 0 1 0

1 0 0 1 0 0
Step 3: Add carry to the result and answer is positive
0 0 1 0 0
+ 0 0 0 0 1

0 0 1 0 1
Final answer = (00101)2
Problem 26:
Find Subtraction of 1101011 and 1110101 using 1's complement method
Sol.:
Step 1: Take 1's Complement of 1101011 = 0001010
Step 2: Add it with Minuend
1 1
1 1 0 1 0 1 1
+ 0 0 0 1 0 1 0

1 1 1 0 1 0 1
Step 3: No Carry. Answer is negative.
Step 4: Take 1st complement of the result and place “a negative sign with result”.
1 1 1 0 1 0 1

0 0 0 1 0 1 0

Final answer = - (0001010)2

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4.3.5 2’s complement:
Take 1’s complement of a number and add 1 to it, to get 2’s complement

1) 1110
Sol.: 1110 0001  1’s complement
+ 1  Add 1.
0010  2’s complement

4.3.6 Subtraction using 2’s complement


Procedure:
1) Determine the 2’s complement of subtrahend
2) Add it with minuend
3) If there is a carry, discard it. Answer is positive.
4) If there is no carry. Answer is negative. Taking 2’s complement of the result and place a
negative sign with result.

Problem 27:
Find Subtraction of 10010 and 01101 using 2's complement method
Sol.:
Step 1: Take 2's Complement of subtrahend 01101

Take 1’s Complement of 01101 = 10010 and add 1 to it.

1 0 0 1 0
+ 1

1 0 0 1 1

Step 2: Add it with Minuend


1 1
1 0 0 1 0
+ 1 0 0 1 1

1 0 0 1 0 1

Step 3: If there is a carry, discard it. Answer is positive.

00101

Final answer = + (00101)2

Problem 28:
Find Subtraction of 110000 and 110101 using 2's complement method
Sol.:
Step 1: Take 2's Complement of subtrahend 110101

Take 1’s Complement of 110101 = 001010 and add 1 to it.

0 0 1 0 1 0
+ 1

0 0 1 0 1 1

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Step 2: 2's Complement result is added with Minuend

1 1 0 0 0 0
+ 0 0 1 0 1 1

1 1 1 0 1 1

Step 3: There is NO carry. Answer is negative. Taking 2’s complement of the result and
place a negative sign with result.

Taking 1’s Complement of result 111011 = 000100


Add 1 to 1’s Complement

0 0 0 1 0 0
+ 1

0 0 0 1 0 1

Final answer = - (00101)2

Problem 29:
Add 125 and  68 using 2’s complement
Sol.:
Convert decimal numbers to its equivalent binary numbers
(125)10 = (1111101)2
(68)10 = (1000100)2

Step 1: (1111101)2 - (1000100)2


Taking 2’s Complement of Subtrahend
1’s Complement of Subtrahend 1000100 = 0111011
Add 1 to 1’s Complement result
1 1
0 1 1 1 0 1 1
+ 1

0 1 1 1 1 0 0

Step 2: 2's Complement result is added with Minuend

1 1 1 1 1
1 1 1 1 1 0 1
+ 0 1 1 1 1 0 0

1 0 1 1 1 0 0 1
Step 3: If there is a carry, discard it. Answer is positive.

0111001

Final answer = + (0111001)2

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Problem 30:
Subtract (1011011)2 from (100110)2 using 2’s complement method.
Sol:
i) Taking 2’s complement of subtrahend
101011  010100
1
2’s complement 010101
ii)
100110
 010001
111011
iii) No carry  Answer is –ve
iv) Taking 2’s complement of the results and place –ve sign.

111011  000100
1
 (000101) 2
  (000101) 2

Problem 31:
Use 2’s complement to perform i) (1111-1101)
Solution:

Step 1: 1101  0010


1
0011  2’s complement

Step 2: 1101  0010


 0011
1 0010
Answer is 0010 and is +ve.

ii) (10111-10011)

Step 1: 10011  01100


 1
01101
2’s complement.
Step 2: 10111
01101
00100
Answer is 00100 and is +ve.

iii) (1101-1001)
Step 1: 1001  0110
 1
0111
2’s complement.

Step 2: 1101
0111
1 0100
Answer is 0100 and is +ve.

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Problem 32:
Carryout subtraction using 2’s complement (11001-101101)2

Step 1: 101101  010010


 1
0111
2’s complement.
Step 2: 011001
010011
101100
Step 3: No carry  Answer is –ve
Step 4: Taking, 2’s complement of the result and place –ve sign

101100  010011
 1
 010100
 Answer is 010100 and is – Ve.

Problem 33:
Subtract (111001)2 from (101011)2 using 2’s complement method.
(101011)2 – (111001)2.
Step-1: 111001  000110
 1
000111  2’s complement.
Step-2: 101011
000111
110010  2’s complement.

Step 3: 001101
1
 001110
Problem 34:
Perform using 2’s complement 48-23

Sol.: (48)10  (110000)2


(12)10  (010111)2
i.e., (110000 – 010111)2.
Step-1: 010111  101000
 1
101001  2’s complement.
Step-2: 110000
101001
1 011001
Step-3: Carry is there, discard it and answer is +ve +(011001) 2

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Problem 35:
Subtract using 2’s complement
i) 4-9
Soln : 40100
91011
(0100-1001)
Step 1: 1001  0110

 1 2’s complement.
0111
Step 2 : 1100
 0111
1011
Step 3: 1011  0100
1
 0101
-(0101)

ii) (8-2) 81000


2 0010
(1000-0010)
Step 1: 10010  1101
 1
1110
Step 2: 1000
1110
[1] 0100
Step 3: +0110

Problem 36:
Subtract using 2’s complement (15-7)10
(15)10  (1111)2
(7)10  (0111)2
(1111 -0111)

Step 1: 0111 1000

 1
1001
Step 2: 1111
 1001
1 1000
Step 3: +1000

Problem 37:
Subtract using 2’s complement (66-64)
(66)10  (1000010)2
(64)10  (1000000)2
(1000010-1000000)2

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Step1:100000  0111111
1
2’s complement.
1000000
Step 2: 1000010
1000000
[1] 0000010
Step 3: +0010

Problem 38:
Subtract (1111.101) )𝟐 from (1001.101) )𝟐 using 1's complement method.

Solution:
(1001.101)2 − (1111.101)2

Step 1: Taking l's complement of subtrahend


(0000.010)
Step 2: Add l's complement result with minuend
1 0 0 1 . 1 0 1
0 0 0 0 . 0 1 0
1 0 0 1 . 1 1 1
Step 3: No carry. So taking l's complement of the result and place negative sign.
−(𝟎𝟏𝟏𝟎. 𝟎𝟎𝟎)𝟐

Problem 39:
Subtract (11101.111) from (11111.101) )𝟐 using 2's complement method.

Solution:
(11111.101)2 − (11101.111)2

Step 1: Taking 2's complement of subtrahend


0 0 0 1 0 . 0 0 0
1
0 0 0 1 0 . 0 0 1

Step 2: Add 2's complement result with minuend


1 1 1 1 1
1 1 1 1 1 . 1 0 1
0 0 0 1 0 . 0 0 1
1 0 0 0 0 1 . 1 1 0
Step 3: Discard the carry: (00001.110)2

Problem 40:
Subtract (111) from (𝟏𝟎𝟏𝟎)𝟐 using 1’s complement and 2's complement method.
Solution:
i) (1010)2 − (111)2 using I's somplement
1010
- 0111 ← Subtrahend

Step 1: Taking 1's complement of subtrahend


0111 ⟶ 1000
Step 2: Add 1's complement result with minuend.
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1 0 1 0
1 0 0 0
(1) 0 0 1 0

Step 3: Add the carry with result


0 0 1 0
1
(𝟎 0 1 𝟏)𝟐

ii) (1010)2 − (111)2 using 2 's complement

Step 1: Taking 2′ s complement of subtrahend


First taking ones complement of subtrahend
𝟎𝟏𝟏𝟏⟶ 𝟏𝟎𝟎𝟎

1 0 0 0
1
1 0 0 1

Step 2: Add 2's complement result with minuend


1 0 1 0
1 0 0 1
(1) 0 0 1 1
Step 3: Discard carry and result is positive
Step 4: +(𝟎𝟎𝟏𝟏)𝟐

4.4 Logic Gates


 A logic gate is an elementary building block of a digital circuit. At any given moment,
every terminal is in one of the two binary conditions LOW (0) or HIGH (1), represented
by different voltage levels.
 The different types of gates are: NOT, AND, NAND, OR, NOR, EXOR and EXNOR gates.

4.4.1 Basic Gates


The AND, NOT and OR gates are called basic gates because we can implement (or create) any
logic gate or any Boolean expression by combining them.

Table 1 Logic gates, Truth table and its descriptions.


GATE LOGIC SYMBOL TRUTH TABLE Explanation
The NOT gate is an electronic circuit
A Y= A that produces an inverted version of
0 0 the input at its output. It is also
NOT
known as an inverter. If the input
1 0 variable is A, the inverted output is
known as NOT A.

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The AND gate is an electronic circuit
that gives a high output (1) only if
A B Y=AB
all its inputs are high. A dot (.) is
0 0 0 used to show the AND operation, i.e.,
AND 0 1 0 A.B
1 0 0 Note: This dot is sometimes omitted,
1 1 1 i.e., AB

This is a NOT-AND gate which is


A B Y= A.B equal to an AND gate followed by a
0 0 1 NOT gate. The outputs of all NAND
gates are high if any of the inputs
NAND 0 1 1
are low.
1 0 1 Note: The symbol is an AND gate with
1 1 0 a small circle on the output. The small
circle represents inversion.
The OR gate is an electronic circuit
A B Y=AB
that gives a high output (1) if one or
0 0 0 more of its inputs are high. A plus
OR 0 1 1 (+) is used to show the OR operation.
1 0 1
1 1 1
This is a NOT-OR gate which is equal
A B Y= A  B to an OR gate followed by a NOT
0 0 1 gate. The outputs of all NOR gates
NOR 0 1 0 are low if any of the inputs are high.
1 0 0 Note: The symbol is an OR gate with a
1 1 0 small circle on the output. The small
circle represents inversion.
Y= AB The 'Exclusive-OR' gate is a circuit
A B which will give a high output if
either, but not both, of its two
0 0 0
EX-OR inputs are high. An encircled plus
0 1 1 sign ( ) is used to show the EXOR
1 0 1 operation.
1 1 0
The 'Exclusive-NOR' gate circuit
does the opposite to the EOR gate. It
will give a low output if either, but
A B Y= AB not both, of its two inputs are high.
0 0 1 Note: The symbol is an EXOR gate
EX- with a small circle on the output. The
NOR 0 1 0 small circle represents inversion.
1 0 0
1 1 1

4.4.2 Universal gates:


A universal gate is a logic gate that can be used to construct (implement) all other logic gates.
The NAND and NOR gates are called universal gates because all other logic gates can be
constructed (implemented) using these two gates.

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4.4.3 NAND gate as Universal Gate

Table 1: NAND gate as Universal Gate


NAND Gate
A NAND gate is an inverted AND gate.

NOT
Gate

AND
Gate

OR
Gate

NOR
Gate

XOR
Gate

XNOR
Gate

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4.4.4 NOR gate as Universal Gate

Table 1: NOR gate as Universal Gate


NOR Gate
A NOR gate is logically an inverted OR gate.

NOT
Gate

AND
Gate

OR Gate

NAND
Gate

XOR
Gate

XNOR
Gate

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4.4.5 Realization of gates using only basic gates

Table 1: Realization of gate using only basic Gate

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4.4.6 BOOLEAN ALGEBRA

Boolean algebra is a mathematical technique that provides the ability to simplify logic
expressions. These simplified expressions will result in a logic that is equivalent to the original
circuit, yet requires fewer gates.

4.4.7 Basic Rules of Boolean algebra

Table 1 Basic Rules of Boolean algebra


Sl.
Basic Rules
No.

1. ̅=1
A+A
2. A+A= A
3. A⋅A=A
4. ̅=O
A⋅A
5. A. (B + C) = A. B + A. C

6. A ⋅ B = B. A
7. A+1= 1

8. A⋅1=A
9. A⋅O=O
10. A+O = A
11. A+B = B+A
12. ̅) = B
B. (A + A

13. A+A⋅B = A

14. A. (A + B) = A

15. ̅⋅B = A+B


A+A
16. ̅ + B) = A. B
A. (A

17. ̅̅̅̅̅̅̅
A+B = A ̅⋅B
̅

18. ̅̅̅̅̅̅̅
A+B = A ̅+B
̅

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4.4.8 Properties of Boolean algebra:
There are three properties of Boolean algebra
i) Commutative property
ii) Associate Property
iii) Distributive property

i) Commutative property:

ii) Associate Property:

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iii) Distributive property:

4.4.9 DeMorgan’s Theorem

DeMorgan's theorems are extremely useful in simplifying expressions in which a product of


sum or sum of product variables are inverted.

The two theorems are:


1 ̅̅̅̅
AB = A ̅+B̅
̅̅̅̅̅̅̅
2 A + B = AB ̅ ̅

Theorem 1: The compliment of the product of two variables is equal to the sum of the
compliment of each variable. i.e., ̅̅̅̅
AB = A̅+B ̅
̅̅̅̅
AB = A̅+B
̅

Figure 1: Demorgan Theorem

Table 1: Demorgan Theorem


A B ̅̅̅̅
AB ̅
A ̅
B ̅+B
A ̅

0 0 1 1 1 1
0 1 1 1 0 1
1 0 1 0 1 1

1 1 0 0 0 0

Theorem 2: The compliment of the sum of two variables is equal to the product of the
compliment of each variable ̅̅̅̅̅̅̅
A+B = A ̅⋅B
̅

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Figure 2: Demorgan Theorem

Table 2: Demorgan Theorem


A B ̅̅̅̅̅̅̅
A+B ̅
A ̅
B ̅⋅B
A ̅

0 0 1 1 1 1

0 1 0 1 0 0

1 0 0 0 1 0

1 1 0 0 0 0

Problem 41:
State and prove De-Morgan’s theorems for 4 variables
Solution:
De-Morgan’s theorems for 4 variables

Figure 1: De-Morgan Theorem for 4 variables


Table 1: Truth Table
A B C D ̅̅̅̅̅̅̅̅
ABCD ̅+B
A ̅ + C̅ + D
̅

0 0 0 0 1 1

0 0 0 1 1 1

0 0 1 0 1 1

0 0 1 1 1 1

0 1 0 0 1 1

0 1 0 1 1 1

0 1 1 0 1 1

0 1 1 1 1 1

1 0 0 0 1 1

1 0 0 1 1 1

1 0 1 0 1 1

1 1 0 0 1 1

1 1 0 1 1 1

1 1 1 0 1 1

1 1 1 1 0 0

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Unit-4 DIGITAL ELECTRONICS

Figure 2: De-Morgan Theorem for 4 variables


Table 2: Truth Table
A B C D ̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅
A +B+C+D ̅⋅B
A ̅ ⋅ C̅ ⋅ D
̅

0 0 0 0 1 1

0 0 0 1 0 0

0 0 1 0 0 0

0 0 1 1 0 0

0 1 0 0 0 0

0 1 0 1 0 0

0 1 1 0 0 0

0 1 1 1 0 0

1 0 0 0 0 0

1 0 0 1 0 0

1 0 1 0 0 0

1 1 0 0 0 0

1 1 0 1 0 0

1 1 1 0 0 0

1 1 1 1 0 0

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Unit-4 DIGITAL ELECTRONICS
4.4.10 Algebraic Simplification
Additional Rules in Boolean algebra:
These rules are derived from the basic rules & laws of Boolean algebra.
1. A+AB=A
Solution:
A+AB
A [1+B]
A (1)
A+AB=A
2. A+ A B=A+B
Solution:
A+ A B
A+AB+ A B A + AB = A
A+ B (A+ A )
A+ B (1)
A+B
3. (A+B) (A+C) =A+BC
Solution:
(A+B) (A+C)
AA+AC+AB+BC
A+AC+AB+BC
A (1)+BC
A+BC

Problem 41:
Simplification of Boolean algebra:
1. C + BC
Solution:
C + BC
C + (B + C)
(C + C) + B
1+B
1

2. AB (A + B) (B + B)
Solution:
AB (A + B) (B + B)
AB (A + B)
(A + B) (A + B)
A + BB
A

3. A (A + B) + (B + AA) (A + B)
Solution:
A (A + B) + (B + AA) (A + B)
AA + AB + (B + A) (A + B)
A + AB + AB + AA + AB
A + AB
A [1+B]
A

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Unit-4 DIGITAL ELECTRONICS
4. (A + C) (AD + AD) + AC + C
Solution:
(A + C) (AD + AD) + AC + C
(A + C) (AD) + AC + C
AAD + ACD + AC + C
AD + AC [D+1] + C
AD + AC + C
AD + C [A+1]
AD + C

5. Prove A+BC = (A+B) (A+C)


Solution:
A.1 +BC 
A (1+B) +BC (1+B) =1
A+AB +BC (1+A) =1
A+AC +AB +BC (1+C) =1
A.A+AC+AB+BC (A.A) = A
A [A+C] + B [A+C]
[A+C] (A+B)
A+BC = (A+B) (A+C) Hence proved

6. AB + A (B+C) + B (B+C) AB + A (B+C) + B (B+C)


Solution:

AB + A (B+C) + B (B+C)
AB + AB + AC + BB + BC
AB + AB + B + BC + AC
B [A + A + 1 + C] + AC
B [1] + AC
B + AC

7 𝑌 = (𝐴 + 𝐵𝐶)(𝐴 + 𝐵 + 𝐶)
Solution:
𝑌 = (𝐴 + 𝐵𝐶‾)(𝐴‾ + 𝐵 + 𝐶‾ )
𝑌 = 𝐴𝐴‾ + 𝐴𝐵 + 𝐴𝐶‾ + 𝐴‾𝐵𝐶‾ + 𝐵𝐵𝐶‾ + 𝐵𝐶‾𝐶‾
𝑌 = +𝐴𝐶‾ + 𝐴‾𝐵𝐶‾ + 𝐵𝐶‾ + 𝐵𝐶‾
𝑌 = 𝐴𝐵 + 𝐴𝐶‾ + 𝐵𝐶‾ [1 + 1 + 𝐴‾]
𝑌 = 𝐴𝐵 + 𝐴𝐶‾ + 𝐵𝐶‾

8 Simplify the following Boolean expressions & realize using logic gates
Solution:
Y = 𝐴𝐵𝐶 + 𝐴𝐵‾𝐶 + 𝐴𝐵𝐶‾
𝑌 = 𝐴𝐶[𝐵 + 𝐵‾] + 𝐴𝐵𝐶‾ ∴ 𝐵 + 𝐵‾ = 1
𝑌 = 𝐴𝐶(1) + 𝐴𝐵𝐶‾ ∴ 𝐴 + 𝐴‾𝐵 = 𝐴 + 𝐵
𝑌 = 𝐴[𝐶 + 𝐵𝐶‾ ] ∴ 𝐶 + 𝐶‾𝐵 = 𝐶 + 𝐵
𝑌 = 𝐴(𝐶 + 𝐵)

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Unit-4 DIGITAL ELECTRONICS
9. Y = (𝐴 + 𝐵𝐶‾)(𝐴‾ + 𝐵 + 𝐶‾ )𝐴 + 𝐵‾

Y = (𝐴 + 𝐵‾𝐶)(𝐴𝐴‾ + 𝐴‾𝐵‾ + 𝐴𝐵 + 𝐵𝐵‾ + 𝐴𝐶‾ + 𝐵‾ 𝐶‾)


̅̅̅̅ + 𝐴𝐴𝐵 + 𝐴𝐴𝐶‾ + 𝐴𝐵𝐶
Y = 𝐴𝐴𝐵 ̅̅̅̅ + 𝐴𝐵
̅̅̅̅ 𝐵‾𝐶 + 𝐴𝐵𝐵‾𝐶 + 𝐴𝐶‾𝐵𝐶 + 𝐵‾ 𝐶𝐵‾𝐶‾
‾ ‾ ‾
Y = 𝐴𝐴𝐵 + 𝐴𝐴𝐶 + 𝐴𝐵𝐶 + 𝐴𝐵𝐵𝐶 ‾ ‾ ‾
Y= 𝐴𝐵 + 𝐴𝐶‾ [1 + 𝐵‾] + 𝐴‾𝐵‾𝐶
Y= 𝐴𝐵 + 𝐴𝐶‾ [1 + 𝐵‾] + 𝐴‾𝐵‾ + 𝐴‾𝐵‾𝐶
𝐘 = 𝑨𝑩 + 𝑨𝑪‾ + 𝑨 ‾𝑩
‾𝑪
10
A= 𝑋‾𝑌‾𝑍‾ + 𝑋‾𝑌‾𝑍‾ + 𝑌‾𝑍‾ + 𝑋𝑍‾
= 𝑋‾𝑌‾𝑍‾ + [𝑋‾ + 𝑌‾]𝑍‾ + 𝑌‾ 𝑍‾ + 𝑋𝑍‾
= 𝑋‾𝑌‾𝑍‾ + 𝑋‾ 𝑍‾ + 𝑌‾𝑍‾ + 𝑌‾ 𝑍‾ + 𝑋𝑍‾ ∴ 1 + 𝑋‾ = 1
= 𝑌‾𝑍‾[1 + 𝑋‾] + 𝑋‾𝑍‾ + 𝑌‾ 𝑍‾ + X𝑍‾
= 𝑌‾𝑍‾ + 𝑋‾𝑍‾ + 𝑌‾𝑍‾ + 𝑋𝑍‾ ∴ 𝑌‾𝑍‾ + 𝑌‾𝑍‾ = 𝑌‾𝑍‾
= 𝑌‾𝑍‾ + 𝑋‾𝑍‾ + 𝑥𝑍‾
= 𝑌‾𝑍‾ + 𝑍‾[𝑋‾ + 1]
= 𝑌‾𝑍‾ + 𝑍‾[1]
= 𝑍‾[1 + 𝑌‾] ∴ 1 + 𝑌‾ = 1
𝐴 = 𝑍‾

11. Realize using logic gates (𝐴 + 𝐵‾ + 𝐶)(𝐴 + 𝐵‾ + 𝐶)(𝐴‾ + 𝐵)


𝑌 = (𝐴 +/𝐵‾ + 𝐶)[𝐴‾𝐴‾ + 𝐴‾𝐵 + 𝐴‾𝐵‾ + 𝐵𝐵‾ + 𝐴‾𝐶‾ + 𝐵𝐶‾]
𝑌 = (𝐴 + 𝐵‾ + 𝐶)[𝐴‾ + 𝐴‾𝐵 + 𝐴‾𝐵‾ + 𝐴‾𝐶‾ + 𝐵𝐶‾ ]
𝑌 = (𝐴 + 𝐵‾ + 𝐶)[𝐴‾(1 + 𝐵‾] + 𝐴‾𝐵 + 𝐴‾ + 𝐶‾ + 𝐵𝐶‾]
𝑌 = (𝐴 + 𝐵‾ + 𝐶)[𝐴‾ + 𝐴‾𝐵 + 𝐴‾𝐶‾ + 𝐵𝐶‾]
𝑌 = (𝐴 + 𝐵‾ + 𝐶)[𝐴‾[1 + 𝐶‾] + 𝐴‾𝐵 + 𝐵𝐶‾]
𝑌 = (𝐴 + 𝐵‾ + 𝐶)[𝐴‾ + 𝐴‾𝐵 + 𝐵𝐶‾ ]
𝑌 = (𝐴 + 𝐵‾ + 𝐶)[𝐴‾ + (1 + 𝐵‾] + 𝐵𝐶‾]
𝑌 = (𝐴 + 𝐵‾ + 𝐶)[𝐴‾ + 𝐵𝐶‾]
𝑌 = 𝐴𝐴‾ + 𝐴𝐵𝐶‾ + 𝐴‾𝐵‾ + 𝐵𝐵‾𝐶‾ + 𝐴‾𝐶 + 𝐵𝐶𝐶‾
𝑌 = 𝐴‾𝐵‾ + 𝐴‾𝐶 + 𝐴𝐵𝐶‾
𝑌 = 𝐴‾[𝐵‾ + 𝐶]𝐴𝐵𝐶‾
Problem 42:
Realize using logic gates.
‾ + 𝑪)(𝑨 + 𝑩
𝒀 = (𝑨 + 𝑩 ‾ + 𝑪)(𝑨
‾ + 𝑩)
Y = (𝐴 + 𝐵‾ + 𝐶)[𝐴‾𝐴‾ + 𝐴‾ 𝐵 + 𝐴‾𝐵‾ + 𝐵𝐵‾ + 𝐴‾𝐶‾ + 𝐵𝐶‾] ‾𝑨
∴𝑨 ‾ =𝑨

= (𝐴 + 𝐵‾ + 𝐶)[𝐴‾ + 𝐴‾ 𝐵 + 𝐴‾𝐵‾ + 𝐴‾𝐶‾ + 𝐵𝐶‾ ]


= (𝐴 + 𝐵‾ + 𝐶)[𝐴‾(1 + 𝐵‾) + 𝐴‾ 𝐵 + 𝐴‾𝐶‾ + 𝐵𝐶‾ ]
= (𝐴 + 𝐵‾ + 𝐶)[𝐴‾ + 𝐴‾ 𝐵 + 𝐴‾𝐶‾ + 𝐵𝐶‾]
= (𝐴 + 𝐵‾ + 𝐶)[𝐴‾[1 + 𝐶‾] + 𝐴‾ 𝐵 + 𝐵𝐶‾]
= (𝐴 + 𝐵‾ + 𝐶)[𝐴‾ + 𝐴‾ 𝐵 + 𝐵𝐶‾ ]
= (𝐴 + 𝐵‾ + 𝐶)[𝐴‾ + (1 + 𝐵‾) + 𝐵𝐶‾ ]
= (𝐴 + 𝐵‾ + 𝐶)[𝐴‾ + 𝐵𝐶‾]
= 𝐴𝐴‾ + 𝐴𝐵𝐶‾ + 𝐴‾𝐵‾ + 𝐵𝐵‾𝐶‾ + 𝐴‾𝐶 + 𝐵𝐶𝐶‾
= 𝐴‾𝐵‾ + 𝐴‾𝐶 + 𝐴𝐵𝐶‾
‾ [𝑩
Y=𝑨 ‾ + 𝑪]𝑨𝑩𝑪‾

Page | 176
Unit-4 DIGITAL ELECTRONICS

Figure 1: Logic Diagram

Problem 43:
Simplify & realize using only NAND gates
‾ + 𝑪)(𝑨
𝒀 = (𝑨 + 𝑩 ‾ + 𝑩 + 𝑪‾)(𝑨 + 𝑩
‾)

𝑌= [𝐴𝐴‾ + 𝐴𝐵 + 𝐴𝐶‾ + 𝐴‾𝐵‾ + 𝐵𝐵‾ + 𝐵‾𝐶 + 𝐴‾𝐶 + 𝐵𝐶 + 𝐶𝐶‾](𝐴 + 𝐵‾ )


𝑌= [𝐴𝐵 + 𝐴𝐶‾ + 𝐴‾𝐵‾ + 𝐵‾𝐶‾ + 𝐴‾𝐶 + 𝐴‾𝐶 + 𝐴‾𝐶 + 𝐵𝐶](𝐴 + 𝐵‾)
𝑌= 𝐴𝐴𝐵 + 𝐴𝐴𝐶‾ + 𝐴𝐴‾𝐵‾ + 𝐴𝐵‾𝐶‾ + 𝐴𝐴‾𝐶 + 𝐴𝐵𝐶 + 𝐴𝐵𝐵‾ + 𝐴𝐵‾𝐶‾ + 𝐴‾𝐵‾ 𝐵‾ + 𝐵‾𝐵‾𝐶‾ + 𝐴‾𝐵‾𝐶‾ + 𝐵𝐵‾ 𝐶
𝑌= 𝐴𝐵 + 𝐴𝐶‾ + 𝐴𝐵‾𝐶‾ + 𝐴𝐵𝐶 + 𝐴𝐵‾𝐶‾ + 𝐴‾𝐵‾ + 𝐵‾ 𝐶‾ + 𝐴‾𝐵‾𝐶
𝑌= 𝐴𝐵[1 + 𝐶] + 𝐴𝐶‾[1 + 𝐵‾] + 𝐵‾[1 + 𝐴] + 𝐴‾𝐵‾[1 + 𝐶]
𝒀= 𝑨𝑩 + 𝑨𝑪‾ + 𝑩‾ 𝑪‾ + 𝑨
‾𝑩‾

∴𝑌 = ̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅
𝐴𝐵. ̅̅̅̅
̅̅̅̅ 𝐴𝐶‾. ̅̅̅̅
𝐵‾𝐶‾ . ̅̅̅̅
𝐴‾𝐵‾
𝑌 = ̅̅̅̅
𝐴𝐵 + ̅̅̅̅
𝐴𝐶‾ + ̅̅̅̅
𝐵‾𝐶‾ + ̅̅̅̅
𝐴‾𝐵‾
𝒀 = 𝑨𝑩 + 𝑨𝑪‾ + 𝑩 ‾ 𝑪‾ + 𝑨 ‾𝑩‾

Figure 1: Logic Diagram

Page | 177
Unit-4 DIGITAL ELECTRONICS
Problem 44:

𝒀 = ̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅
(𝑨 + 𝑩 ‾ + 𝑪)(𝑨 ‾ + 𝑩 + 𝑪)(𝑨 + 𝑩)

= (𝐴 + 𝐵‾ + 𝐶)[𝐴𝐴‾ + 𝐴𝐵 + 𝐴𝐶 + 𝐴‾𝐵 + 𝐵𝐵 + 𝐵𝐶‾ ]


̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅
= (𝐴 + 𝐵‾ + 𝐶)[𝐴𝐵 + 𝐴𝐶 + 𝐴‾𝐵 + 𝐵𝐶]
̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅
= (𝐴 + 𝐵‾ + 𝐶)[𝐴𝐵 + 𝐴𝐶 + 𝐴‾𝐵 + 𝐵(1 + 𝐶)]
̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅
= (𝐴 + 𝐵‾ + 𝐶)[𝐴𝐵 + 𝐴𝐶 + 𝐴‾𝐵 + 𝐵]
̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅
= (𝐴 + 𝐵‾ + 𝐶)[𝐵(1 + 𝐴) + 𝐴𝐶 + 𝐴‾𝐵]
̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅
= (𝐴 + 𝐵‾ + 𝐶)[𝐵 + 𝐴𝐶 + 𝐴‾𝐵]
̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅
= (𝐴 + 𝐵‾ + 𝐶)[𝐵[1 + 𝐴‾]𝐴𝐶 ]
̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅
= (𝐴 + 𝐵‾ + 𝐶)[𝐵(1 + 𝐴‾)𝐴𝐶]
̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅
= (𝐴 + 𝐵‾ + 𝐶)[𝐵[1 + 𝐴‾]𝐴𝐶 ]
̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅
= (𝐴 + 𝐵‾ + 𝐶)[𝐵 + 𝐴𝐶]
= ̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅
𝐴𝐵 + 𝐴𝐴𝐶 + 𝐵𝐵‾ + 𝐴𝐵‾ 𝐶 + 𝐵𝐶 + 𝐴𝐶𝐶
= ̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅
𝐴𝐵 + 𝐴𝐶 + 𝐴𝐵‾𝐶 + 𝐵𝐶 + 𝐴𝐶𝐶
̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅
= 𝐴𝐵 + 𝐴𝐶 + 𝐴𝐵‾𝐶 + 𝐵𝐶
̅̅̅̅)(𝑨𝑪
𝒀 = (𝑨𝑩 ̅̅̅̅̅̅̅
̅̅̅̅)(𝑨𝑩 ‾ 𝑪) (𝑩𝑪
̅̅̅̅)

̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅
∴𝑌 = ̅̅̅̅ 𝐴𝐶 ⋅ ̅̅̅̅̅̅
𝐴𝐵 ⋅ ̅̅̅̅ 𝐴𝐵‾ 𝐶 ⋅ ̅̅̅̅
𝐵𝐶
𝒀 ̅̅̅̅)(𝑨𝑪
= (𝑨𝑩 ̅̅̅̅̅̅̅
̅̅̅̅)(𝑨𝑩 ‾ 𝑪) (𝑩𝑪
̅̅̅̅)

Figure 1: Logic Diagram

𝑌= ̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅
̅̅̅̅
𝑨𝑩 + 𝑨 ̅ + 𝑨𝑩
𝑌= ̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅
̅ ̅
(𝐴 + 𝐵) + 𝑨 ̅ + 𝑨𝑩
𝑌 =𝐴̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅
̅ + 𝐴̅ + 𝐵̅ + 𝐴𝐵
̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅
𝑌 = 𝐴̅ + 𝐵̅ + 𝐴𝐵
𝑌 = 𝐴̅ ⋅ 𝐵̅ ⋅ ̅̅̅̅
𝐴𝐵
𝑌 = 𝐴𝐵 ⋅ (𝐴̅ + 𝐵̅ )
𝑌 = 𝐴𝐵𝐴̅ + 𝐴𝐵𝐵̅
𝑌 = 𝐴𝐵𝐴̅ + 𝐴𝐵𝐵̅
𝑌 = 𝐴𝐴̅𝐵 + 𝐴𝐵𝐵̅
𝒀=𝟎

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Unit-4 DIGITAL ELECTRONICS
Problem 44:
Simplify the following expression and realize using basic gates
̅̅̅̅̅̅ + 𝑨𝑩
𝒀 = 𝑨(𝑨𝑩𝑪 ‾ 𝑪)

̅̅̅̅̅̅ + 𝐴𝐵̅𝐶)
𝑌 = 𝐴(𝐴𝐵𝐶
= 𝐴[(𝐴̅ + 𝐵̅ + 𝐶̅ ) + 𝐴𝐵̅𝐶]
= 𝐴𝐴̅ + 𝐴𝐵̅ + 𝐴𝐶̅ + 𝐴𝐴𝐵̅𝐶
= 𝐴𝐵̅ + 𝐴𝐶̅ + 𝐴𝐵̅𝐶
= 𝐴𝐵̅ [1 + 𝐶] + 𝐴𝐶̅
𝑌 = 𝐴𝐵̅ + 𝐴𝐶̅
𝒀 = 𝑨[𝑩̅ +𝑪 ̅]
Figure 1: Logic Diagram

Problem 45:
‾ 𝑩 + 𝑨𝑩
Simplify 𝒀 = 𝑨𝑩 + 𝑨𝑩𝑪 + 𝑨 ‾ 𝑪 and construct logic circuit.

𝑌 = 𝐴𝐵 + 𝐴𝐵𝐶 + 𝐴̅𝐵 + 𝐴𝐵̅𝐶


= 𝐴𝐵 + 𝐴̅𝐵 + 𝐴𝐵𝐶 + 𝐴𝐵̅𝐶
= 𝐵(𝐴 + 𝐴̅) + 𝐴𝐶(𝐵 + 𝐵̅)
= 𝐵(1) + 𝐴𝐶(1)
𝒀 = 𝑩 + 𝑨𝑪
Figure 1: Logic Diagram

Problem 46:
Simplify and realize the following expressions using only NAND and NOR.
‾ )(𝑩 + 𝑪)(𝑪‾ + 𝑩
i) 𝒀 = (𝑨 + 𝑩 ‾)
ii) 𝒀 = 𝑨𝑩 + 𝑨𝑪 + 𝑩𝑫 + 𝑪𝑫

‾ )(𝑩 + 𝑪)(𝑪‾ + 𝑩
i) 𝒀 = (𝑨 + 𝑩 ‾)
𝑌 = (𝐴 + 𝐵̅ )(𝐵 + 𝐶)(𝐶̅ + 𝐵̅)
= (𝐴𝐵 + 𝐵̅𝐵 + 𝐴𝐶 + 𝐵̅ 𝐶)(𝐶̅ + 𝐵̅) = (𝐴𝐵 + 𝐴𝐶 + 𝐵̅𝐶)(𝐶̅ + 𝐵̅)
= 𝐴𝐵𝐶̅ + 𝐴𝐵𝐵̅ + 𝐴𝐶𝐶̅ + 𝐴𝐵̅ 𝐶 + 𝐵̅𝐶̅ + 𝐵̅𝐵̅ 𝐶 = 𝐴𝐵𝐶̅ + 𝐴𝐵𝐵̅ + 𝐵̅ 𝐶
= 𝐴𝐵𝐶̅ + 𝐵̅ 𝐶[1 + 𝐴]
𝒀 = 𝑨𝑩𝑪 ̅+𝑩 ̅𝑪

Using NAND gate:


𝑌 = 𝐴𝐵𝐶̅ + 𝐵̅𝐶
𝑌 = ̅̅̅̅̅̅̅̅̅̅̅̅̅̅
𝐴𝐵𝐶̅ + 𝐵̅𝐶
𝒀 = ̅̅̅̅̅̅̅̅̅̅̅̅
̅̅̅̅̅̅
𝑨𝑩𝑪 ̅ ∙ ̅̅̅̅
̅𝑪
𝑩

Figure 1: Logic Diagram

Page | 179
Unit-4 DIGITAL ELECTRONICS

Using NOR gate:

𝑌 = 𝐴𝐵𝐶̅ + 𝐵̅𝐶
𝑌 = ̅̅̅̅̅̅̅̅̅̅̅̅̅̅
𝐴𝐵𝐶̅ + 𝐵̅𝐶
̅̅̅̅̅̅̅̅̅̅̅̅
𝑌 = ̅̅̅̅̅̅
𝐴𝐵𝐶̅ ⋅ ̅̅̅̅
𝐵̅ 𝐶
̅̅̅̅̅̅̅ ̅̅̅̅
𝑌 = 𝐴𝐵𝐶 + 𝐵̅𝐶
̅̅̅̅̅̅̅̅̅̅̅̅̅ ̅̅̅̅̅̅̅̅
Y =𝐴̅ + 𝐵̅ + 𝐶̅ + 𝐵̅ + 𝐶̅
̅̅̅̅̅̅̅̅̅̅̅̅̅
̅+𝑩
Y =𝑨 ̅ +𝑪+ ̅̅̅̅̅̅̅̅
𝑩+𝑪 ̅
Figure 2: Logic Diagram

iii) 𝒀 = 𝑨𝑩 + 𝑨𝑪 + 𝑩𝑫 + 𝑪𝑫

Using NAND gate:

𝑌 = 𝐴𝐵 + 𝐴𝐶 + 𝐵𝐷 + 𝐶𝐷
̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅
𝑌 = 𝐴𝐵 + 𝐴𝐶 + 𝐵𝐷 + 𝐶𝐷
̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅
𝒀 = 𝑨𝑩 ⋅ ̅̅̅̅
̅̅̅̅ 𝑨𝑪 ⋅ ̅̅̅̅̅
𝑩𝑫 ⋅ 𝑪𝑫̅̅̅̅

Figure 1: Logic Diagram

Using NOR gate


𝑌 = 𝐴𝐵 + 𝐴𝐶 + 𝐵𝐷 + 𝐶𝐷
𝑌 = ̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅
𝐴𝐵 + 𝐴𝐶 + 𝐵𝐷 + 𝐶𝐷
̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅
Y = 𝐴𝐵 ⋅ ̅̅̅̅
̅̅̅̅ 𝐴𝐶 ⋅ ̅̅̅̅
𝐵𝐷 ⋅ ̅̅̅̅
𝐶𝐷
̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅
𝑌 = (𝐴̅ + 𝐵̅) ⋅ (𝐴̅ + 𝐶̅ ) ⋅ (𝐵̅ + 𝐷 ̅ ) ⋅ (𝐶̅ + 𝐷 ̅)
̅̅̅̅̅̅̅̅
̅ ̅ ̅̅̅̅̅̅̅̅̅
̅ ̅ ̅̅̅̅̅̅̅̅
̅ ̅
𝑌 = (𝐴 + 𝐵) + (𝐴 + 𝐶 ) + (𝐵 + 𝐷) + (𝐶 + 𝐷 ̅̅̅̅̅̅̅̅
̅ ̅)
𝑌 = 𝐴̅ ⋅ 𝐵̅ + 𝐴̅ ⋅ 𝐶̅ + 𝐵̅ ⋅ 𝐷̅ + 𝐶̅ ⋅ 𝐷̅
𝑌 = 𝐴𝐵 + 𝐴𝐶 + 𝐵𝐷 + 𝐶𝐷

Figure 2: Logic Diagram

Page | 180
Unit-4 DIGITAL ELECTRONICS
Problem 46:
Design a logic circuit using basic gates with three inputs A, B, C and output Y that goes low only
when A is high and B and C are different.
Solution:

Output Y is low when


𝐀 = 𝟏 and 𝐁 = 𝟎, 𝐂 = 𝟏
𝐀 = 𝟏 and 𝐁 = 𝟏, 𝐂 = 𝟎

A B C OUTPUT
1 0 1 𝑨𝑩̅𝑪
1 1 0 ̅
𝑨𝑩𝑪
̅ 𝑪 + 𝑨𝑩𝑪
𝒀 = 𝑨𝑩 ̅

𝑌 = 𝐴𝐵̅𝐶 + 𝐴𝐵𝐶̅
𝒀 = 𝑨(𝑩̅ 𝑪 + 𝑩𝑪
̅) Figure 1: Logic Diagram

Problem 47:
‾ and 𝒀𝟐 = (𝑩 + 𝑪𝑨)(𝑪 + 𝑨
Factorise the following Boolean equations 𝒀𝟏 = 𝑨𝑩 + 𝑨𝑩 ‾ 𝑩)
Solution:
𝑌1 = 𝐴𝐵 + 𝐴𝐵‾
̅]
𝑌1 = A[B + B
𝑌1 = A[1]
𝒀𝟏 = 𝐀

𝑌2 = (𝐵 + 𝐶𝐴)(𝐶 + 𝐴‾𝐵)
= 𝐵𝐶 + 𝐵𝐴‾𝐵 + 𝐶𝐶𝐴 + 𝐴̅𝐴𝐵𝐶
= 𝐵𝐶 + 𝐴̅𝐵 + 𝐴𝐶 + 0
𝒀𝟐 ̅ 𝑩 + 𝑨𝑪
= 𝑩𝑪 + 𝑨

Problem 48:
Simplify and realize using basic gates.
i) 𝐴𝐵𝐶 + 𝐴𝐵‾𝐶 + 𝐴𝐵𝐶‾ + 𝐴‾𝐵𝐶
̅̅̅̅̅̅̅̅
ii) (𝐀 + 𝐵)(𝐀̅ + 𝐶‾)(𝐵‾ + 𝐶)

Sol.:
̅ 𝐂 + 𝐀𝐁𝐂̅ + 𝐀
i) 𝐘 = 𝐀𝐁𝐂 + 𝐀𝐁 ̅ 𝐁𝐂
𝑌 = 𝐴𝐶(𝐵 + 𝐵̅) + 𝐴𝐵𝐶‾ + 𝐴‾𝐵𝐶
𝑌 = 𝐴𝐶(1) + 𝐴𝐵𝐶‾ + 𝐴‾𝐵𝐶
𝑌 = 𝐴𝐶 + 𝐴𝐵𝐶‾ + 𝐴‾𝐵𝐶
𝑌 = 𝐴(𝐶 + 𝐶𝐵̅) + 𝐴‾𝐵𝐶 ∵ (𝐶 + 𝐶̅ 𝐵) = 𝐶 + 𝐵

𝑌 = 𝐴(𝐶 + 𝐵) + 𝐴𝐵𝐶 ∵ 𝐴 + 𝐴̅𝐶 = 𝐴 + 𝐶
𝑌 = 𝐴𝐶 + 𝐴𝐵 + 𝐴‾𝐵𝐶
𝑌 = 𝐴𝐶 + 𝐵(𝐴 + 𝐴̅𝐶 )
𝑌 = 𝐴𝐶 + 𝐵(𝐴 + 𝐶 ) ∵ 𝐴 + 𝐴̅𝐶 = 𝐴 + 𝐶
𝑌 = 𝐴𝐶 + 𝐴𝐵 + 𝐴𝐶
𝒀 = 𝑨𝑩 + 𝑨𝑪

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Unit-4 DIGITAL ELECTRONICS
̅̅̅̅̅̅̅̅
ii) 𝒀 = (𝑨 + 𝑩)(𝑨̅+𝑪
̅ )(𝑩
̅ + 𝑪)

̅̅̅̅̅̅̅̅
𝑌 = (𝑨 + 𝑩)(𝑨 ̅ +𝑪 ̅ )(𝑩
̅ + 𝑪)
𝑌 = 𝐴̅ ⋅ 𝐵̅(𝐴̅ + 𝐶̅ )(𝐵̅ + 𝐶)
𝑌 = 𝐴̅ 𝐵̅(𝐴̅𝐵̅ + 𝐴̅𝐶 + 𝐵̅ 𝐶̅ + 𝐶𝐶̅ )
𝑌 = 𝐴̅ 𝐵̅(𝐴̅ 𝐵̅ + 𝐴̅𝐶 + 𝐵̅ 𝐶̅ + 0)
𝑌 = 𝐴̅ 𝐵̅ 𝐴̅ 𝐵̅ + 𝐴̅ 𝐵̅ 𝐴̅𝐶 + 𝐴𝐵̅ ̅
𝐵 𝐶̅
𝑌 = 𝐴̅ 𝐵̅ + 𝐴̅ 𝐵̅𝐶 + 𝐴̅ ̅ 𝐵 𝐶̅
𝑌 = 𝐴̅ 𝐵̅ + 𝐴̅ 𝐵̅[𝐶 + 𝐶̅ ]
𝑌 = 𝐴̅ 𝐵̅ + 𝐴̅ 𝐵̅(1)
𝑌 = 𝐴̅ 𝐵̅ + 𝐴̅ 𝐵̅
𝒀 =𝑨 ̅𝑩 ̅

Problem 49:
Simplify the following:
‾𝒀
i) 𝑭 = 𝑿 ‾𝒁
‾ +𝑿
‾𝒀‾𝒁
‾ +𝑿
‾𝒀‾ + 𝑿𝒀

̅ + 𝒁)(𝒀
ii) 𝑭 = (𝑿 + 𝒀)(𝑿 ̅ + 𝒁)

Solution:
̅𝒀
𝒊) 𝑭 = 𝑿 ̅𝒁
̅+𝑿
̅𝒀̅𝒁
̅+𝑿̅𝒀̅ + 𝑿𝒀 ̅
𝐹 = 𝑋̅𝑌̅𝑍̅ + 𝑋̅𝑌̅ + 𝑋𝑌̅
𝐹 = 𝑋̅𝑌̅[1 + 𝑍̅] + 𝑋𝑌
𝐹 = 𝑋̅𝑌̅[1] + 𝑋𝑌̅
𝐹 = 𝑋̅𝑌̅ + 𝑋𝑌̅
F = 𝑌̅(𝑋̅ + 𝑋)
F = 𝑌‾(1)
𝑭=𝒀 ̅

̅ + 𝒁)(𝒀
ii) 𝑭 = (𝑿 + 𝒀)(𝑿 ̅ + 𝒁)

𝐹 = (X𝑋‾ + XZ + 𝑋‾𝑌 + 𝑌𝑍)(𝑌‾ + 𝑍)


𝐹 = (𝑋𝑍 + 𝑋‾ 𝑌 + 𝑌𝑍)(𝑌‾ + 𝑍)
𝐹 = 𝑋𝑌‾𝑍 + 𝑋𝑍𝑍 + 𝑋𝑌̅̅̅̅𝑌 + 𝑋‾𝑌𝑍 + 𝑌𝑌‾𝑍 + 𝑌𝑍𝑍
𝐹 = 𝑋𝑌𝑍 + 𝑋𝑍 + 0 + 𝑋‾𝑌𝑍 + 0 + 𝑌𝑍

𝐹 = 𝑋𝑍(𝑌‾ + 1) + 𝑋‾𝑌𝑍 + 𝑌𝑍
𝐹 = 𝑋𝑍(1) + 𝑋‾𝑌𝑍 + 𝑌𝑍
𝐹 = 𝑋𝑍 + 𝑌𝑍(𝑋‾ + 1)
𝐹 = 𝑋𝑍 + 𝑌𝑍
𝑭 = 𝒁(𝑿 + 𝒀)

Problem 50:
Simplify and realize using NAND gate.
i) 𝒀 = ̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅
(𝑨 + 𝑩 ‾ 𝑪)(𝑨 ‾ +𝑩 ‾ + 𝑪‾)(𝑨 ‾ + 𝑩)
‾ ‾ ‾
ii) 𝒀 = (𝑨 + 𝑩𝑪)(𝑨 + 𝑩 + 𝑪)(𝑨 ‾ ‾ + 𝑩)

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Unit-4 DIGITAL ELECTRONICS
Solution:
i) 𝒀 = ̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅
(𝑨 + 𝑩 ‾ 𝑪)(𝑨 ‾ +𝑩 ‾ + 𝑪‾)(𝑨 ‾ + 𝑩)
𝒀 = ̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅
(𝑨 + 𝑩 ̅ 𝑪)(𝑨̅ +𝑩 ̅ +𝑪 ̅ )(𝑨
̅ + 𝑩)
= ̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅
(𝐴𝐴̅ + 𝐴𝐵̅ + 𝐴𝐶̅ + ̅̅̅̅𝐴𝐵𝐶̅ + ̅̅̅̅
𝐵𝐵𝐶̅ + 𝐵̅ 𝐶𝐶̅ )(𝐴̅ + 𝐵)
= ̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅
(𝐴𝐵̅ + 𝐴𝐶̅ + 𝐴𝐵 ̅̅̅̅ 𝐶 + 𝐵̅𝐶)(𝐴̅ + 𝐵)
= ̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅
𝐴𝐴̅𝐵̅ + 𝐴𝐴̅𝐶̅ + 𝐴̅𝐴̅𝐵̅𝐶 + 𝐴̅𝐵̅𝐶 + 𝐴𝐵𝐵̅ + 𝐴̅𝐵𝐵̅𝐶 + 𝐵𝐵̅𝐶 + 𝐴𝐵𝐶̅
= ̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅
0 + 0 + 𝐴̅𝐶̅ + 𝐴̅𝐵̅ 𝐶 + 0 + 𝐴𝐵𝐶̅ + 0 + 0
=𝐴̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅
̅ 𝐵̅𝐶 + 𝐴̅𝐵̅𝐶 + 𝐴𝐵𝐶̅
̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅
= 𝐴̅𝐵̅𝐶 + 𝐴𝐵𝐶̅
𝒀 ̅̅̅̅̅̅
𝑨𝑩𝑪 ⋅ ̅̅̅̅̅̅
= ̅̅̅̅ 𝑨𝑩𝑪 ̅

Figure 1: Logic diagram

‾ 𝑪)(𝑨
ii) 𝒀 = (𝑨 + 𝑩 ‾ +𝑩 ‾ + 𝑪‾)(𝑨‾ + 𝑩)
𝑌 = (𝐴𝐴 + 𝐴𝐵 + 𝐴𝐶̅ + +𝐴̅𝐵̅ 𝐶 + +𝐵̅𝐵̅ 𝐶 + 𝐵̅𝐶𝐶̅ )(𝐴̅ + 𝐵)
̅ ̅
Y = (𝐴𝐵̅ + 𝐴𝐶̅ + 𝐴̅𝐵̅𝐶 + 𝐵̅𝐶)(𝐴̅ + 𝐵)
𝑌 = 𝐴𝐴̅𝐵̅ + 𝐴𝐴̅𝐶̅ + 𝐴̅𝐴̅𝐵̅𝐶 + 𝐴̅𝐵̅𝐶 + 𝐴𝐵𝐵̅ + 𝐴𝐵𝐶̅ + 𝐴̅𝐵𝐵̅ 𝐶 + 𝐵𝐵̅𝐶
𝑌 = 𝐴̅𝐵̅𝐶 + 𝐴̅𝐵̅𝐶 + 𝐴𝐵𝐶̅
Y = 𝐴̅𝐵̅ 𝐶[1 + 𝐶] + 𝐴𝐵𝐶̅
𝑌 = 𝐴̅𝐵̅𝐶 + 𝐴𝐵𝐶̅
𝑌 = ̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅
𝐴̅𝐵̅𝐶 + 𝐴𝐵𝐶̅
𝒀 = ̅̅̅̅̅̅̅̅̅̅̅̅̅̅
̅̅̅̅̅̅
𝑨̅𝑩̅ 𝑪 ⋅ ̅̅̅̅̅̅
𝑨𝑩𝑪 ̅

Figure 1: Logic diagram

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Problem 51:
Prove the following:
̅ 𝒀) = 𝑿 + 𝒀
i) (𝑿 + 𝑿
ii) (𝑿𝒀𝒁) = (𝑿 + 𝒀)(𝑿 + 𝒁)(𝑿 + 𝒀)(𝑿 + 𝒁)
iii) 𝑿𝒀 + 𝒀𝒁 + 𝒀‾ 𝒁 = 𝑿𝒀 + 𝒁

Sol:
‾ 𝒀) = 𝑿 + 𝒀
i) (𝑿 + 𝑿
(𝑋 + 𝑋̅𝑌) = 𝑋(1 + 𝑌) + 𝑋̅𝑌 ∵ (1 + 𝑌) = 𝑋
= 𝑋 + 𝑋𝑌 + 𝑋̅𝑌
= 𝑋 + 𝑌(𝑋 + 𝑋̅)
= 𝑋 + 𝑌(1)
̅
(𝑿 + 𝑿𝒀) = 𝑿 + 𝒀

ii) (𝑋𝑌𝑍) = (𝑋 + 𝑌)(𝑋 + 𝑍)(𝑋 + 𝑌)(𝑋 + 𝑍)


= (𝑋𝑋 + 𝑋𝑍 + 𝑋𝑌 + 𝑌𝑍)(𝑋 + 𝑌)(𝑋 + 𝑍)
= (𝑋 + 𝑋𝑍 + 𝑋𝑌 + 𝑌𝑍)(𝑋 + 𝑌)(𝑋 + 𝑍)
= (𝑋(1 + 𝑍) + 𝑋𝑌 + 𝑌𝑍)(𝑋 + 𝑌)(𝑋 + 𝑍)
= (𝑋 + 𝑋𝑌 + 𝑌𝑍)(𝑋 + 𝑌)(𝑋 + 𝑍)
= (𝑋(1 + 𝑌) + 𝑌𝑍)(𝑋 + 𝑌)(𝑋 + 𝑍) ∵ 𝑋(1 + 𝑌) = 𝑋
= (𝑋𝑋 + 𝑋𝑌 + 𝑋𝑌𝑍 + 𝑌𝑌𝑍)(𝑋 + 𝑍)
= (𝑋 + 𝑋𝑌𝑍 + 𝑌𝑍)(𝑋 + 𝑍)
= (𝑋 + 𝑌𝑍)(𝑋 + 𝑍)
= 𝑋𝑋 + 𝑋𝑍 + 𝑋𝑌𝑍 + 𝑌𝑍𝑍
= 𝑋 + 𝑋𝑌𝑍 + 𝑌𝑍 = 𝑋 + 𝑌𝑍(1 + 𝑋)
(𝑿𝒀𝒁) = 𝑿 + 𝒀𝒁

iii) 𝐗𝐘 + 𝐘𝐙 + 𝐘̅𝐙 = 𝐗𝐘 + 𝐙
= XY + Z[Y + ̅
Y]
= XY + Z [1]
= 𝑿𝒀 + 𝒁

Problem 52:
Simplify ̅̅̅̅̅̅
𝑨𝑩𝑪 + 𝑨 ̅ 𝑩𝑪 ̅ + 𝑨𝑩𝑪 ̅̅̅̅ + 𝑨𝑩𝑪
̅ and realize using NAND gate.
Solution:
̅̅̅̅̅̅ + 𝐴̅𝐵𝐶̅ + 𝐴𝐵𝐶
𝑌 = 𝐴𝐵𝐶 ̅̅̅̅ + 𝐴𝐵𝐶̅
= 𝐴𝐵𝐶 + 𝐴𝐵𝐶 + 𝐵𝐶̅ (𝐴̅ + 𝐴)
̅̅̅̅̅̅ ̅̅̅̅
̅̅̅̅̅̅ + 𝐴𝐵𝐶
= 𝐴𝐵𝐶 ̅̅̅̅ + 𝐵𝐶̅ ∵ ̅̅̅̅̅̅
𝐴𝐵𝐶 = 𝐴̅ + ̅̅̅̅
𝐵𝐶
̅ ̅̅̅̅
= 𝐴 + 𝐵𝐶 + 𝐴𝐵𝐶 ̅̅̅̅ + 𝐵𝐶̅ ∵ ̅̅̅̅
𝐵𝐶 = 𝐵̅ + 𝐶̅
= 𝐴 + 𝐵𝐶 (1 + 𝐴) + 𝐵𝐶̅
̅ ̅̅̅̅ ∵ 𝐴̅ + 𝐵̅ + 𝐶̅ = 𝐴𝐵𝐶
̅̅̅̅̅̅
= 𝐴̅ + ̅̅̅̅𝐵𝐶 + 𝐵𝐶̅
= 𝐴 + 𝐵̅ + 𝐶̅ + 𝐵𝐶̅
̅
= 𝐴̅ + 𝐵̅ + 𝐶̅ (1 + 𝐵)
= 𝐴̅ + 𝐵̅ + 𝐶̅
𝑌 = ̅̅̅̅̅̅̅̅̅̅̅
𝑨⋅𝑩⋅𝑪

Figure 1: Logic diagram

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4.5 K-Map
Boolean functions may be used to simplify or minimize the logical functionality that
helps in reduced hardware usage. However, this minimization procedure is not unique
because it lacks specific rules to predict the succeeding step in the manipulative
process. Instead, a map method that is an improvised version proposed by Karnaugh,
provides a simple, straightforward procedure for the simplification of Boolean
functions. The method is called Karnaugh map, which may be regarded either as a
pictorial representation of a truth table or as an extension of the Venn diagram.
The Karnaugh map provides a systematic method for simplification and manipulation of
a Boolean expression. The map is a diagram consisting of squares. For n variables on a
Karnaugh map there are 2𝑛 number of squares. Each square or cell represents one of
the min-terms. Since any Boolean function can be expressed as a sum of min-terms, it is
possible to recognize a Boolean function graphically in the map from the area enclosed
by those squares whose min-terms appear in the function. It is also possible to derive
alternative algebraic expressions or simplify the expression with a minimum number of
variables or literals and sum of products or product of sums terms, by analyzing various
patterns. In fact, the map represents a visual diagram of all possible ways a function can
be expressed in a standard form and the simplest algebraic expression consisting of a
sum of products or product of sums can be selected. Note that the expression is not
necessarily unique.

4.5.1 CANONICAL AND STANDARD FORMS


Logical functions are generally expressed in terms of different combinations of logical
variables with their true forms as well as the complement forms. Binary logic values
obtained by the logical functions and logic variables are in binary form. An arbitrary
logic function can be expressed in the following forms.
(i) Sum of the Products (SOP) (ii) Product of the Sums (POS)
Product Term- In Boolean algebra, the logical product of several variables on which a
function depends is considered to be a product term. In other words, the AND function
is referred to as a product term or standard product. The variables in a product term
can be either in true form or in complemented form. For example, 𝐴𝐵𝐶̅ is a product
term.
Sum Term- An OR function is referred to as a sum term. The logical sum of several
variables on which a function depends is considered to be a sum term. Variables in a
sum term can also be either in true form or in complemented form. For example, 𝐴 +
𝐵 + 𝐶̅ is a sum term.
Sum of Products (SOP): The logical sum of two or more logical product terms is
referred to as a sum of products expression. It is basically an OR operation on AND
operated variables. For example, 𝑌 = 𝐴𝐵 + 𝐵𝐶 + 𝐴𝐶 𝑜𝑟 𝑌 = 𝐴̅𝐵 + 𝐵𝐶 + 𝐴𝐶̅ are
sum of products expressions.
Product of Sums (POS): The logical product of two or more logical sum terms is called
a product of sums expression. It is an AND operation on OR operated variables. For
example, 𝑌 = (𝐴 + 𝐵 + 𝐶) (𝐴 + 𝐵̅ + 𝐶) (𝐴 + 𝐵 + 𝐶̅ ) 𝑜𝑟 𝑌 = (𝐴 + 𝐵 + 𝐶) (𝐴̅ +
𝐵̅ + 𝐶̅ ) are product of sums expressions.

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4.5.2 Standard Form: Definition: Any Boolean function that is expressed as a sum of
min-terms or as a product of maxterms is said to be in its canonical form. A standard
form is the one that contains all the literals either normal or in a complemented form in
each of its product term or in its sum term of SOP and POS form respectively. the
expression. The standard form of the Boolean function is when it is expressed in sum of
the products or product of the sums fashion. The examples stated above, like Y = ABC +
𝐴̅BC + A𝐵̅C or Y = (𝐴 + 𝐵 + 𝐶) (𝐴 + 𝐵̅ + 𝐶) (𝐴 + 𝐵 + ̅̅̅ 𝐶) are the standard forms.
To convert the non-standard expression into a canonical (having all the variables in
each term of the expression) or standard various Boolean properties are used.

4.5.3 Min Terms -A product term containing all n variables of the function in either
true or complemented form is called the min term. Each min term is obtained by an AND
operation of the variables in their true form or complemented form. Canonical Sum of
Product Expression. When a Boolean function is expressed as the logical sum of all the
min terms from the rows of a truth table, for which the value of the function is 1, it is
referred to as the canonical sum of product expression.
A B C Min term Designation
0 0 0 ̅𝑩
𝑨 ̅𝑪
̅ 𝒎𝟎
0 0 1 ̅𝑪
𝑨𝑩 ̅ 𝒎𝟏
0 1 0 ̅𝑩 𝑪
𝑨 ̅ 𝒎𝟐
0 1 1 ̅𝑩𝑪
𝑨 𝒎𝟑
1 0 0 ̅𝑪
𝑨𝑩 ̅ 𝒎𝟒
1 0 1 ̅𝑪
𝑨𝑩 𝒎𝟓
1 1 0 ̅
𝑨𝑩𝑪 𝒎𝟔
1 1 1 𝑨𝑩𝑪 𝒎𝟕

The canonical sum of products form of a logic function can be obtained by using the
following procedure.
1. Check each term in the given logic function. Retain if it is a min term, continue to
examine the next term in the same manner.
2. Examine the variables that are missing in each product which is not a min term. If
the missing variable in the min term is 𝑋, multiply that min term with (𝑋 + 𝑋̅).
3. Multiply all the products and discard the redundant terms.

Any Boolean function can be expressed as a sum (OR) of its min terms using a notation
: 𝑓 ( 𝐿𝑖𝑠𝑡 𝑜𝑓 𝑣𝑎𝑟𝑖𝑎𝑏𝑙𝑒𝑠) = ∑ 𝑚 (𝑙𝑖𝑠𝑡 𝑜𝑓 𝑖𝑡𝑠 1 − min 𝑡𝑒𝑟𝑚 𝑖𝑛𝑑𝑖𝑐𝑒𝑠)
For example - 𝑓 (𝐴, 𝐵, 𝐶 ) = ∑(𝑚0 , 𝑚3 , 𝑚5 ) OR 𝑓(𝐴, 𝐵, 𝐶 ) = ∑ 𝑚(0,3,5)
The resultant SOP expression is 𝑓 (𝐴, 𝐵, 𝐶 ) = 𝐴̅ 𝐵̅ 𝐶̅ +𝐴̅ 𝐵 𝐶 +𝐴 𝐵̅ 𝐶
Illustrative Example: Obtain the canonical sum of product form of the following
function.
𝐹 (𝐴, 𝐵, 𝐶) = 𝐴 + 𝐵𝐶

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Solution-Here neither the first term nor the second term is min term. The given
function contains three variables 𝐴, 𝐵, and 𝐶. The variables 𝐵 and 𝐶 are missing from
the first term of the expression and the variable 𝐴 is missing from the second term of
the expression. Therefore, the first term is to be multiplied by (𝐵 + 𝐵̅ ) and (𝐶 + ̅̅̅
𝐶).
̅
The second term is to be multiplied by (𝐴 + 𝐴). This is demonstrated below.
𝑓 (𝐴, 𝐵, 𝐶 ) = 𝐴 + 𝐵𝐶 = 𝐴 ∙ (𝐵 + 𝐵̅) ∙ (𝐶 + 𝐶̅ ) + 𝐵𝐶 ∙ (𝐴 + 𝐴̅)
= (𝐴𝐵 + 𝐴𝐵̅)(𝐶 + 𝐶̅ ) + 𝐴𝐵𝐶 + 𝐴𝐵̅𝐶
= 𝐴𝐵𝐶 + 𝐴𝐵̅𝐶 + 𝐴𝐵𝐶̅ + 𝐴𝐵̅𝐶̅ + 𝐴̅𝐵𝐶 (Ignoring all the replicated terms)
Hence the canonical sum of the product expression of the given function is
𝑓 (𝐴, 𝐵, 𝐶 ) = 𝐴𝐵𝐶 + 𝐴𝐵̅ 𝐶 + 𝐴𝐵𝐶̅ + 𝐴𝐵̅𝐶̅ + 𝐴̅𝐵𝐶

4.5.4 Maxterm:
A sum term containing all 𝑛 variables of the function in either true or complemented
form is called the maxterm. Each maxterm is obtained by an OR operation of the
variables in their true form or complemented form. Four different combinations are
possible for a two-variable function, such as, 𝐴̅ + ̅
𝐵, 𝐴̅ + 𝐵, 𝐴 + 𝐵,
̅ and 𝐴 + 𝐵. These
sum terms are called the standard sums or maxterms.

A B C Max Term Designation


0 0 0 𝐴+𝐵+𝐶 𝑀0
0 0 1 𝐴 + 𝐵 + 𝐶̅ 𝑀1
0 1 0 𝐴 + 𝐵̅ + 𝐶 𝑀2
0 1 1 𝐴 + 𝐵̅ + ̅𝐶 𝑀3
1 0 0 𝐴̅ + 𝐵 + 𝐶 𝑀4
1 0 1 𝐴̅ + 𝐵 + 𝐶̅ 𝑀5
1 1 0 𝐴̅ + ̅
𝐵 + 𝐶 𝑀6
1 1 1 𝐴̅ + 𝐵̅ + 𝐶 𝑀7

The canonical product of sums form of a logic function can be obtained by using the
following procedure.
1. Check each term in the given logic function. Retain it if it is a maxterm, continue to
examine the next term in the same manner.
2. Examine for the variables that are missing in each sum term that would have
appeared if the If the missing variable in the maxterm is X, multiply that maxterm
with (X.X′).
3. Expand the expression using the properties and postulates as described earlier and
discard the redundant terms
Any Boolean function can be expressed as a product (AND) of its 0- maxterms using
notation: 𝑓(𝑙𝑖𝑠𝑡 𝑜𝑓 𝑣𝑎𝑟𝑖𝑎𝑏𝑙𝑒) = 𝛱(list of 0 − maxterm indices)
For example, 𝑓 (𝐴, 𝐵. 𝐶 ) = ∏ 𝑀(1,2,5) 𝑂𝑅 ∑(𝑀1 , 𝑀2 , 𝑀5 ) represents the expression as
, 𝑓(𝐴, 𝐵. 𝐶 ) = (𝐴 + 𝐵 + 𝐶̅ ) ∙ ( 𝐴 + 𝐵̅ + 𝐶 ) ∙ ( 𝐴̅ + 𝐵 + 𝐶̅ )
Illustrative Example:
Obtain the canonical product of the sum form of the following function.
𝐹 (𝐴, 𝐵, 𝐶) = (𝐴 + 𝐵̅) ∙ (𝐵 + 𝐶) ∙ (𝐴 + ̅𝐶 )

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Unit-4 DIGITAL ELECTRONICS
Solution: 𝐹 (𝐴, 𝐵, 𝐶) = (𝐴 + 𝐵̅ ) (𝐵 + 𝐶) (𝐴 + 𝐶̅ )
= (𝐴 + ̅ 𝐵 + 0) (𝐵 + 𝐶 + 0) (𝐴 + ̅̅̅ 𝐶 + 0)
(𝐴 + 𝐵 + 𝐶𝐶 ) (𝐵 + 𝐶 + 𝐴𝐴) (𝐴 + 𝐶 + 𝐵𝐵̅)
̅ ̅ ̅ ̅̅̅
= (𝐴 + ̅̅𝐵̅̅ + 𝐶) (𝐴 + ̅𝐵 + 𝐶̅ ) (𝐴 + 𝐵 + 𝐶) (𝐴̅ + 𝐵 + 𝐶) (𝐴 + 𝐵
̅̅̅ (𝐴 + ̅̅𝐵̅̅ + 𝐶̅ )
+ 𝐶)
[𝑢𝑠𝑖𝑛𝑔 𝑡ℎ𝑒 𝑑𝑖𝑠𝑡𝑟𝑖𝑏𝑢𝑡𝑖𝑣𝑒 𝑝𝑟𝑜𝑝𝑒𝑟𝑡𝑦, 𝑎𝑠 𝑋 + 𝑌𝑍 = (𝑋 + 𝑌) (𝑋 + 𝑍)]
= (𝐴 + 𝐵̅ + 𝐶) (𝐴 + 𝐵̅ + 𝐶̅ ) (𝐴 + 𝐵 + 𝐶) (𝐴̅ + 𝐵 + 𝐶) (𝐴 + 𝐵 + 𝐶̅ )
Ignoring the repetitive terms from the expression we have the canonical product of
the sum form of the expression represented as
𝑓 (𝐴, 𝐵, 𝐶) = (𝐴 + 𝐵̅ + 𝐶) (𝐴 + 𝐵̅ + 𝐶̅ ) (𝐴 + 𝐵 + 𝐶) (𝐴̅ + 𝐵 + 𝐶) (𝐴 + 𝐵 + 𝐶̅ )

4.5.5 Two-Variable Karnaugh Maps


A two-variable Karnaugh map is shown in Figure below. Since a two-variable system
can form four min terms, the map consists of four cells—one for each min term. The
map has been redrawn in the adjacent figure to show the relationship between the
squares and the two variables A and B. Note that, in the first row, the variable A is
complemented, in the second row, A is uncomplemented, in the first column variable B
is complemented and in the second column B is uncomplemented. The two-variable
Karnaugh map is a useful way to represent any of the four Boolean functions of two
variables.
𝐵̅ 𝐵 𝐵̅ 𝐵
𝐴̅ 𝑚0 𝑚1 𝐴̅ ̅𝑩
𝑨 ̅ ̅𝑩
𝑨
𝐴 𝑚2 𝑚3 𝐴 ̅
𝑨𝑩 𝑨𝑩

𝐵̅ 𝐵 𝐵̅ 𝐵
𝐴̅ 𝐴̅ 1
𝐴 1 𝐴 1
𝑓(𝐴, 𝐵) = 𝐴𝐵 𝑓 (𝐴, 𝐵) = 𝐴̅𝐵̅ + 𝐴𝐵
Figure: Representation of two variable K Map

Example: 𝑓(𝑥, 𝑦) = ∑(𝑚0 , 𝑚2 )


𝑥̅ 𝑥 Since the pair is formed and constant term
𝑦̅ 1 is 𝑥̅ , the answer is 𝑓 (𝑥, 𝑦) = 𝑥̅

𝑦 1

The simplification procedure involves formation of pairs, quads, octaves of the adjacent
cells. Horizontally or vertically. Considering the rolling over of the K-map along its edges
is also permitted. Only a constant literal term among these pairs is considered while
generating the final expression.

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4.5.6 Three-Variable Karnaugh Maps
Since, there are eight min-terms for three variables, the map consists of eight cells or
squares, which is shown in Figure (a) below. It may be noticed that the min-terms are
arranged, not according to the binary sequence, but according to the sequence similar to
the reflected code, which means, between two consecutive rows or columns, only one
single variable changes its logic value from 0 to 1 or from 1 to 0. Figure (b) shows the
relationship between the squares and the variables. Two rows are assigned to 𝐴̅ and 𝐴,
and four columns to 𝐵̅𝐶̅ , 𝐵̅𝐶, 𝐵𝐶 𝑎𝑛𝑑 𝐵𝐶̅ . The min-term 𝑚3 , for example, is assigned in
the square corresponding to row 0 and column 11, thus making the binary number 011.
Another way of analysing the square 𝑚3 is to consider it to be in the row 𝐴̅ and column
𝐵𝐶, as 𝑚3 = 𝐴̅𝐵 𝐶. Note that, each of the variables has four squares where its logic value
is 0 and four squares with logic value
̅𝑪
𝑩 ̅ ̅𝑪
𝑩 𝑩𝑪 𝑩𝑪̅ ̅𝑪
𝑩 ̅ 𝑩 ̅ 𝑪 𝑩𝑪 𝑩𝑪 ̅
̅ 𝑨
𝑨 ̅𝑩̅𝑪
̅ 𝑨
̅𝑩̅𝑪 𝑨
̅ 𝑩𝑪 𝑨
̅ 𝑩𝑪
̅ ̅ 𝒎𝟎 𝒎𝟏 𝒎𝟑 𝒎𝟐
𝑨
̅𝑪
𝑨 𝑨𝑩 ̅ 𝑨𝑩
̅𝑪 𝑨𝑩𝑪 ̅
𝑨𝑩𝑪 𝑨 𝒎𝟒 𝒎𝟓 𝒎𝟕 𝒎𝟔

𝑨̅𝑩
̅ 𝑨̅𝑩 𝑨𝑩 𝑨𝑩̅ ̅𝑩
𝑨 ̅ 𝑨
̅ 𝑩 𝑨𝑩 𝑨𝑩
̅
̅
𝑪 ̅𝑩
𝑨 ̅𝑪
̅ ̅ 𝑩𝑪
𝑨 ̅ ̅
𝑨𝑩𝑪 ̅𝑪
𝑨𝑩 ̅ ̅ 𝒎𝟎 𝒎𝟐 𝒎𝟔 𝒎𝟒
𝑪
𝑪 𝑨
̅𝑩̅𝑪 𝑨
̅ 𝑩 𝑪 𝑨𝑩 𝑪 𝑨𝑩
̅𝑪 𝑪 𝒎𝟏 𝒎𝟑 𝒎𝟕 𝒎𝟓

(a) (b)
Figure: Three variable K-Map (a) Variable term representing each cell
(b) Corresponding min-term representing each cell
Illustrative Example:
Simplify the expression 𝑓 (𝐴, 𝐵, 𝐶 ) = 𝐴̅𝐵̅𝐶̅ + 𝐴̅𝐵̅ 𝐶 + 𝐴̅𝐵𝐶̅ + 𝐴̅𝐵 𝐶 + 𝐴̅𝐵 𝐶
1Solution These five terms will be first marked as ‘1’ in the respective cells
represented by them in the K-map. As per the standard procedure, either pairs or quads
are to be identified observing the adjacent cells marked as ‘1’
𝑨̅𝑩̅ 𝑨̅𝑩 𝑨𝑩 ̅
𝑨𝑩
̅
𝑪 𝟏 𝟏 𝟎 𝟏
𝑪 𝟏 𝟏 𝟎 𝟎

Here, it may be observed that a quad of four adjacent cells is formed, and a pair is
formed rolling over the column 1 and 4. Fetching common terms we have 𝐴̅ from pair
we have 𝐵̅𝐶̅ . Thus, the final expression gets minimized to
𝑓 (𝐴, 𝐵, 𝐶 ) = 𝐴̅ + 𝐵̅𝐶̅
4.5.7 Four Variable K-Map:
For variable Karnaugh maps may be constructed with 16 squares consisting of 16 min
terms as shown in the two adjacent figures below showing the relationship with the
four binary variables. The rows and columns are numbered in a reflected code
sequence, where only one variable is changing its form between two adjacent squares.

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Unit-4 DIGITAL ELECTRONICS
The min term of a particular square can be obtained by combining the row and column.
As an example, the min term of the second row and third column is 𝐴̅𝐵 𝐶 𝐷 or 𝑚7
̅𝑫
𝑪 ̅ ̅𝑫
𝑪 𝑪𝑫 ̅
𝑪𝑫 ̅𝑫
𝑪 ̅ ̅𝑫
𝑪 𝑪𝑫 ̅
𝑪𝑫
̅𝑩
𝑨 ̅ ̅𝑩
𝑨 ̅𝑪
̅𝑫̅ ̅𝑩
𝑨 ̅𝑪
̅𝑫 ̅𝑩
𝑨 ̅ 𝑪𝑫 ̅𝑩
𝑨 ̅ 𝑪𝑫
̅ ̅𝑩
𝑨 ̅ 𝒎𝟎 𝒎𝟏 𝒎𝟑 𝒎𝟐
̅𝑩
𝑨 ̅ 𝑪𝑫
𝑨𝑩 ̅ ̅ 𝑩𝑪
𝑨 ̅𝑫 ̅ 𝑩𝑪𝑫
𝑨 ̅ 𝑩𝑪𝑫
𝑨 ̅ ̅𝑩
𝑨 𝒎𝟒 𝒎𝟓 𝒎𝟕 𝒎𝟔
𝑨𝑩 ̅
𝑨𝑩𝑪𝑫 ̅𝑫
𝑨𝑩𝑪 𝑨𝑩𝑪𝑫 ̅
𝑨𝑩𝑪𝑫 𝑨𝑩 𝒎𝟏𝟐 𝒎𝟏𝟑 𝒎𝟏𝟓 𝒎𝟏𝟒
̅
𝑨𝑩 ̅ 𝑪𝑫
𝑨𝑩 ̅ ̅𝑪
𝑨𝑩 ̅𝑫 ̅ 𝑪𝑫
𝑨𝑩 ̅ 𝑪𝑫
𝑨𝑩 ̅ ̅
𝑨𝑩 𝒎𝟖 𝒎𝟗 𝒎𝟏𝟏 𝒎𝟏𝟎

̅𝑩
𝑨 ̅ ̅𝑩
𝑨 𝑨𝑩 𝑨𝑩̅ ̅𝑩
𝑨 ̅ ̅𝑩
𝑨 𝑨𝑩 ̅
𝑨𝑩
̅𝑫̅ ̅𝑩̅𝑪
̅𝑫̅ ̅ 𝑩𝑪
𝑨 ̅𝑫
̅ ̅𝑫
𝑨𝑩𝑪 ̅ ̅𝑪
𝑨𝑩 ̅𝑫̅ ̅𝑫̅ 𝒎𝟎 𝒎𝟒 𝒎𝟏𝟐 𝒎𝟖
𝑪 𝑨 𝑪
̅𝑫
𝑪 ̅𝑩
𝑨 ̅𝑪
̅𝑫 ̅ 𝑩𝑪
𝑨 ̅𝑫 ̅𝑫
𝑨𝑩𝑪 ̅𝑪
𝑨𝑩 ̅𝑫 ̅𝑫
𝑪 𝒎𝟏 𝒎𝟓 𝒎𝟏𝟑 𝒎𝟗
𝑪𝑫 ̅𝑩
𝑨 ̅ 𝑪𝑫 ̅ 𝑩𝑪𝑫
𝑨 𝑨𝑩𝑪𝑫 ̅ 𝑪𝑫
𝑨𝑩 𝑪𝑫 𝒎𝟑 𝒎𝟕 𝒎𝟏𝟓 𝒎𝟏𝟏
̅ ̅𝑩̅ 𝑪𝑫
̅ ̅ 𝑩𝑪𝑫
𝑨 ̅ ̅
𝑨𝑩𝑪𝑫 ̅ 𝑪𝑫
𝑨𝑩 ̅ ̅ 𝒎𝟐 𝒎𝟔 𝒎𝟏𝟒 𝒎𝟏𝟎
𝑪𝑫 𝑨 𝑪𝑫

The minimization of four-variable Boolean functions using Karnaugh maps is similar to


the method used to minimize three-variable functions. Two, four, or eight adjacent
squares can be combined to reduce the number of literals in a function. The squares of
the top and bottom rows as well as leftmost and rightmost columns may be combined.
For example, 𝑚0 and 𝑚2 can be combined, as can 𝑚4 and 𝑚6 , 𝑚12 and 𝑚14 , 𝑚8 and 𝑚10
.Also 𝑚0 and 𝑚8 ,𝑚1 and 𝑚9 , 𝑚3 and 𝑚11 1, and 𝑚2 and 𝑚10 . Similarly, the four squares of
the corners i.e., the min terms 𝑚0 , 𝑚2 , 𝑚8 , and 𝑚10 can also be combined.
When two adjacent squares are combined, it is called a pair and represents a term with
three literals. Four adjacent squares, when combined, are called a quad and its number
of literals is two. If eight adjacent squares are combined, it is called an octet and
represents a term with one literal. If, in the case all sixteen squares can be combined,
the function will be reduced to 1.

Illustrative Example:

1. Simplify the given function using K-map


𝑓 (𝐴𝐵𝐶𝐷 ) = ∑(2,3,4,5,7,8,10,13,15)

Solution: A K-Map generated for the expression marking the terms appearing in the
expression

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Unit-4 DIGITAL ELECTRONICS

The resultant terms are

The minimized expression is 𝑓 (𝐴, 𝐵, 𝐶, 𝐷 ) = 𝐵𝐷 + 𝐴̅𝐵 𝐶̅ + 𝐵̅ 𝐶𝐷


̅ + 𝐴𝐵̅ 𝐷
̅
2. Simplify using K-Map and implement using basic logic gates.
Y=𝑓(𝑃, 𝑄, 𝑅, 𝑆) = ∑ 𝑚(0,1,6,7,8,9,10,11,14,15)
Solution: Lets mark the min-terms in the K- map

𝑃̅𝑄̅ 𝑃̅Q 𝑃𝑄 𝑃𝑄̅


𝑅̅ 𝑆̅ 𝟏 𝟎 𝟎 𝟏 The resultant terms are
𝑅̅ 𝑆 𝟏 𝟎 𝟎 𝟏 1 ⟹ 𝑄̅ 𝑅̅
𝑅𝑆 𝟎 𝟏 𝟏 𝟏 2 ⟹ 𝑃𝑄̅
𝑅𝑆̅ 𝟎 𝟏 𝟏 𝟏 3 ⟹ 𝑄𝑅

̅𝑅
𝑌 = 𝑓(𝑃, 𝑄, 𝑅, 𝑆) = 𝑄 ̅ + 𝑃𝑄
̅+ 𝑄𝑅

Please note that this circuit is built using basic gates and each input is marked separately.
One may choose a common input select line and its complement, to connect respective logic
gates.

3. Simplify the expression 𝑦 = (𝐴, 𝐵, 𝐶, 𝐷) = ∏ 𝑀(0, 1,2, 4, 5, 6, 8, 9, 10,12, 13, 14).


Realize the expression using basic logic gates and NOR gates

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Unit-4 DIGITAL ELECTRONICS
Solution: Since it’s a POS expression we are going to mark 0s in the cells

Though it is ensured that there is minimum delicacy to be considered while grouping


the cells, two groups of 8 cells are formed to minimize the number of variables in the
resultant expression.
̅𝑫
The final expression is 𝒚 = (𝑨, 𝑩, 𝑪, 𝑫) = 𝑪 ̅
Realization using basic and universal gate

4.5.8 Five-Variable Karnaugh Maps- Karnaugh maps with more than four variables
are not simple to use. The number of cells or squares becomes excessively large and
combining the adjacent squares becomes complex. The number of cells or squares is
always equal to the number of min terms. A five-variable Karnaugh map contains 25 or
32 cells, which are used to simplify any five-variable logic function
̅𝑫
𝑪 ̅𝑬
̅ ̅𝑫
𝑪 ̅𝑬 ̅ 𝑫E
𝑪 ̅𝑫𝑬
𝑪 ̅ 𝑪𝑫𝑬 ̅ 𝑪 𝑫 𝑬 𝑪𝑫
̅ 𝑬 𝑪𝑫
̅𝑬̅

̅𝑩
𝑨 ̅ 𝒎𝟎 𝒎𝟏 𝒎𝟑 𝒎𝟐 𝒎𝟔 𝒎𝟕 𝒎𝟓 𝒎𝟒
̅𝑩
𝑨 𝒎𝟖 𝒎𝟗 𝒎𝟏𝟏 𝒎𝟏𝟎 𝒎𝟏𝟒 𝒎𝟏𝟓 𝒎𝟏𝟑 𝒎𝟏𝟐

𝑨𝑩 𝒎𝟐𝟒 𝒎𝟐𝟓 𝒎𝟐𝟕 𝒎𝟐𝟔 𝒎𝟑𝟎 𝒎𝟑𝟏 𝒎𝟐𝟗 𝒎𝟐𝟖


̅
𝑨𝑩 𝒎𝟏𝟔 𝒎𝟏𝟕 𝒎𝟏𝟗 𝒎𝟏𝟖 𝒎𝟐𝟐 𝒎𝟐𝟑 𝒎𝟐𝟏 𝒎𝟐𝟎

̅𝑫
𝑪 ̅𝑬
̅ ̅𝑫
𝑪 ̅𝑬 ̅𝑫E
𝑪 ̅𝑫𝑬
𝑪 ̅ ̅
𝑪𝑫𝑬 𝑪𝑫𝑬 ̅𝑬
𝑪𝑫 ̅𝑬
𝑪𝑫 ̅

̅𝑩
𝑨 ̅ 𝑨′𝑩′𝑪′𝑫′𝑬′ 𝑨′𝑩′𝑪′𝑫′𝑬 𝑨′ 𝑩′ 𝑪′ 𝑫𝑬 𝑨′ 𝑩′ 𝑪′ 𝑫𝑬′ 𝑨′𝑩′𝑪𝑫𝑬′ 𝑨′𝑩′𝑪𝑫𝑬 𝑨′𝑩′𝑪𝑫′𝑬 𝑨′𝑩′𝑪𝑫′𝑬′

̅𝑩
𝑨 𝑨′𝑩𝑪′𝑫′𝑬′ 𝑨′𝑩𝑪′𝑫′𝑬 𝑨′𝑩𝑪′𝑫𝑬 𝑨′𝑩𝑪′𝑫𝑬′ 𝑨′𝑩𝑪𝑫𝑬′ 𝑨′𝑩𝑪𝑫𝑬 𝑨′𝑩𝑪𝑫′𝑬 𝑨′𝑩𝑪𝑫′𝑬′

𝑨𝑩 𝑨𝑩𝑪′𝑪′𝑬′ 𝑨𝑩𝑪′𝑫′𝑬 𝑨𝑩𝑪′𝑫𝑬 𝑨𝑩𝑪′𝑫𝑬′ 𝑨𝑩𝑪𝑫𝑬′ ABCDE 𝑨𝑩𝑪𝑫′𝑬 𝑨𝑩𝑪𝑫′𝑫′

̅
𝑨𝑩 𝑨𝑩′𝑪′𝑫′𝑬′ 𝑨𝑩′𝑪′𝑫′𝑬 𝑨𝑩′𝑪′𝑫𝑬 𝑨𝑩′𝑪′𝑫𝑬′ 𝑨𝑩′𝑪𝑫𝑬′ 𝑨𝑩′𝑪𝑫𝑬 𝑨𝑩′𝑪𝑫′𝑬 𝑨𝑩′𝑪𝑫′𝑬′

The five-variable Karnaugh maps have properties similar to the two-, three-, or four-
variable Karnaugh maps described earlier, i.e., adjacent squares can be grouped
together. In addition to those, while making groups or combinations, in Figures
below, the 1st column with 4th column, 2nd column with 7th column, and 3rd
column with 6th column can be combined together, as there is only one variable

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Unit-4 DIGITAL ELECTRONICS
which is changing its form for those columns. Similarly, the alternate arrangement in
the next figures indicate the 1st row with 4th row, 2nd row with 7th row, and 3rd
row with 6th row can be combined together to get the terms of reduced literals.
𝑨′𝑩′𝑪′ 𝑨′𝑩′𝑪 𝑨′𝑩𝑪 𝑨′ 𝑩𝑪′ 𝑨 𝑩 𝑪′ 𝑨𝑩𝑪 𝑨𝑩′𝑪 𝑨𝑩′𝑪′

𝑪′𝑫′ 𝒎𝟎 𝒎𝟒 𝒎𝟏𝟐 𝒎𝟖 𝒎𝟐𝟒 𝒎𝟐𝟖 𝒎𝟐𝟎 𝒎𝟏𝟔


𝑪′𝑫 𝒎𝟏 𝒎𝟓 𝒎𝟏𝟑 𝒎𝟗 𝒎𝟎𝟐𝟓 𝒎𝟐𝟗 𝒎𝟐𝟏 𝒎𝟏𝟕
𝑪𝑫 𝒎𝟑 𝒎𝟕 𝒎𝟏𝟓 𝒎𝟏𝟏 𝒎𝟐𝟕 𝒎𝟑𝟐 𝒎𝟐𝟑 𝒎𝟏𝟗
𝑪𝑫′ 𝒎𝟐 𝒎𝟔 𝒎𝟏𝟒 𝒎𝟏𝟎 𝒎𝟐𝟔 𝒎𝟑𝟎 𝒎𝟐𝟐 𝒎𝟏𝟖

The arrangement can be considered in a vertical fashion with two literals varying
across the column and three along across the rows. The counting will be then
incrementing horizontally.
𝑫′𝑬′ 𝑫′𝑬 𝑫𝑬 𝑫𝑬′ 𝑨′𝑩′ 𝑨′ 𝑩 𝑨𝑩 𝑨𝑩′
𝑨′𝑩′𝑪′ 𝑪’𝑫’𝑬’ 𝒎𝟎 𝒎𝟖 𝒎𝟐𝟒 𝒎𝟏𝟔
𝒎𝟎 𝒎𝟏 𝒎𝟑 𝒎𝟐
𝑨′𝑩′𝑪 𝑪′𝑫′𝑬 𝒎𝟏 𝒎𝟗 𝒎𝟐𝟓 𝒎𝟏𝟕
𝒎𝟒 𝒎𝟓 𝒎𝟕 𝒎𝟔
𝑨′ 𝑩𝑪 𝒎𝟏𝟐 𝒎𝟏𝟑 𝒎𝟏𝟓 𝒎𝟏𝟒
𝑪′ 𝑫𝑬 𝒎𝟑 𝒎𝟏𝟏 𝒎𝟐𝟕 𝒎𝟏𝟗

𝑨′ 𝑩𝑪′ 𝒎𝟖 𝒎𝟗 𝒎𝟏𝟏 𝒎𝟏𝟎


𝑪′𝑫𝑬′ 𝒎𝟐 𝒎𝟏𝟎 𝒎𝟐𝟔 𝒎𝟏𝟖

𝑨𝑩𝑪′ 𝑪𝑫𝑬′ 𝒎𝟔 𝒎𝟏𝟒 𝒎𝟑𝟎 𝒎𝟐𝟐


𝒎𝟐𝟒 𝒎𝟐𝟓 𝒎𝟐𝟕 𝒎𝟐𝟔
𝑨𝑩𝑪 𝑪𝑫𝑬 𝒎𝟕 𝒎𝟏𝟓 𝒎𝟑𝟏 𝒎𝟐𝟑
𝒎𝟐𝟖 𝒎𝟐𝟗 𝒎𝟑𝟏 𝒎𝟑𝟎
𝑨𝑩′𝑪 𝑪𝑫′𝑬 𝒎𝟓 𝒎𝟏𝟑 𝒎𝟐𝟗 𝒎𝟐𝟏
𝒎𝟐𝟎 𝒎𝟐𝟏 𝒎𝟐𝟑 𝒎𝟐𝟐
𝑨𝑩′𝑪′ 𝑪𝑫′𝑬′ 𝒎𝟒 𝒎𝟏𝟐 𝒎𝟐𝟖 𝒎𝟐𝟎
𝒎𝟏𝟔 𝒎𝟏𝟕 𝒎𝟏𝟗 𝒎𝟏𝟖

4.5.9 Six Variable K-Map:


Six-variable Karnaugh maps consist of 26 or 64 squares or cells. Like the method
described above, six-variable Karnaugh maps are formed with 64 min terms as
demonstrated in Figures. There is also another representation of six-variable Karnaugh
maps when the variables are assigned differently as indicated in the second figure given
below. The row variables can be exchanged with the column variables altering the cell
incrementing pattern from horizontal to vertical.
𝑫′𝑬′𝑭 𝑫′𝑬′𝑭 𝑫′𝑬𝑭 𝑫′𝑬𝑭′ 𝑫𝑬𝑭′ 𝑫𝑬𝑭 𝑫𝑬′𝑭 𝑫𝑬′𝑭′
𝑨′𝑩′𝑪′ 𝒎𝟒 𝒎𝟓 𝒎𝟕 𝒎𝟔
𝒎𝟎 𝒎𝟏 𝒎𝟑 𝒎𝟐
𝑨′𝑩′𝑪 𝒎𝟖 𝒎𝟗 𝒎𝟏𝟏 𝒎𝟏𝟎 𝒎𝟏𝟐 𝒎𝟏𝟑 𝒎𝟏𝟓 𝒎𝟏𝟒

𝑨′ 𝑩𝑪 𝒎𝟐𝟒 𝒎𝟐𝟓 𝒎𝟐𝟕 𝒎𝟐𝟔 𝒎𝟐𝟖 𝒎𝟐𝟗 𝒎𝟑𝟏 𝒎𝟑𝟎

𝑨′ 𝑩𝑪′ 𝒎𝟏𝟔 𝒎𝟏𝟕 𝒎𝟏𝟗 𝒎𝟏𝟖 𝒎𝟐𝟎 𝒎𝟐𝟏 𝒎𝟐𝟑 𝒎𝟐𝟐

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Unit-4 DIGITAL ELECTRONICS

𝑨𝑩𝑪′
𝒎𝟒𝟖 𝒎𝟒𝟗 𝒎𝟓𝟏 𝒎𝟓𝟎 𝒎𝟓𝟒 𝒎𝟓𝟓 𝒎𝟓𝟑 𝒎𝟓𝟐

𝑨𝑩𝑪 𝒎𝟔𝟐 𝒎𝟔𝟑 𝒎𝟔𝟏 𝒎𝟔𝟎


𝒎𝟓𝟔 𝒎𝟓𝟕 𝒎𝟓𝟗 𝒎𝟓𝟖
𝑨𝑩′𝑪
𝒎𝟒𝟎 𝒎𝟒𝟏 𝒎𝟒𝟑 𝒎𝟒𝟐 𝒎𝟒𝟔 𝒎𝟒𝟕 𝒎𝟒𝟓 𝒎𝟒𝟒

𝑨𝑩′𝑪′
𝒎𝟑𝟐 𝒎𝟑𝟑 𝒎𝟑𝟓 𝒎𝟑𝟒 𝒎𝟑𝟖 𝒎𝟑𝟗 𝒎𝟑𝟕 𝒎𝟑𝟔

Figure: K-Map Representation Of 6 Variable Logic Function-Type-1


𝑨′𝑩′𝑪 𝑨′𝑩′𝑪 𝑨′ 𝑩𝑪 𝑨′ 𝑩𝑪′ 𝑨𝑩𝑪′ 𝑨𝑩𝑪 𝑨𝑩′𝑪 𝑨𝑩′𝑪′
𝑫′𝑬𝑭′ 𝒎𝟒𝟖 𝒎𝟓𝟔 𝒎𝟒𝟎 𝒎𝟑𝟐
𝒎𝟎 𝒎𝟖 𝒎𝟐𝟒 𝒎𝟏𝟔
𝑫′𝑬′𝑭 𝒎𝟒𝟗 𝒎𝟓𝟕 𝒎𝟒𝟏 𝒎𝟑𝟑
𝒎𝟏 𝒎𝟗 𝒎𝟐𝟓 𝒎𝟏𝟕
𝑫′𝑬𝑭 𝒎𝟓𝟏 𝒎𝟓𝟗 𝒎𝟒𝟑 𝒎𝟑𝟓
𝒎𝟑 𝒎𝟏𝟏 𝒎𝟐𝟕 𝒎𝟏𝟗
𝑫′𝑬𝑭′ 𝒎𝟓𝟎 𝒎𝟓𝟖 𝒎𝟒𝟐 𝒎𝟑𝟒
𝒎𝟐 𝒎𝟏𝟎 𝒎𝟐𝟔 𝒎𝟏𝟖

𝑫𝑬𝑭′ 𝒎𝟓𝟒 𝒎𝟔𝟐 𝒎𝟒𝟔 𝒎𝟑𝟖


𝒎𝟔 𝒎𝟏𝟒 𝒎𝟑𝟎 𝒎𝟐𝟐
𝑫𝑬𝑭 𝒎𝟓𝟓 𝒎𝟔𝟑 𝒎𝟒𝟕 𝒎𝟑𝟗
𝒎𝟕 𝒎𝟏𝟓 𝒎𝟑𝟏 𝒎𝟐𝟑
𝑫𝑬′𝑭
𝒎𝟓 𝒎𝟏𝟑 𝒎𝟐𝟗 𝒎𝟐𝟏 𝒎𝟓𝟑 𝒎𝟔𝟏 𝒎𝟒𝟓 𝒎𝟑𝟕

𝑫𝑬′𝑭′ 𝒎𝟓𝟐 𝒎𝟔𝟎 𝒎𝟒𝟒 𝒎𝟑𝟔


𝒎𝟒 𝒎𝟏𝟐 𝒎𝟐𝟖 𝒎𝟐𝟎
Figure: K-Map Representation Of 6 Variable Logic Function-Type-2

4.5.10 DON’T-CARE CONDITION:


In certain digital systems, some input combinations never occur during the process of a
normal operation because those input conditions are guaranteed never to occur. Such
input combinations are called Don’t-Care Combinations. The function output may be
either 1 or 0 and these functions are called incompletely specified functions. These
input combinations can be plotted on the Karnaugh map for further simplification of the
function. The don’t care combinations are represented by d or x or Φ.
When an incompletely specified function, i.e., a function with don’t-care combinations is
simplified to obtain minimal SOP expression, the value 1 can be assigned to the selected
don’t care combinations. This is done to form groups like pairs, quad, octet, etc., for
further simplification. In each case, choice depends only on need to achieve
simplification. Similarly, selected don’t care combinations may be assumed as 0s to form
groups of 0s for obtaining the POS expression.

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Unit-4 DIGITAL ELECTRONICS
Illustrative Examples:
1. Obtain the minimal sum of the products for the function
𝑓 (𝐴, 𝐵, 𝐶, 𝐷) = 𝛴 (1,3,7,11,15) + 𝛷(0,2,5)
Solution:
In the Karnaugh map contains the min term m 0 and m2 i.e., A′B′C′D′ and A′B′CD′, are the
don’t care terms which have been assumed as 1s, while making a quad. The simplified
SOP expression of above function can be written as

The answer is
𝑨′ 𝑩′ + 𝑪𝑫

2. Use K Map to simplify the following expressions


a. 𝑬 = 𝑨′ 𝑩𝑪 + 𝑩′ 𝑪𝑫 + 𝑨𝑪 + 𝑨′ 𝑩′ 𝑪𝑫′
b. 𝑬 = 𝑨𝑩𝑪 + 𝑩𝑪𝑫 + 𝑨𝑪 + 𝑩𝑪
Solution:

3. Simplify the logic expression using K-map and realize using basic gates
𝑿 = 𝑨′ 𝑩′ 𝑫′ + 𝑨𝑪′ 𝑫′ + 𝑨′ 𝑩𝑪′ + 𝑨𝑵𝒄′ 𝑫 + 𝑨𝑩𝑪𝑫′
Solution: after mapping the cells on to the K-map we have,

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Unit-4 DIGITAL ELECTRONICS
The hardware realization of the resultant expression is

Apart from the properties described for two-, three- and four-variable Karnaugh maps
that adjacent squares can be grouped together, similar to five-variable maps, the 1st
column with 4th column, 2nd column with 7th column, 3rd column with 6th column, 1st
row with 4th row, 2nd row with 7th row, and 3rd row with 6th row can be combined
together to get the terms of reduced literals.

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Unit-4 DIGITAL ELECTRONICS

Six Variable K-Map -Six-variable Karnaugh maps consist of 26 or 64 squares or cells.


Similar to the method described above, six-variable Karnaugh maps are formed with
64 min terms as demonstrated in Figures. There is also another representation of
six-variable Karnaugh maps when the variables are assigned differently as indicated
in the second figure given below
Apart from the properties described for two-, three- and four-variable Karnaugh
maps that adjacent squares can be grouped together, similar to five-variable maps,
the 1st column with 4th column, 2nd column with 7th column, 3rd column with 6th
column, 1st row with 4th row, 2nd row with 7th row, and 3rd row with 6th row can
be combined together to get the terms of reduced literals.

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