0% found this document useful (0 votes)
16 views3 pages

DSP - FAQ Unit 4

This document is a Frequently Asked Questions (FAQ) guide for a Digital Signal Processing course at Bharathidasan Engineering College, focusing on finite word length effects. It includes both Part A and Part B with questions covering quantization, limit cycle oscillations, and various arithmetic representations. The document serves as a resource for students to understand key concepts and prepare for examinations.

Uploaded by

freefire47049
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
0% found this document useful (0 votes)
16 views3 pages

DSP - FAQ Unit 4

This document is a Frequently Asked Questions (FAQ) guide for a Digital Signal Processing course at Bharathidasan Engineering College, focusing on finite word length effects. It includes both Part A and Part B with questions covering quantization, limit cycle oscillations, and various arithmetic representations. The document serves as a resource for students to understand key concepts and prepare for examinations.

Uploaded by

freefire47049
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
You are on page 1/ 3

BHARATHIDASAN ENGINEERING COLLEGE

NATTARAMPALLI – 635854
Frequently Asked Questions (FAQ)
UNIT 4 - FINITE WORD LENGTH EFFECTS
Degree / Branch : B.E / ECE Sem / Year : 4th / 2rd
Sub Name : Digital Signal Processing Sub Code : EC3492

Part – A
1. What are the two types of quantization employed in digital system? (May 2013)
2. Define zero input limit cycle oscillations. (May 2013)
3. What do you understand by input quantization error? (Nov 2013)
4. State the methods to prevent overflow. (Nov 2013) (May 2016) (May 2017)
5. State the need for scaling in filter implementation. (May 2014)
6. What is product round off noise? (May 2014)
7. What is scaling? (Nov 2014)
8. What is dead band of a filter? (Nov 2014) (May 2016) (May 2017)
9. List the representations for which truncation error is analyzed. (Nov 2015)
10. What does the truncation of data result in? (Nov 2015)
11. What are the different types of fixed point representation? (Nov 2016)
12. Name the three quantization error due to finite word length registers in digital filters.
(Nov 2016)
13. Compare the fixed point and floating point number representations. (Nov 2017)
(April 2018) (Nov 2020) (Nov/Dec 2022)
14. What is meant by finite word length effects in digital system? (Nov 2017)
15. Why is rounding preferred over truncation in realizing a digital filter? (April 2018)
16. What is round-off noise error?
17. What is quantization error?What is product quantization error? (Nov/Dec 2022)
18. What is overflow oscillations? Discuss the methods to prevent overflow? (Nov/Dec 2024)
19. What is meant by fixed point arithmetic? Give example.
20. What is meant by floating point arithmetic? Give example. (Nov/Dec 2024)
21. What are the advantages of floating point arithmetic?
22. What are the different types of arithmetic in digital systems?
23. What is rounding?
24. What is saturation arithmetic?
25. What is the drawback in saturation arithmetic?
26. Express – 0.125 in floating point binary representation. (Nov 2020)
27. Outline the characteristics of error in product quantization. (Nov 2020)
28. What do you infer from overflow error? (Nov 2021)
29. What is the need for pipelining in digital signal processors?
30. What are the different types of architecture available for general purpose digital
signal processor?

Prepared by P. Rajkumar, HOD/ECE


Part – B
1. Discuss the various common methods of quantization. (8) (Nov 2013) (Nov 2017)
2. Explain the finite word length effects in FIR digital filters. (8) (Nov 2013)
3. Describe the quantization in floating point realization of IIR digital filters. (Nov 2013)
4. Represent the following numbers in floating point format with five bits for mantissa and
three bits for exponent. (8) (May 2013)
i. 710 ii. 0.2510 iii. -710 iv. 0.2510

5. Draw the product quantization noise model of second order IIR system. (8) (May 2013)

6. Explain how signal scaling is used to prevent overflow limit cycle in the digital filter
implementation with an example. (8) (May 2013)

7. Determine the dead band of the system 𝑦(𝑛) = 0.2𝑦(𝑛 − 1) + 0.5𝑦(𝑛 − 2) + 𝑥(𝑛).
Assume 8 bits are used for signal representation. (8) (May 2013)

8. Explain the characteristics of limit cycle oscillation with respect to the system described
by the difference equation.(8) (May 2014) (Nov 2017)

𝑦(𝑛) = 0.95𝑦(𝑛 − 1) + 𝑥(𝑛).

𝑦(𝑛) = 0.875 for n=0 & 𝑥(𝑛) = 0 otherwise

Determine the dead band range of the system. (Nov/Dec 2024)

9. Explain the effect of coefficient quantization of FIR filters. (8) (May 2014)

10. Derive the signal to quantization noise ratio of A/D converter.(8) (May 2014)

11. Describe the quantization process and errors introduced due to quantization. (Nov/Dec 2022)

12. Compare truncation and rounding errors using fixed point and floating point
representation.(8) (May 2014)

13. Discuss the following : (May 2014)

i. Product quantization error

ii. Limit cycle oscillations

14. Derive the equation for rounding and truncation errors. (8) (May 2014)

15. Derive the equation for quantization noise power. (8) (May 2014)
0.5 𝑧
16. The output of an ADC is applied to a digital filter with system function 𝐻(𝑧) = 𝑧−0.5.

Find the output noise power from digital filter when input signal is quantized to have 8
bits. (Nov 2015)

Prepared by P. Rajkumar, HOD/ECE


17. A digital system is characterized by the difference equation 𝑦(𝑛) = 0.9 𝑦(𝑛 − 1) + 𝑥(𝑛)
with x(0)=0 and initial condition y(-1)=12. Find the dead band of the system. (Nov 2015)
1
18. Find the second order IIR filter ,the system fraction is 𝐻1 (𝑧) = (1−0.5𝑧 −1 ) (1−0.45𝑧 −1 ) .

Examine the effect of shift in pole location with 3 bit coeffient representation in direct and
cascade forms. (Nov/Dec 2022)
1
19. Consider the transfer function H(z)=H1(z).H2(z) where 𝐻1 (𝑧) = 1−𝑎1𝑧 −1 and 𝐻2 (𝑧) =
1
. Find the output round off noise power by assuming a1=0.5, a2=0.6. (May 2016)
1−𝑎2𝑧 −1

(April 2017)

20. Explain the characteristics of limit cycle oscillation with respect to the system described
by the difference equation 𝑦(𝑛) = 0.95𝑦(𝑛 − 1) + 𝑥(𝑛). Determine the dead band of the
filter. (May 2016) (April 2017)

21. Study the limit cycle behaviour of the system described by 𝑤(𝑛) = 𝑄[𝑎𝑤(𝑛 − 1)] +
𝑥(𝑛), where w(n) is the output of the filter and Q is quantization. Assume a=7/8, x(0) = ¾
and x(n)=0 for n>0. Choose 4 bit sign magnitude. (Nov 2016)

22. Define zero input limit cycle oscillation and explain. (Nov 2017)

23. Briefly explain the following (April 2018)

A.Coefficient quantization error B. Product quantization error C. Truncation and Rounding

24. Explain in detail about the three quantization error with relevant mathematical expressions.
(Nov 2021)

25. Discuss in detail about limit cycle oscillations due to product quantization and
summation with an example. (Nov 2021)

26. Discuss the effects of finite word length in the implementation of the FFT
algorithms using fixed point arithmetic. (Nov 2020)

27. Explain the effects of coefficient quantization in Direct Form Realization of

IIR filter. (Nov 2020)

28. Describe the quantization process and errors introduced due to quantization. (Nov/Dec 2022)
Determine the Direct form realization of system function
H ( z )  1  2 z 1  3z 2  4 z 3  5z 4
1
29. Realize the first order transfer function 𝐻1 (𝑧) = 1−𝑎1𝑧 −1 and draw the quantization noise

model. Find the steady state noise power due to product round off. (Nov/Dec 2024)

Prepared by P. Rajkumar, HOD/ECE

You might also like