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THE ELECTRICAL
ENGINEERING
HANDBOOK
This page intentionally left blank
THE ELECTRICAL
ENGINEERING
HANDBOOK

WAI-KAI CHEN
EDITOR

AMSTERDAM • BOSTON • HEIDELBERG • LONDON

NEW YORK • OXFORD • PARIS • SAN DIEGO
SAN FRANCISCO • SINGAPORE • SYDNEY • TOKYO
Academic Press is an imprint of Elsevier
Elsevier Academic Press
200 Wheeler Road, 6th Floor, Burlington, MA 01803, USA
525 B Street, Suite 1900, San Diego, California 92101-4495, USA
84 Theobald’s Road, London WC1X 8RR, UK

This book is printed on acid-free paper. ⬁

Copyright ß 2004, Elsevier Inc. All rights reserved.

No part of this publication may be reproduced or transmitted in any

form or by any means, electronic or mechanical, including photocopy,
recording, or any information storage and retrieval system, without
permission in writing from the publisher.

Permissions may be sought directly from Elsevier’s Science & Technology

Rights Department in Oxford, UK: phone: (+44) 1865 843830,
fax: (+44) 1865 853333, e-mail: [email protected].
You may also complete your request on-line via the Elsevier homepage
(http://elsevier.com), by selecting ‘‘Customer Support’’ and then ‘‘Obtaining Permissions.’’

Library of Congress Cataloging-in-Publication Data

Application submitted

British Library Cataloguing in Publication Data

A catalogue record for this book is available from the British Library

ISBN: 0-12-170960-4

For all information on all Academic Press publications

visit our Web site at www.books.elsevier.com

04 05 06 07 08 09 9 8 7 6 5 4 3 2 1

Printed in the United States of America

 Contents

Contributors . . . . . . . . . . . . . . . . . . . . . . . . . . . xiv 6 Semiconductors . . . . . . . . . . . . . . . . . . . . . . 153

Preface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . xv Michael Shur
Editor-in-Chief . . . . . . . . . . . . . . . . . . . . . . . . . . xvii
7 Power Semiconductor Devices . . . . . . . . . . . . 163
Maylay Trivedi and Krishna Shenai
I Circuit Theory . . . . . . . . . . . . . . . . . . . . . 1
Krishnaiyan Thulasiraman
III VLSI systems . . . . . . . . . . . . . . . . . . . . . 177
1 Linear Circuit Analysis . . . . . . . . . . . . . . . . . 3 Magdy Bayoumi
P.K. Rajan and Arun Sekar

2 Circuit Analysis: 1 Logarithmic and Residue Number

A Graph-Theoretic Foundation . . . . . . . . . . . . 31 Systems for VLSI Arithmetic . . . . . . . . . . . . . 179
Krishnaiyan Thulasiraman and M.N.S. Swamy Thanos Stouraitis

3 Computer-Aided Design. . . . . . . . . . . . . . . . . 43 2 Custom Memory Organization and

Ajoy Opal Data Transfer: Architectural Issues and
Exploration Methods . . . . . . . . . . . . . . . . . . . 191
4 Synthesis of Networks . . . . . . . . . . . . . . . . . . 53
Francky Catthoor, Erik Brockmeyer,
Jiri Vlach
Koen Danckaert, Chidamber Kulkani,
5 Nonlinear Circuits. . . . . . . . . . . . . . . . . . . . . 75 Lode Nachtergaele, and Arnout
Ljiljana Trajković Vandecappelle

II Electronics . . . . . . . . . . . . . . . . . . . . . . . 83 3 The Role of Hardware Description

Krishna Shenai Languages in the Design Process of
Multinature Systems . . . . . . . . . . . . . . . . . . . 217
Sorin A. Huss
1 Investigation of Power Management Issues
for Future Generation Microprocessors . . . . . . 85
4 Clock Skew Scheduling for Improved
Fred C. Lee and Xunwei Zhou
Reliability . . . . . . . . . . . . . . . . . . . . . . . . . . 231
2 Noise in Analog and Digital Systems . . . . . . . . 101 Ivan S. Kourtev and Eby G. Friedman
Erik A. McShane and Krishna Shenai
5 Trends in Low-Power VLSI Design . . . . . . . . . 263
3 Field Effect Transistors . . . . . . . . . . . . . . . . . 109 Tarek Darwish and Magdy Bayoumi
Veena Misra and Mehmet C. Öztürk
6 Production and Utilization of
4 Active Filters . . . . . . . . . . . . . . . . . . . . . . . . 127 Micro Electro Mechanical Systems. . . . . . . . . . 281
Rolf Schaumann David J. Nagel and Mona E. Zaghloul

5 Junction Diodes and Bipolar Junction 7 Noise Analysis and Design in Deep
Transistors . . . . . . . . . . . . . . . . . . . . . . . . . . 139 Submicron Technology . . . . . . . . . . . . . . . . . 299
Michael Schröter Mohamed Elgamel and Magdy Bayoumi

Copyright ß 2004 by Academic Press. v

All rights of reproduction in any form reserved.
vi Contents

8 Interconnect Noise Analysis and Optimization 4 Transmission Lines . . . . . . . . . . . . . . . . . 525

in Deep Submicron Technology . . . . . . . . . . . 311 Krishna Naishadham
Mohamed Elgamel and Magdy Bayoumi
5 Guided Waves . . . . . . . . . . . . . . . . . . . . . . 539
IV Digital Systems and Computer Franco De Flaviis
Engineering . . . . . . . . . . . . . . . . . . . . . 321
Sun-Yung Kung and Benjamin W. Wah 6 Antennas and Radiation . . . . . . . . . . . . . . . 553
Nirod K. Das
I Antenna Fundamentals . . . . . . . . . . . . . . . . 553
1 Computer Architecture. . . . . . . . . . . . . . . . . 323 II Antenna Elements and Arrays . . . . . . . . . . . 569
Morris Chang
7 Microwave Passive Components . . . . . . . . . . 585
2 Multiprocessors . . . . . . . . . . . . . . . . . . . . . . 335 Ke Wu, Lei Zhu, and Ruediger Vahldieck
Peter Y. K. Cheung, George A.
Constantinides, and Wayne Luk 8 Computational Electromagnetics: The
Method of Moments . . . . . . . . . . . . . . . . . . 619
3 Configurable Computing . . . . . . . . . . . . . . . 343 Jian-Ming Jin and Weng Cho Chew
Wayne Luk, Peter Y. K. Cheung, and Nabeel Shirazi
9 Computational Electromagnetics: The Finite-
4 Operating Systems . . . . . . . . . . . . . . . . . . . . 355 Difference Time-Domain Method . . . . . . . 629
Yao-Nan Lien Allen Taflove, Susan C. Hagness
and Melinda Piket-May
5 Expert Systems . . . . . . . . . . . . . . . . . . . . . . 367
10 Radar and Inverse Scattering . . . . . . . . . . . . 671
Yi Shang
Hsueh-Jyh Li and Yean-Woei Kiang
6 Multimedia Systems: Content-Based 11 Microwave Active Circuits and Integrated
Indexing and Retrieval . . . . . . . . . . . . . . . . . 379 Antennas. . . . . . . . . . . . . . . . . . . . . . . . . . 691
Faisal Bashir, Shashank Khanvilkar, Ashfaq Khokhar, William R. Deal, Vesna Radisic,
and Dan Schonfeld Yongxi Qian, and Tatsuo Itoh

7 Multimedia Networks and Communication . . 401

Shashank Khanvilkar, Faisal Bashir, VI Electric Power Systems . . . . . . . . . . . . 707
Dan Schonfeld, and Ashfaq Khokhar Anjan Bose

8 Fault Tolerance in Computer Systems—From 1 Three-Phase Alternating Current Systems . . . 709

Circuits to Algorithms . . . . . . . . . . . . . . . . . 427 Anjan Bose
Shantanu Dutt, Federico Rota, Franco Trovo,
and Fran Hanchek 2 Electric Power System Components . . . . . . . 713
Anjan Bose
9 High-Level Petri Nets—Extensions,
Analysis, and Applications . . . . . . . . . . . . . . 459 3 Power Transformers . . . . . . . . . . . . . . . . . . 715
Xudong He and Tadao Murata Bob C. Degeneff

V Electromagnetics . . . . . . . . . . . . . . . . . . 477 4 Introduction to Electric Machines . . . . . . . . 721

Hung-Yu David Yang Sheppard Joel Salon

5 High-Voltage Transmission . . . . . . . . . . . . . 737

1 Magnetostatics . . . . . . . . . . . . . . . . . . . . . . 479 Ravi S. Gorur
Keith W. Whites
6 Power Distribution. . . . . . . . . . . . . . . . . . . 749
2 Electrostatics. . . . . . . . . . . . . . . . . . . . . . . . 499 Turan Gönen
Rodolfo E. Diaz
7 Power System Analysis . . . . . . . . . . . . . . . . 761
3 Plane Wave Propagation and Reflection .... 513 Mani Venkatasubramanian
David R. Jackson and Kevin Tomsovic
Contents vii

8 Power System Operation and Control . . . . . . 779 5 Data Communication Concepts. . . . . . . . . . . 983
Mani Venkatasubramanian Vijay K. Garg and Yih-Chen Wang
and Kevin Tomsovic
6 Communication Network
9 Fundamentals of Power System Architecture . . . . . . . . . . . . . . . . . . . . . . . . 989
Protection . . . . . . . . . . . . . . . . . . . . . . . . . 787 Vijay K. Garg and Yih-Chen Wang
Mladen Kezunovic
7 Wireless Network Access
10 Electric Power Quality ............... 805 Technologies . . . . . . . . . . . . . . . . . . . . . . . . 1005
Gerald T. Heydt Vijay K. Garg and Yih-Chen Wang

VII Signal Processing. . . . . . . . . . . . . . . . . 811 8 Convergence of Networking

Yih-Fang Huang Technologies . . . . . . . . . . . . . . . . . . . . . . . . 1011
Vijay K. Garg and Yih-Chen Wang
1 Signals and Systems . . . . . . . . . . . . . . . . . . . 813
Rashid Ansari and Lucia Valbonesi IX Controls and Systems . . . . . . . . . . . . . . 1017
Michael Sain
2 Digital Filters . . . . . . . . . . . . . . . . . . . . . . . 839
Marcio G. Siqueira and Paulo S.R. Diniz
1 Algebraic Topics in Control . . . . . . . . . . . . . 1019
Cheryl B. Schrader
3 Methods, Models, and Algorithms for
Modern Speech Processing . . . . . . . . . . . . . . 861
2 Stability . . . . . . . . . . . . . . . . . . . . . . . . . . . 1027
John R. Deller, Jr. and John Hansen
Derong Liu
4 Digital Image Processing . . . . . . . . . . . . . . . 891
3 Robust Multivariable Control . . . . . . . . . . . . 1037
Eduardo A.B. da Silva and Gelson V. Mendonça
Oscar R. González and Atul G. Kelkar
5 Multimedia Systems and Signal Processing . . . 911
4 State Estimation . . . . . . . . . . . . . . . . . . . . . 1049
John R. Smith
Jay Farrell
6 Statistical Signal Processing . . . . . . . . . . . . . 921
5 Cost-Cumulants and Risk-Sensitive
Yih-Fang Huang
Control . . . . . . . . . . . . . . . . . . . . . . . . . . . 1061
Chang-Hee Won
7 VLSI Signal Processing. . . . . . . . . . . . . . . . . 933
Surin Kittitornkun and Yu-Hen Hu
6 Frequency Domain System
Identification . . . . . . . . . . . . . . . . . . . . . . . 1069
VIII Digital Communication and Gang Jin
Communication Networks . . . . . . . . 949
Vijay K. Garg and Yih-Chen Wang
7 Modeling Interconnected Systems:
A Functional Perspective . . . . . . . . . . . . . . . 1079
1 Signal Types, Properties, and Processes . . . . . 951 Stanley R. Liberty
Vijay K. Garg and Yih-Chen Wang
8 Fault-Tolerant Control . . . . . . . . . . . . . . . . . 1085
2 Digital Communication System Concepts . . . . 957 Gary G. Yen
Vijay K. Garg and Yih-Chen Wang
9 Gain-Scheduled Controllers . . . . . . . . . . . . . 1107
3 Transmission of Digital Signals . . . . . . . . . . . 965 Christopher J. Bett
Vijay K. Garg and Yih-Chen Wang
10 Sliding-Mode Control Methodologies for
4 Modulation and Demodulation Regulating Idle Speed in Internal
Technologies . . . . . . . . . . . . . . . . . . . . . . . . 971 Combustion Engines . . . . . . . . . . . . . . . . . . 1115
Vijay K. Garg and Yih-Chen Wang Stephen Yurkovich and Xiaoqiu Li
viii Contents

11 Nonlinear Input/Output Control: 13 Direct Learning by Reinforcement . . . . . . . . 1151

Volterra Synthesis . . . . . . . . . . . . . . . . . . . 1131 Jennie Si
Patrick M. Sain
14 Software Technologies for Complex
12 Intelligent Control of Nonlinear Control Systems. . . . . . . . . . . . . . . . . . . . . 1161
Systems with a Time-Varying Structure . . . . 1139 Bonnie S. Heck
Raúl Ordóñez and Kevin M. Passino
Index . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1171
 Contributors

Rashid Ansari Weng Cho Chew

Department of Electrical and Computer Engineering Center for Computational Electromagnetics
University of Illinois at Chicago Department of Electrical and Computer Engineering
Chicago, Illinois, USA University of Illinois at Urbana-Champaign
Urbana, Illinois, USA
Faisal Bashir
Department of Electrical and Computer Engineering George A. Constantinides
University of Illinois at Chicago Department of Electrical and Electronic Engineering
Chicago, Illinois, USA Imperial College of Science, Technology,
and Medicine
Magdy Bayoumi London, UK
The Center for Advanced Computer Studies
University of Louisiana at Lafayette Koen Danckaert
Lafayette, Louisiana, USA IMEC
Leuven, Belgium
Christopher J. Bett
Raytheon Integrated Defense Systems Tarek Darwish
Tewksbury, Massachusetts, USA The Center for Advanced Computer Studies
University of Louisiana at Lafayette
Anjan Bose Lafeyette, Louisiana, USA
College of Engineering and Architecture
Washington State University Nirod K. Das
Pullman, Washington, USA Department of Electrical and Computer
Engineering
Erik Brockmeyer Polytechnic University
IMEC Brooklyn, New York, USA
Leuven, Belgium
Eduardo A.B. da Silva
Francky Catthoor Program of Electrical Engineering
IMEC Federal University of Rio de Janeiro
Leuven, Belgium Rio de Janeiro, Brazil

Morris Chang William R. Deal

Department of Electrical and Computer Engineering Northrup Grumman Space Technologies
Iowa State University Redondo Beach, California, USA
Ames, Iowa, USA
Franco De Flaviis
Peter Y. K. Cheung Department of Electrical and Computer
Department of Electrical and Electronic Engineering Engineering
Imperial College of Science, Technology, and Medicine University of California at Irvine
London, UK Irvine, California, USA

Copyright ß 2004 by Academic Press. ix

All rights of reproduction in any form reserved.
x Contributors

Bob C. Degeneff Ravi S. Gorur

Department of Computer, Electrical, and Systems Engineering Department of Electrical Engineering
Rensselaer Polytechnic Institute Arizona State University
Troy, New York, USA Tempe, Arizona, USA

John R. Deller, Jr. Susan C. Hagness

Department of Electrical and Computer Engineering Department of Electrical and Computer Engineering
Michigan State University University of Wisconsin
East Lansing, Michigan, USA Madison, Wisconsin, USA

Rodolfo E. Diaz Fran Hanchek

Department of Electrical Engineering Intel Corporation
Ira A. Fulton School of Engineering Portland, Oregan, USA
Arizona State University
Tempe, Arizona, USA John Hansen
Department of Electrical and Computer Engineering
Paulo S. R. Diniz Michigan State University
Program of Electrical Engineering East Lansing, Michigan, USA
Federal University of Rio de Janeiro
Rio de Janeiro, Brazil Xudong He
School of Computer Science
Shantanu Dutt Florida International University
Department of Electrical and Computer Engineering Miami, Florida, USA
University of Illinois at Chicago
Chicago, Illinois, USA Bonnie S. Heck
School of Electrical and Computer Engineering
Mohamed Elgamel
Georgia Institute of Technology
The Center for Advanced Computer Studies Atlanta, Georgia, USA
University of Louisiana at Lafayette
Lafayette, Louisiana, USA
Gerald T. Heydt
Department of Electrical Engineering
Jay Farrell
Arizona State University
Department of Electrical Engineering
Tempe, Arizona, USA
University of California
Riverside, California, USA
Yu-Hen Hu
Eby G. Friedman Department of Electrical and Computer Engineering
Department of Electrical and Computer Engineering University of Wisconsin-Madison
University of Rochester Madison, Wisconsin, USA
Rochester, New York, USA
Yih-Fang Huang
Vijay K. Garg Department of Electrical Engineering
Department of Electrical and Computer Engineering University of Notre Dame
University of Illinois at Chicago Notre Dame, Indiana, USA
Chicago, Illinois, USA
Sorin A. Huss
Turan Gönen Integrated Circuits and Systems Laboratory
College of Engineering and Computer Science Computer Science Department
California State University, Sacramento Darmstadt University of Technology
Sacramento, California, USA Darmstadt, Germany

Oscar R. González Tatsuo Itoh

Department of Electrical and Computer Engineering Department of Electrical Engineering
Old Dominion University University of California, Los Angeles
Norfolk, Virginia, USA Los Angeles, California, USA
Contributors xi

David R. Jackson Sun-Yung Kung

Department of Electrical and Computer Department of Electrical Engineering
Engineering Princeton University
University of Houston Princeton, New Jersey, USA
Houston, Texas, USA
Fred C. Lee
Gang Jin Center for Power Electronics Systems
Ford Motor Company The Bradley Department of Electrical Engineering
Dearborn, Michigan, USA Virginia Polytechnic Institute and State University
Blacksburg, Virginia, USA
Jian-Ming Jin
Center for Computational Electromagnetics Hsueh-Jyh Li
Department of Electrical and Computer Engineering Department of Electrical Engineering
University of Illinois at Urbana-Champaign National Taiwan University
Urbana, Illinois, USA Taipei, Taiwan

Atul G. Kelkar Xiaoqiu Li

Department of Mechanical Engineering Cummins Engine
Iowa State University Columbus, Indiana, USA
Ames, Iowa, USA
Stanley R. Liberty
Mladen Kezunovic Academic Affairs
Department of Electrical Engineering Bradley University
Texas A & M University Peoria, Illinois, USA
College Station, Texas, USA
Yao-Nan Lien
Shashank Khanvilkar Department of Computer Science
Department of Electrical and Computer National Chengchi University
Engineering Taipei, Taiwan
University of Illinois at Chicago
Chicago, Illinois, USA Derong Liu
Department of Electrical and Computer Engineering
Ashfaq Khokhar University of Illinois at Chicago
Department of Electrical and Computer Engineering Chicago, Illinois, USA
University of Illinois at Chicago
Chicago, Illinois, USA Wayne Luk
Department of Electrical and Electronic Engineering
Yean-Woei Kiang Imperial College of Science, Technology, and Medicine
Department of Electrical Engineering London, UK
National Taiwan University
Taipei, Taiwan Erik A. McShane
Department of Electrical and Computer Engineering
Surin Kittitornkun University of Illinois at Chicago
King Mongkut’s Institute of Technology Ladkrabang Chicago, Illinois, USA
Bangkok, Thailand
Gelson V. Mendonça
Ivan S. Kourtev Department of Electronics
Department of Electrical and Computer Engineering COPPE/EE/Federal University of Rio de Janeiro
University of Pittsburgh Rio de Janeiro, Brazil
Pittsburgh, Pennsylvania, USA
Veena Misra
Chidamber Kulkani Department of Electrical and Computer Engineering
IMEC North Carolina State University
Leuven, Belgium Raleigh, North Carolina, USA
xii Contributors

Tadao Murata P.K. Rajan

Department of Computer Science Department of Electrical and Computer
University of Illinois at Chicago Engineering
Chicago, Illinois, USA Tennessee Technological University
Cookeville, Tennessee, USA
Lode Nachtergaele
IMEC Federico Rota
Leuven, Belgium Department of Electrical and Computer Engineering
University of Illinois at Chicago
David J. Nagel Chicago, Illinois, USA
Department of Electrical and Computer Engineering Politecnico di Torina, Italy
The George Washington University
Washington, D.C., USA Michael Sain
Department of Electrical Engineering
Krishna Naishadham University of Notre Dame
Massachusetts Institute of Technology Notre Dame, Indiana, USA
Lincoln Laboratory
Lexington, Massachusetts, USA Patrick M. Sain
Raytheon Company
Ajoy Opal EI Segundo, California, USA
Department of Electrical and Computer Engineering
University of Waterloo Sheppard Joel Salon
Waterloo, Ontario, Canada Department of Electrical Power Engineering
Renssalaer Polytechnic Institute
Raúl Ordóñez Troy, New York, USA
Department of Electrical and Computer Engineering
University of Dayton Rolf Schaumann
Dayton, Ohio, USA Department of Electrical and Computer Engineering
Portland State University
Mehmet C. Öztürk Portland, Oregan, USA
Department of Electrical and Computer Engineering
North Carolina State University Dan Schonfeld
Raleigh, North Carolina, USA Department of Electrical and Computer
Engineering
Kevin M. Passino University of Illinois at Chicago
Department of Electrical and Computer Engineering Chicago, Illinois, USA
The Ohio State University
Columbus, Ohio, USA Cheryl B. Schrader
College of Engineering
Melinda Piket-May Boise State University
Department of Electrical and Computer Engineering Boise, Idaho, USA
University of Colorado
Boulda, Colorado, USA Michael Schröter
Institute for Electro Technology and Electronics
Yongxi Qian Fundamentals
Department of Electrical Engineering University of Technology
University of California, Los Angeles Dresden, Germany
Los Angeles, California, USA
Arun Sekar
Vesna Radisic Department of Electrical and Computer Engineering
Microsemi Corporation Tennessee Technological University
Los Angeles, California, USA Cookeville, Tennessee, USA
Contributors xiii

Yi Shang Kevin Tomsovic

Department of Computer Science School of Electrical Engineering and Computer Science
University of Missouri-Columbia Washington State University
Columbia, Missouri, USA Pullman, Washington, USA

Krishna Shenai Ljiljana Trajković

Department of Electrical and Computer Engineering School of Engineering Science
University of Illinois at Chicago Simon Fraser University
Chicago, Illinois, USA Vancouver, British Columbia, Canada

Nabeel Shirazi Malay Trivedi

Xilinx, Inc. Department of Electrical and Computer Engineering
San Jose, California, USA University of Illinois at Chicago
Chicago, Illinois, USA
Michael Shur
Department of Electrical, Computer, and Systems Franco Trovo
Engineering Department of Electrical and Computer Engineering
Rensselaer Polytechnic Institute University of Illinois at Chicago
Troy, New York, USA Chicago, Illinois, USA
Politecnico di Torina, Italy
Jennie Si
Department of Electrical Engineering Ruediger Vahldieck
Arizona State University Laboratory for Electromagnetic Fields and Microwave
Tempe, Arizona, USA Electronics
Swiss Federal Institute of Technology
Marcio G. Siqueira Zurich, Switzerland
Cisco Systems
Sunnyvale, California, USA Lucia Valbonesi
Department of Electrical and Computer Engineering
John R. Smith University of Illinois at Chicago
IBM Chicago, Illinois, USA
T. J. Watson Research Center
Hawthorne, New York, USA Arnout Vandercappelle
IMEC
Thanos Stouraitis Leuven, Belgium
Department of Electrical and Computer
Engineering Mani Venkatasubramanian
University of Patras School of Electrical Engineering and Computer Science
Rio, Greece Washington State University
Pullman, Washington, USA
M.N.S. Swamy
Department of Electrical and Computer Engineering Jiri Vlach
Concordia University Department of Electrical and Computer Engineering
Montreal, Quebec, Canada University of Waterloo
Waterloo, Ontario, Canada
Allen Taflove
Department of Electrical and Computer Engineering Benjamin W. Wah
Northwestern University Computer and Systems Research Laboratory
Chicago, Illinois, USA University of Illinois at Urbana-Champaign
Urbana, Illinois, USA
Krishnaiyan Thulasiraman
School of Computer Science Yih-Chen Wang
University of Oklahoma Lucent Technologies
Norman, Oklahoma, USA Naperville, Illinois, USA
xiv Contributors

Keith W. Whites Stephen Yurkovich

Department of Electrical and Computer Engineering Center for Automotive Research
South Dakota School of Mines and Technology The Ohio State University
Rapid City, South Dakota, USA Columbus, Ohio, USA

Chang-Hee Won Mona E. Zaghloul

Department of Electrical Engineering Department of Electrical and Computer Engineering
University of North Dakota The George Washington University
Grand Forks, North Dakota, USA Washington, D.C., USA

Ke Wu Xunwei Zhou
Department of Electrical and Computer Engineering Center for Power Electronics Systems
Ecole Polytechnique The Bradley Department of Electrical Engineering
Montreal, Quebec, Canada Virginia Polytechnic Institute and State University
Blacksburg, Virginia, USA
Hung-Yu David Yang
Department of Electrical and Computer Engineering Lei Zhu
University of Illinois at Chicago Department of Electrical and Computer Engineering
Chicago, Illinois, USA Ecole Polytechnique
Montreal, Quebec, Canada
Gary G. Yen
Intelligent Systems and Control Laboratory
School of Electrical and Computer Engineering
Oklahoma State University
Stillwater, Oklahoma, USA
 Preface

Purpose relevant sources of information and tools that would assist

the engineer in performing his/her job. This may include
The purpose of The Electrical Engineering Handbook is to sources of software, databases, standards, seminars, confer-
provide a comprehensive reference work covering the broad ences, and so forth.
spectrum of electrical engineering in a single volume. It is
written and developed for the practicing electrical engineers
in industry, government, and academia. The goal is to provide Organization
the most up-to-date information in classical fields of circuits,
electronics, electromagnetics, electric power systems, and con- Over the years, the fundamentals of electrical engineering have
trol systems, while covering the emerging fields of VLSI evolved to include a wide range of topics and a broad range of
systems, digital systems, computer engineering, computer- practice. To encompass such a wide range of knowledge, the
aided design and optimization techniques, signal processing, handbook focuses on the key concepts, models, and equations
digital communications, and communication networks. This that enable the electrical engineer to analyze, design, and
handbook is not an all-encompassing digest of everything predict the behavior of electrical systems. While design formu-
taught within an electrical engineering curriculum. Rather, it las and tables are listed, emphasis is placed on the key concepts
is the engineer’s first choice in looking for a solution. There- and theories underlying the applications.
fore, full references to other sources of contributions are pro- The information is organized into nine major sections,
vided. The ideal reader is a B.S. level engineer with a need for a which encompass the field of electrical engineering. Each
one-source reference to keep abreast of new techniques and section is divided into chapters. In all, there are 72 chapters
procedures as well as review standard practices. involving 108 authors, each of which was written by leading
experts in the field to enlighten and refresh knowledge of
the mature engineer and educate the novice. Each section
Background contains introductory material, leading to the appropriate
applications. To help the reader, each article includes two
The handbook stresses fundamental theory behind profes- important and useful categories: defining terms and references.
sional applications. In order to do so, it is reinforced with Defining terms are key definitions and the first occurrence of
frequent examples. Extensive development of theory and each term defined is indicated in boldface in the text. The
details of proofs have been omitted. The reader is assumed to references provide a list of useful books and articles for
have a certain degree of sophistication and experience. How- following reading.
ever, brief reviews of theories, principles, and mathematics of
some subject areas are given. These reviews have been done
concisely with perception. The handbook is not a textbook Locating Your Topic
replacement, but rather a reinforcement and reminder of ma-
terial learned as a student. Therefore, important advancement Numerous avenues of access to information contained in the
and traditional as well as innovative practices are included. handbook are provided. A complete table of contents is pre-
Since the majority of professional electrical engineers gradu- sented at the front of the book. In addition, an individual table
ated before powerful personal computers were widely avail- of contents precedes each of the nine sections. The reader is
able, many computational and design methods may be new to urged to look over these tables of contents to become familiar
them. Therefore, computers and software use are thoroughly with the structure, organization, and content of the book. For
covered. Not only does the handbook use traditional references example, see Section VII: Signal Processing, then Chapter 7:
to cite sources for the contributions, but it also contains VLSI Signal Processing, and then Chapter 7.3: Hardware Im-

Copyright ß 2004 by Academic Press. xv

All rights of reproduction in any form reserved.
xvi Preface

plementation. This tree-like structure enables the reader to publishers, and most of all the contributing authors. I particu-
move up the tree to locate information on the topic of interest. larly wish to acknowledge my wife, Shiao-Ling, for her pa-
The Electrical Engineering Handbook is designed to provide tience and support.
answers to most inquiries and direct inquirer to further
sources and references. We trust that it will meet your need. Wai-Kai Chen
Editor-in-Chief

Acknowledgments
The compilation of this book would not have been possible
without the dedication and efforts of the section editors, the
 Editor-in-Chief

Wai-Kai Chen, Professor and Head Emeritus of the Department circuits and systems. He has served as visiting professor
of Electrical Engineering and Computer Science at the University at Purdue University, University of Hawaii at Manoa, and
of Illinois at Chicago. He received his B.S. and M.S. in electrical Chuo University in Tokyo, Japan. He was Editor-in-Chief
engineering at Ohio University, where he was later recognized as of the IEEE Transactions on Circuits and Systems, Series I and
a Distinguished Professor. He earned his Ph.D. in electrical II, President of the IEEE Circuits and Systems Society, and is
engineering at University of Illinois at Urbana-Champaign. the Founding Editor and Editor-in-Chief of the Journal of
Professor Chen has extensive experience in education and Circuits, Systems and Computers. He received the Lester R.
industry and is very active professionally in the fields of Ford Award from the Mathematical Association of America,

Dr. Wai-Kai Chen

Copyright ß 2004 by Academic Press. xvii

All rights of reproduction in any form reserved.
xviii Editor-in-Chief

the Alexander von Humboldt Award from Germany, the JSPS A fellow of the Institute of Electrical and Electronics Engin-
Fellowship Award from Japan Society for the Promotion of eers (IEEE) and the American Association for the Advance-
Science, the National Taipei University of Science and Technol- ment of Science (AAAS), Professor Chen is widely known in
ogy Distinguished Alumnus Award, the Ohio University the profession for his Applied Graph Theory (North-Holland),
Alumni Medal of Merit for Distinguished Achievement in En- Theory and Design of Broadband Matching Networks (Perga-
gineering Education, the Senior University Scholar Award and mon Press), Active Network and Feedback Amplifier Theory
the 2000 Faculty Research Award from the University of Illinois (McGraw-Hill), Linear Networks and Systems (Brooks/Cole),
at Chicago, and the Distinguished Alumnus Award from the Passive and Active Filters: Theory and Implements (John Wiley),
University of Illinois at Urbana/Champaign. He is the recipient Theory of Nets: Flows in Networks (Wiley-Interscience), The
of the Golden Jubilee Medal, the Education Award, and the Circuits and Filters Handbook (CRC Press) and The VLSI
Meritorious Service Award from IEEE Circuits and Systems Handbook (CRC Press).
Society, and the Third Millennium Medal from the IEEE. He
has also received more than dozen honorary professorship Dr. Wai-Kai Chen
awards from major institutions in Taiwan and China.
 I
CIRCUIT THEORY

Krishnaiyan Thulasiraman
School of Computer Science,
University of Oklahoma,
Norman, Oklahoma, USA

Circuit theory is an important and perhaps the oldest branch parts of the circuit. Circuits can also be broadly classified as
of electrical engineering. A circuit is an interconnection of linear or nonlinear circuits.
electrical elements. These include passive elements, such as This section consists of five chapters that provide a broad
resistances, capacitances, and inductances, as well as active introduction to most fundamental principles and techniques
elements and sources (or excitations). Two variables, namely in circuit analysis and design:
voltage and current variables, are associated with each circuit
. Linear Circuit Analysis
element. There are two aspects to circuit theory: analysis and
. Circuit Analysis: A Graph-Theoretic Foundation
design. Circuit analysis involves the determination of current
. Computer-Aided Design
and voltage values in different elements of the circuit, given the
. Synthesis of Networks
values of the sources or excitations. On the other hand, circuit
. Nonlinear Circuits.
design focuses on the design of circuits that exhibit a certain
prespecified voltage or current characteristics at one or more
This page intentionally left blank
 1
Linear Circuit Analysis

P.K. Rajan and Arun Sekar 1.1 Definitions and Terminology................................................................. 3

Department of Electrical and 1.2 Circuit Laws ....................................................................................... 6
Computer Engineering, 1.2.1 Kirchhoff’s Current Law . 1.2.2 Kirchhoff ’s Voltage Law
Tennessee Technological University,
Cookeville, Tennessee, USA
1.3 Circuit Analysis................................................................................... 6
1.3.1 Loop Current Method . 1.3.2 Node Voltage Method (Nodal Analysis)
1.4 Equivalent Circuits .............................................................................. 9
1.4.1 Series Connection . 1.4.2 Parallel Connection . 1.4.3 Star–Delta (Wye–Delta or T–Pi)
Transformation . 1.4.4 Thevenin Equivalent Circuit . 1.4.5 Norton Equivalent Circuit .
1.4.6 Source Transformation
1.5 Network Theorems .............................................................................. 12
1.5.1 Superposition Theorem . 1.5.2 Maximum Power Transfer Theorem
1.6 Time Domain Analysis......................................................................... 13
1.6.1 First-Order Circuits . 1.6.2 Second-Order Circuits . 1.6.3 Higher Order Circuits
1.7 Laplace Transform............................................................................... 16
1.7.1 Definition . 1.7.2 Laplace Transforms of Common Functions . 1.7.3 Solution of
Electrical Circuits Using the Laplace Transform . 1.7.4 Network Functions
1.8 State Variable Analysis.......................................................................... 20
1.8.1 State Variables for Electrical Circuits . 1.8.2 Matrix Representation of State Variable
Equations . 1.8.3 Solution of State Variable Equations
1.9 Alternating Current Steady State Analysis................................................ 22
1.9.1 Sinusoidal Voltages and Currents . 1.9.2 Complex Exponential Function .
1.9.3 Phasors in Alternating Current Circuit Analysis . 1.9.4 Phasor Diagrams .
1.9.5 Phasor Voltage–Current Relationships of Circuit Elements . 1.9.6 Impedances and
Admittances in Alternating Current Circuits . 1.9.7 Series Impedances and Parallel
Admittances . 1.9.8 Alternating Current Circuit Analysis . 1.9.9 Steps in the Analysis of
Phasor Circuits . 1.9.10 Methods of Alternating Current Circuit Analysis .
1.9.11 Frequency Response Characteristics . 1.9.12 Bode Diagrams
1.10 Alternating Current Steady State Power .................................................. 26
1.10.1 Power and Energy . 1.10.2 Power in Electrical Circuits . 1.10.3 Power Calculations
in AC Circuits

1.1 Definitions and Terminology while unlike charges attract each other. The electric charges
obey the principle of conservation (i.e., charges cannot be
An electric charge is a physical property of electrons and created or destroyed).
protons in the atoms of matter that gives rise to forces between A current is the flow of electric charge that is measured by
atoms. The charge is measured in coulomb [C]. The charge of its flow rate as coulombs per second with the units of ampere
a proton is arbitrarily chosen as positive and has the value of [A]. An ampere is defined as the flow of charge at the rate of
1:601
1019 C, whereas the charge of an electron is chosen as one coulomb per second (1 A ¼ 1 C/s). In other words, current
negative with a value of 1:601
1019 C. Like charges repel i(t) through a cross section at time t is given by dq/dt, where

Copyright ß 2004 by Academic Press. 3

All rights of reproduction in any form reserved.
4 P.K. Rajan and Arun Sekar

q(t) is the charge that has flown through the cross section up to relation, defines the element’s characteristic. A circuit is made
time t : up of electrical elements.
Linear elements include a v–i relation, which can be linear if
dq(t) it satisfies the homogeneity property and the superposition
i(t) ¼ [A]: (1:1)
dt principle. The homogeneity property refers to proportionality;
that is, if i gives a voltage of v, ki gives a voltage of kv for any
Knowing i, the total charge, Q, transferred during the time arbitrary constant k. The superposition principle implies addi-
from t1 to t2 can be calculated as: tivity; that is, if i1 gives a voltage of v1 and i2 gives a voltage of
v2 , then i1 þ i2 should give a voltage v1 þ v2 . It is easily verified
tð2 that v ¼ Ri and v ¼ L di=dt are linear relations. Elements that
Q¼ idt [C]: (1:2) possess such linear relations are called linear elements, and a
t1 circuit that is made up of linear elements is called a linear
circuit.
The voltage or potential difference (VAB ) between two points Sources, also known as active elements, are electrical ele-
A and B is the amount of energy required to move a unit ments that provide power to a circuit. There are two types of
positive charge from B to A. If this energy is positive, that is sources: (1) independent sources and (2) dependent (or con-
work is done by external sources against forces on the charges, trolled) sources. An independent voltage source provides a
then VAB is positive and point A is at a higher potential with specified voltage irrespective of the elements connected to it.
respect to B. The voltage is measured using the unit of volt [V]. In a similar manner, an independent current source provides a
The voltage between two points is 1 V if 1 J (joule) of work is specified current irrespective of the elements connected to it.
required to move 1 C of charge. If the voltage, v, between two Figure 1.1 shows representations of independent voltage and
points is constant, then the work, w, done in moving q cou- independent current sources. It may be noted that the value of
lombs of charge between the two points is given by: an independent voltage or an independent current source may
be constant in magnitude and direction (called a direct current
w ¼ vq [J]: (1:3) [dc] source) or may vary as a function of time (called a time-
varying source). If the variation is of sinusoidal nature, it is
Power (p) is the rate of doing work or the energy flow rate. called an alternating current (ac) source.
When a charge of dq coulombs is moved from point A to point Values of dependent sources depend on the voltage or
B with a potential difference of v volts, the energy supplied current of some other element or elements in the circuit.
to the charge will be v dq joule [J]. If this movement takes There are four classes of dependent sources: (1) voltage-
place in dt seconds, the power supplied to the charge will be controlled voltage source, (2) current-controlled voltage
v dq/dt watts [W]. Because dq/dt is the charge flow rate defined source, (3) voltage-controlled current source and (4) current-
earlier as current i, the power supplied to the charge can be controlled current source. The representations of these
written as: dependent sources are shown in Table 1.1.
Passive elements consume power. Names, symbols, and the
p ¼ vi [W]: (1:4) characteristics of some commonly used passive elements are
given in Table 1.2. The v–i relation of a linear resistor, v ¼ Ri,
The energy supplied over duration t1 to t 2 is then given by:

tð2

w¼ vi dt [J]: (1:5)
+ +
t1
+
v(t) 5V l(t )
A lumped electrical element is a model of an electrical device −
with two or more terminals through which current can flow in −
−
or out; the flow can pass only through the terminals. In a two-
terminal element, current flows through the element entering
(A) (B) (C) (D)
via one terminal and leaving via another terminal. On the
other hand, the voltage is present across the element and A) General voltage source
measured between the two terminals. In a multiterminal ele- B) Voltage source : dc
C) Voltage source : ac
ment, current flows through one set of terminals and leaves D) General current source
through the remaining set of terminals. The relation between
the voltage and current in an element, known as the v–i FIGURE 1.1 Independent Voltage and Current Sources
1 Linear Circuit Analysis 5

TABLE 1.1 Dependent Sources and Their Representation

Element Voltage and current relation Representation

Voltage-controlled voltage source v2 ¼ a v1

+ +
a : Voltage gain
+
v1 v2
−
− −

Voltage-controlled current source i2 ¼ g t v 1

+
gt : Transfer conductance

v1 i2

Current-controlled voltage source v2 ¼ rt i1

+
rt : Transfer resistance
+
i1 v2
−
−

Current-controlled current source i2 ¼ bi1

b: Current gain

i1 i2

TABLE 1.2 Some Passive Elements and Their Characteristics

Name of the element Symbol The v–i relation Unit

Resistance: R v ¼ Ri ohm [V]

R
i

+ v −

Inductance: L L v ¼ L di=dt henry [H]

i

+ v −

Capacitance: C C i ¼ C dv=dt farad [F]

i

+ v −

Mutual i1 i2 v1 ¼ M di2 =dt þ L1 di1 =dt henry [H]

Inductance: M M v2 ¼ M di1 =dt þ L2 di2 =dt
+ +

L1 L2
v1 v2

− −

is known as Ohm’s law, and the linear relations of other passive This polarity marking is said to follow the passive polarity
elements are sometimes called generalized Ohm’s laws. It may convention.
be noted that in a passive element, the polarity of the voltage is A circuit is formed by an interconnection of circuit elements
such that current flows from positive to negative terminals. at their terminals. A node is a junction point where the
6 P.K. Rajan and Arun Sekar

I4 1.2.2 Kirchhoff ’s Voltage Law

6Ω At any instant, the algebraic sum of the voltages (v) around a
loop is equal to zero. In going around a loop, a useful conven-
B I1 C I3 I3
A D tion is to take the voltage drop (going from positive to nega-
2Ω 0.5 H 4Ω tive) as positive and the voltage rise (going from negative to
I2 I5 positive) as negative. In Figure 1.2, application of KVL around
+
10 V 1.5 F 5Ω the loop ABCEA gives the following equation:
−

vAB þ vBC þ vCE þ vEA ¼ 0: (1:8)

E

FIGURE 1.2 Example Circuit Diagram 1.3 Circuit Analysis

Analysis of an electrical circuit involves the determination
terminals of two or more elements are joined. Figure 1.2 shows of voltages and currents in various elements, given the element
A, B, C, D, and E as nodes. A loop is a closed path in a circuit values and their interconnections. In a linear circuit, the v–i
such that each node is traversed only once when tracing the relations of the circuit elements and the equations generated
loop. In Figure 1.2, ABCEA is a loop, and ABCDEA is also a by the application of KCL at the nodes and of KVL for the
loop. A mesh is a special class of loop that is associated with a loops generate a sufficient number of simultaneous linear
window of a circuit drawn in a plane (planar circuit). In the equations that can be solved for unknown voltages and cur-
same Figure ABCEA is a mesh, whereas ABCDEA is not con- rents. Various steps involved in the analysis of linear circuits
sidered a mesh for the circuit as drawn. A network is defined are as follows:
as a circuit that has a set of terminals available for external 1. For all the elements except the current sources, assign a
connections (i.e., accessible from outside of the circuit). A pair current variable with arbitrary polarity. For the current
of terminals of a network to which a source, another network, sources, current values and polarity are given.
or a measuring device can be connected is called a port of the 2. For all elements except the voltage sources, assign a
network. A network containing such a pair of terminals is voltage variable with polarities based on the passive
called a one-port network. A network containing two pairs sign convention. For voltage sources, the voltages and
of externally accessible terminals is called a two-port network, their polarities are known.
and multiple pairs of externally accessible terminal pairs are 3. Write KCL equations at N  1 nodes, where N is the
called a multiport network. total number of nodes in the circuit.
4. Write expressions for voltage variables of passive ele-
ments using their v–i relations.
1.2 Circuit Laws 5. Apply KVL equations for E  N þ 1 independent loops,
where E is the number of elements in the circuit. In the
Two important laws are based on the physical properties of case of planar circuits, which can be drawn on a plane
electric charges, and these laws form the foundation of circuit paper without edges crossing over one another, the
analysis. They are Kirchhoff ’s current law (KVL) and Kirch- meshes will form a set of independent loops. For non-
hoff ’s voltage law (KCL). While Kirchhoff ’s current law is based planar circuits, use special methods that employ topo-
on the principle of conservation of electric charge, Kirchhoff ’s logical techniques to find independent loops.
voltage law is based on the principle of energy conservation. 6. Solve the 2E equations to find the E currents and E
voltages.
1.2.1 Kirchhoff ’s Current Law The following example illustrates the application of the steps
At any instant, the algebraic sum of the currents (i) entering in this analysis.
a node in a circuit is equal to zero. In the circuit in Figure 1.2, Example 1.1. For the circuit in Figure 1.3, determine the
application of KCL at node C yields the following equation: voltages across the various elements. Following step 1,
assign the currents I1 , I2 , I3 , and I4 to the elements.
i1 þ i2 þ i3 ¼ 0 (1:6) Then apply the KCL to the nodes A, B, and C to get
I4  I1 ¼ 0, I1  I2 ¼ 0, and I2  I3 ¼ 0. Solving these
Similarly at node D, KCL yields: equations produces I1 ¼ I2 ¼ I3 ¼ I4 . Applying the v–i
relation characteristics of the nonsource elements, you
i4  i3  i5 ¼ 0: (1:7) get VAB ¼ 2 I1 , VBC ¼ 3 I2 , and VCD ¼ 5 I3 . Applying
1 Linear Circuit Analysis 7

+ V1 − + V2 − 2Ω 1Ω
I1 I2 B
A C A C
2Ω B 3Ω
+
+
5Ω V3 I2
12 V + I1
4Ω
− − 3Ω
12 V
I3 −
I4

D
FIGURE 1.3 Circuit for Example 1.1
FIGURE 1.4 Circuit for Example 1.2

the KVL to the loop ABCDA, you determine

VAB þ VBC þ VCD þ VDA ¼ 0. Substituting for the volt- 5 I1  3 I2 ¼ 12
ages in terms of currents, you get 2 I1 þ 3 I1 þ 3 I1 þ 8 I2 ¼ 0:
5 I1  12 ¼ 0. Simplifying results in 10 I1 ¼ 12 to make
I1 ¼ 1:2 A. The end results are VAB ¼ 2:4 V, Solving the two equations, you get I1 ¼ 96=31 A and
VBC ¼ 3:6 V, and VCD ¼ 6:0 V. I2 ¼ 36=31 A. The voltage across the 3-V resistor is
In the above circuit analysis method, 2E equations are 3(I1  I2 ) ¼ 3(96=31  36=31) ¼ 180=31 A.
first set up and then solved simultaneously. For large cir-
cuits, this process can become very cumbersome. Tech- Special case 1
niques exist to reduce the number of unknowns that would When one of the elements in a loop is a current source, the
be solved simultaneously. Two most commonly used voltage across it cannot be written using the v–i relation of the
methods are the loop current method and the node voltage element. In this case, the voltage across the current source
method. should be treated as an unknown variable to be determined.
If a current source is present in only one loop and is not
1.3.1 Loop Current Method common to more than one loop, then the current of the loop
in which the current source is present should be equal to the
In this method, one distinct current variable is assigned to each value of the current source and hence is known. To determine
independent loop. The element currents are then calculated in the remaining currents, there is no need to write the KVL
terms of the loop currents. Using the element currents and equation for the current source loop. However, to determine
values, element voltages are calculated. After these calculations, the voltage of the current source, a KVL equation for the
Kirchhoff ’s voltage law is applied to each of the loops, and the current source loop needs to be written. This equation is
resulting equations are solved for the loop currents. Using presented in example 1.3.
the loop currents, element currents and voltages are then
determined. Thus, in this method, the number of simul- Example 1.3. Analyze the circuit shown in Figure 1.5 to
taneous equations to be solved are equal to the number of find the voltage across the current sources. The loop cur-
independent loops. As noted above, it can be shown that this rents are assigned as shown. It is easily seen that I3 ¼ 2.
is equal to E  N þ 1. Example 1.2 illustrates the techniques Writing KVL equations for loops 1 and 2, you get:
just discussed. It may be noted that in the case of planar Loop 1: 2(I1  I2 ) þ 4(I1  I3 )  14 ¼ 0 ¼>
circuits, the meshes can be chosen as the independent loops. 6 I1  2 I2 ¼ 6.
Example 1.2. In the circuit in Figure 1.4, find the volt- Loop 2: I2 þ 3(I2  I3 ) þ 2(I2  I1 ) ¼ 0 ¼>
age across the 3-V resistor. First, note that there are two 2 I1 þ 6 I2 ¼ 6.
independent loops, which are the two meshes in the
circuit, and that loop currents I1 and I2 are assigned as Solving the two equations simultaneously, you get
shown in the diagram. Then calculate the element I1 ¼ 3=4 A and I2 ¼ 3=4 A. To find the VCD across
currents as IAB ¼ I1 , IBC ¼ I2 , ICD ¼ I2 , IBD ¼ I1  I2 , the current source, write the KVL equation for the loop
and IDA ¼ I1 . Calculate the element voltages as VAB ¼ 2 3 as:
IAB ¼ 2 I1 , VBC ¼ 1 IBC ¼ 1 I2 , VCD ¼ 4 I2 , and VBD ¼ 3
IBD ¼ 3(I1  I2 ). Applying KVL to loops 1 (ABDA) and
4(I3  I1 ) þ 3(I3  I2 ) þ VCD ¼ 0 ¼>
2 (BCDB) and substituting the voltages in terms of loop
currents results in: VCD ¼ 4 I1 þ 3 I2  7 I3 ¼ 14:75 V:
8 P.K. Rajan and Arun Sekar

1Ω

I3
I2
2Ω 3Ω
A C
B

+ I1 4Ω I3 I1 I2
14 V 2Å
−

Super loop
D

FIGURE 1.5 Circuit for Example 1.3

FIGURE 1.7 Circuit in Figure 1.6 with the Super Loop Shown as
Dotted Line
1Ω

I3 Solving the above four equations results in I1 ¼ 0:13 A,

I2 ¼ 2:13 A, I3 ¼ 1:11 A, and VBE ¼ 13:70 V.
A C Alternative method for special case 2 (Super loop
2Ω B 3Ω method): This method eliminates the need to add the voltage
I1 variable as an unknown. When a current source is common to
12 V
+ I2 4Ω loops 1 and 2, then KVL is applied on a new loop called the
− super loop. The super loop is obtained from combining loops
2Å
1 and 2 (after deleting the common elements) as shown in
F D Figure 1.7. For the circuit considered in example 1.4, the loop
2Ω E 1Ω ABCDEFA is the super loop obtained by combining loops
1 and 2. The KVL is applied on this super loop instead of
FIGURE 1.6 Circuit for Example 1.4 KVL being applied for loop 1 and loop 2 separately. The
following is the KVL equation for super loop ABCDEFA:

Special case 2 2(I1  I3 ) þ 3(I2  I3 ) þ 4 I2 þ I2 þ 2 I1  12 ¼ 0

This case concerns a current source that is common to more ¼> 4 I1 þ 8 I2  5 I3 ¼ 12:
than one loop. The solution to this case is illustrated in
example 1.4. The KVL equation around loop 3 is written as:
Example 1.4. In the circuit shown in Figure 1.6, the 2 A
2 I1  3 I2 þ 6 I3 ¼ 0:
current source is common to loops 1 and 2. One method of
writing KVL equations is to treat VBE as an unknown
The current source can be written as:
and write three KVL equations. In addition, you can
write the current of the current source as I2  I1 ¼ 2,
I1 þ I2 ¼ 2:
giving a fourth equation. Solving the four equations
simultaneously, you determine the values of I1 , I2 , I3 ,
Solving the above three equations simultaneously produces
and VBE . These equations are the following:
equations I1 ¼ 0:13 A, I2 ¼ 2:13 A, and I3 ¼ 1:11 A.
Loop 1: 2(I1  I3 ) þ VBE þ 2 I1  12 ¼ 0
¼> 4 I1  2 I3 þ VBE ¼ 12.
1.3.2 Node Voltage Method (Nodal Analysis)
Loop 2: 3(I2  I3 ) þ 4 I2 þ I2  VBE ¼ 0
¼> 8 I2  3 I3  VBE ¼ 0. In this method, one node is chosen as the reference node
Loop 3: I3 þ 3(I3  I2 ) þ 2(I3  I1 ) ¼ 0 whose voltage is assumed as zero, and the voltages of other
¼> 2 I1  3 I2 þ 6 I3 ¼ 0. nodes are expressed with respect to the reference node. For
Current source relation: I1 þ I2 ¼ 2. example, in Figure 1.8, the voltage of node G is chosen as the
1 Linear Circuit Analysis 9

+ VAB − + VBC −

A C
RAB B

+ +
+
VAG = VA VBG = VB VCG = VC
− − −

FIGURE 1.8 Circuit with Node Voltages Marked

reference node, and then the voltage of node A is VA ¼ VAG 2Ω

and that of node B is VB ¼ VBG and so on. Then, for every
element between two nodes, the element voltages may be
1Ω 5Ω
expressed as the difference between the two node voltages. IBA B IBC
For example, the voltage of element RAB is VAB ¼ VA  VB . A C
Similarly VBC ¼ VB  VC and so on. Then the current through
IBG
the element RAB can be determined using the v–i characteristic +
of the element as IAB ¼ VAB =RAB . Once the currents of all 12 V 2Å
elements are known in terms of node voltages, KCL is applied − 4Ω
for each node except for the reference node, obtaining a total
of N–1 equations where N is the total number of nodes.

Special Case 1 G
In branches where voltage sources are present, the v–i relation
FIGURE 1.9 Circuit for Example 1.5
cannot be used to find the current. Instead, the current is left as
an unknown. Because the voltage of the element is known,
another equation can be used to solve the added unknown. ducing an unknown variable for the current through the voltage
When the element is a current source, the current through the source. Instead of applying KCL to each of the two nodes of the
element is known. There is no need to use the v–i relation. The voltage source element, KCL is applied to an imaginary node
calculation is illustrated in the following example. consisting of both the nodes together. This imaginary node is
Example 1.5. In Figure 1.9, solve for the voltages VA, called a super node. In Figure 1.10, the super node is shown by a
VB, and VC with respect to the reference node G. At node dotted closed shape. KCL on this super node is given by:
A, VA ¼ 12. At node B, KCL yields:
IBA þ IBG þ ICG þ ICA ¼ 0 ¼> (VB  VA )=1
IBA þ IBG þ IBC ¼ 0 ¼> þ VB =3 þ VC =4 þ (VC  VA )=2 ¼ 0:
(VB  VA )=1 þ VB =4 þ (VB  VC )=5 ¼ 0 ¼>
 VA þ (1 þ 1=4 þ 1=5)VB  VC =5 ¼ 0: In addition to this equation, the two voltage constraint equa-
tions, VA ¼ 10 and VB  VC ¼ 5, are used to solve for VB and
VC as VB ¼ 9 V and VC ¼ 4 V.
Similarly at node C, KCL yields:

VA =2  VB =5 þ (1=5 þ 1=2)VC ¼ 2:
1.4 Equivalent Circuits
Solving the above three equations simultaneously results
Two linear circuits, say circuit 1 and circuit 2, are said to be
in VA ¼ 12 V, VB ¼ 10:26 V, and VC ¼ 14:36 V.
equivalent across a specified set of terminals if the voltage–
Super Node: When a voltage source is present between two current relations for the two circuits across the specified
nonreference nodes, a super node may be used to avoid intro- terminals are identical. Now consider a composite circuit
10 P.K. Rajan and Arun Sekar

2Ω
5V
A + − C
B
1Ω
Super node
+ 3Ω 4Ω
5Ω
10 V −

FIGURE 1.10 Circuit with Super Node

A A

Circuit 1 Circuit 3 Circuit 2 Circuit 3

B B

(A) Composite Circuit with Circuit 1 (B) Composite Circuit with Circuit 2

FIGURE 1.11 Equivalent Circuit Application

+ V1 − + V2 − + VN − + VT −
I A1 A2 A3 AN AN+1 I
...

R1 R2 RN
Req
VT

(A) N Resistors Connected in Series (B) Equivalent Circuit

FIGURE 1.12 Resistances Connected in Series

consisting of circuit 1 connected to another circuit, circuit 3, at resistance of sum of the two resistances, Req ¼ R1 þ R2 , with-
the specified terminals as shown in Figure 1.11(A). The volt- out affecting the voltages and currents in the rest of the
ages and currents in circuit 3 are not altered if circuit 2 replaces circuit. In a similar manner, if N resistances R1 , R2 , . . . , RN
circuit 1, as shown in Figure 1.11(B). If circuit 2 is simpler are connected in series, their equivalent resistance will be given
than circuit 1, then the analysis of the composite circuit will by:
be simplified. A number of techniques for obtaining two-
terminal equivalent circuits are outlined in the following Req ¼ R1 þ R2 þ . . . þ RN : (1:9)
section.
Voltage Division: When a voltage VT is present across N
resistors connected in series, the total voltage divides across
1.4.1 Series Connection the resistors proportional to their resistance values. Thus
Two two-terminal elements are said to be connected in series
if the connection is such that the same current flows R1 R2 RN
V1 ¼ VT , V2 ¼ VT , . . . , VN ¼ VT , (1:10)
through both the elements as shown in Figure 1.12. When Req Req Req
two resistances R1 and R2 are connected in series, they
can be replaced by a single element having an equivalent where Req ¼ R1 þ R2 þ . . . þ RN .
1 Linear Circuit Analysis 11

1.4.2 Parallel Connection 1.4.3 Star–Delta (Wye–Delta or T–Pi)

Two-terminal elements are said to be connected in parallel if
Transformation
the same voltage exists across all the elements and if they have It can be shown that the star subnetwork connected as shown
two distinct common nodes as shown in Figure 1.13. In the case in Figure 1.14 can be converted into an equivalent delta sub-
of a parallel connection, conductances, which are reciprocals of network. The element values between the two subnetworks are
resistances, sum to give an equivalent conductance of Geq : related as shown in Table 1.3. It should be noted that the star
subnetwork has four nodes, whereas the delta network has only
Geq ¼ G1 þ G2 þ . . . þ GN , (1:11) three nodes. Hence, the star network can be replaced in a
circuit without affecting the voltages and currents in the rest
or equivalently

1 1 1 1
¼ þ þ ... þ : (1:12)
Req R1 R2 RN TABLE 1.3 Relations Between the Element Values in Star and Delta
Equivalent Circuits
Current Division: In parallel connection, the total current IT
of the parallel combination divides proportionally to the con- Star in terms of delta resistances Delta in terms of star resistances
ductance of each element. That is, the current in each element Rb Rc R1 R2 þ R2 R3 þ R3 R1
is proportional to its conductance and is given by: R1 ¼ Ra ¼
Ra þ Rb þ Rc R1
Rc Ra R1 R2 þ R2 R3 þ R3 R1
G1 G2 GN R2 ¼ Rb ¼
I1 ¼ IT , I2 ¼ IT , . . . , IN ¼ IT , (1:13) Ra þ Rb þ Rc R2
Geq Geq Geq
Ra Rb R1 R2 þ R2 R3 þ R3 R1
R3 ¼ Rc ¼
Ra þ Rb þ Rc R3
where Geq ¼ G1 þ G2 þ . . . þ GN .

IT A IT A

+ +

R1 R2 RN Req
V V
I1 I2 IN IT
− −

B B

(A) N Resistors Connected in Parallel (B) Equivalent Circuit

FIGURE 1.13 Resistances Connected in Parallel

R1
Rb Rc

N
R3 R2

C B
C Ra
B
(A) Star-Connected Circuit (B) Delta-Connected Circuit

FIGURE 1.14 Star and Delta Equivalent Circuits

12 P.K. Rajan and Arun Sekar

of the circuit only if the central node in the star subnetwork is 1.4.6 Source Transformation
not connected to any other circuit node.
Using a Norton equivalent circuit, a voltage source with a
series resistor can be converted into an equivalent current
1.4.4 Thevenin Equivalent Circuit source with a parallel resistor. In a similar manner, using
Thevenin theorem, a current source with a parallel resistor
A network consisting of linear resistors and dependent and can be represented by a voltage source with a series resistor.
independent sources with a pair of accessible terminals can be These transformations are called source transformations.
represented by an equivalent circuit with a voltage source and a The two sources in Figure 1.17 are equivalent between nodes
series resistance as shown in Figure 1.15. VTH is equal to the B and C.
open circuit voltage across the two terminals A and B, and RTH
is the resistance measured across nodes A and B (also called
looking-in resistance) when the independent sources in the 1.5 Network Theorems
network are deactivated. The RTH can also be determined as
RTH ¼ Voc =Isc , where Voc is the open circuit voltage across A number of theorems that simplify the analysis of linear
terminals A and B and where Isc is the short circuit current circuits have been proposed. The following section presents,
that will flow from A to B through an external zero resistance without proof, two such theorems: the superposition theorem
connection (short circuit) if one is made. and the maximum power transfer theorem.

1.4.5 Norton Equivalent Circuit 1.5.1 Superposition Theorem

A two-terminal network consisting of linear resistors and in- For a circuit consisting of linear elements and sources, the
dependent and dependent sources can be represented by an response (voltage or current) in any element in the circuit is
equivalent circuit with a current source and a parallel resistor the algebraic sum of the responses in this element obtained by
as shown in Figure 1.16. In this figure, IN is equal to the short applying one independent source at a time. When one inde-
circuit current across terminals A and B, and RN is the pendent source is applied, all other independent sources are
looking-in resistance measured across A and B after the inde- deactivated. It may be noted that a deactivated voltage source
pendent sources are deactivated. It is easy to see the following behaves as a short circuit, whereas a deactivated current
relation between Thevenin equivalent circuit parameters and source behaves as an open circuit. It should also be noted
the Norton equivalent circuit parameters: that the dependent sources in the circuit are not deactivated.
Further, any initial condition in the circuit is treated as an
RN ¼ RTH and IN ¼ VTH =RTH : (1:14) appropriate independent source. That is, an initially charged

A
A
RTH
Linear
resistors +
VTH
and −
sources
B
B

(A) Linear Network with Two Terminals (B) Equivalent Circuit Across the Terminals

FIGURE 1.15 Thevenin Equivalent Circuit

Linear A A
resistors IN RN
and
sources B
B

(A) Linear Network with Two Terminals (B) Equivalent Circuit Across AB in (A)

FIGURE 1.16 Norton Equivalent Circuit

1 Linear Circuit Analysis 13

5Ω 3Ω 3Ω
A B D A B D

+ 4Ω 2Ω
10 V 5Ω 4Ω 2Ω
− 2Å

C C

FIGURE 1.17 Example of Source Transformation

capacitor is replaced by an uncharged capacitor in series with 1.6.1 First-Order Circuits

an independent voltage source. Similarly, an inductor with an
A circuit with a single energy-storing element yields a first-
initial current is replaced with an inductor without any initial
order differential equation as shown below for the circuits in
current in parallel with an independent current source. The
Figure 1.20.
following example illustrates the application of superposition
Consider the RC circuit in Figure 1.20(A). For t > 0, writing
in the analysis of linear circuits.
KVL around the loop, the result is equation:
Example 1.6. For the circuit in Figure 1.18(A), deter-
mine the voltage across the 3-V resistor. The circuit has ðt
two independent sources, one voltage source and one 1
Ri þ vc (0) þ idt ¼ vs : (1:15)
current source. Figure 1.18(B) shows the circuit when c
0
voltage source is activated and current source is deacti-
vated (replaced by an open circuit). Let V31 be the Differentiating with respect to t yields:
voltage across the 3-V resistor in this circuit. Figure
1.18(C) shows the circuit when current source is acti- di 1
vated and voltage source is deactivated (replaced by a R þ i ¼ 0: (1:16)
dt c
short circuit). Let V32 be the voltage across the 3-V
resistor in this circuit. Then you determine that the
The solution of the above homogeneous differential equation
voltage across the 3-V resistor in the given complete
can be obtained as:
circuit is V3 ¼ V31 þ V32 .
i(t) ¼ Ke 1=RCt : (1:17)
1.5.2 Maximum Power Transfer Theorem
In the circuit shown in Fig. 1.19, power supplied to the load is The value of K can be found by using the initial voltage vc (0) in
maximum when the load resistance is equal to the source the capacitor as:
resistance.
It may be noted that the application of the maximum power vs  vc (0)
K ¼ i(0) ¼ : (1:18)
transfer theorem is not restricted to simple circuits only. R
The theorem can also be applied to complicated circuits as
long as the circuit is linear and there is one variable load. In Substituting this value in the expression for i(t) determines the
such cases, the complicated circuit across the variable load is final solution for i(t) as:
replaced by its equivalent Thevenin circuit. The maximum
power transfer theorem is then applied to find the load resist- vs  vc (0) (1=RC)t
ance that leads to maximum power in the load. i(t) ¼ e : (1:19)
R

This exponentially decreasing response i(t) is shown in Figure

1.6 Time Domain Analysis 1.21(A). It has a time constant of t ¼ RC. The voltage Vc (t) is
also shown in Figure 1.21(B)
When a circuit contains energy storing elements, namely in- In a similar manner, the differential equation for i(t) in the
ductors and capacitors, the analysis of the circuit involves the RL circuit shown in Figure 1.20(B) can be obtained for t > 0
solution of a differential equation. as:
14 P.K. Rajan and Arun Sekar

1Ω + V3 − 4Ω
I1
3Ω

+ 2Ω 2 Ix 2 Å
10 V
−
Ix

(A) Original Circuit

1Ω + V31 − 4Ω
I11
3Ω

+ 2Ω 2 Ix1
10 V
− Ix1

(B) Circuit When Voltage Source Is Activated and Current Source Is Deactivated

1Ω + V32 − 4Ω
I12
3Ω

2Ω 2 Ix 2 2Å

Ix2

(C) Circuit When Current Source Is Activated and Voltage Source Is Deactivated

FIGURE 1.18 Circuits for Example 1.6

di
Ri þ L ¼ vs : (1:20)
dt

Rs
Because this is a nonhomogeneous differential equation, its
solution consists of two parts:

i(t) ¼ in (t) þ if (t), (1:21)

where in (t), the natural response (also called the complemen-

+
Vs RL tary function) of the circuit, is the solution of the homoge-
− neous differential equation:

din
L þ Rin ¼ 0: (1:22)
dt

FIGURE 1.19 Circuit with a Variable Load Excited by a Thevenin The forced response (also called the particular integral) of
Source the circuit, if (t), is given by the solution of the nonhomoge-
1 Linear Circuit Analysis 15

R
R t=0 i
t=0 i

+ +
+
vs L
vs C vc
− −
−

(A) RC Circuit (B) RL Circuit

FIGURE 1.20 Circuits with a Single Energy-Storing Element

vs
vs − vc(0)
vc(t)

i(t) vc(0)

0 t 0 t

(A) i(t) (B) vc(t)

FIGURE 1.21 Response of the Circuit in Figure 1.20(A)

neous differential equation corresponding to the particular

forcing function vs . If vs is a constant, the forced response in
general is also a constant. In this case, the natural and forced
I0
responses and the total response are given by:

vs vs i(t)
in (t) ¼ Ke R=L t , if (t) ¼ , and i(t) ¼ Ke (R=L)t þ :
R R
(1:23)
vs
vs /R
K is found using the initial condition in the inductor i(0) ¼ I0 R
as i(0) ¼ K þ vs =R, and so K ¼ I0  vs =R. Substituting for K
in the total response yields:

0
vs  (R=L)t vs t
i(t) ¼ I0  e þ : (1:24)
R R
FIGURE 1.22 Response of the Circuit Shown in Figure 1.20(B)
The current waveform, shown in Figure 1.22, has an exponen-
tial characteristic with a time constant of L/R [s].

second-order differential equation. Consider, for example, the

1.6.2 Second-Order Circuits circuit shown in Figure 1.23.
If the circuit contains two energy-storing elements, L and/or C, Writing KCL around the loop and substituting i ¼ Cdvc =dt
the equation connecting voltage or current in the circuit is a results in:
16 P.K. Rajan and Arun Sekar
rffiffiffiffiffiffi
R 1
t=0 i L s1, 2 ¼ j ¼  jv0 : (1:32)
LC

The corresponding natural response is an undamped oscilla-

+ +
tion of the form:
vs C vc
−
− vn (t) ¼ K cos (v0 t þ u): (1:33)

The forced response can be obtained as vf (t) ¼ Vs . The total

solution is obtained as:
FIGURE 1.23 Circuit with Two Energy-Storing Elements
vc (t) ¼ vn (t) þ Vs : (1:34)
2
d vc dvc
LC þ RC þ vc ¼ vs : (1:25) The unknown coefficients K1 and K2 in cases 1 and 2 and K
dt dt
and u in cases 3 and 4 can be calculated using the initial values
This equation can be solved by either using a Laplace trans- on the current in the inductor and the voltage across the
form or a conventional technique. This section illustrates the capacitor.
use of the conventional technique. Assuming a solution of Typical responses for the four cases when Vs equals zero
the form vn (t) ¼ Ke st for the homogeneous equation yields are shown in Figure 1.24. For circuits containing energy-
the characteristic equation as: dissipating elements, namely resistors, the natural response in
general will die down to zero as t goes to infinity. The com-
LCs 2 þ RCs þ 1 ¼ 0: (1:26) ponent of the response that goes to zero as time t goes
to infinity is called the transient response. The forced re-
Solving for s results in the characteristic roots written as: sponse depends on the forcing function. When the forcing
sffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi
ffi function is a constant or a sinusoidal function, the forced
 2 response will continue to be present even as t goes to infinity.
R R 1
s 1, 2 ¼    : (1:27) The component of the total response that continues to exist for
2L 2L LC
all time is called steady state response. In the next section,
computation of steady state responses for sinusoidal forcing
Four cases should be considered:
functions is considered.
Case 1: (R=2L)2 > (1=LC). The result is two real negative
roots s1 and s2 for which the solution will be an overdamped
response of the form: 1.6.3 Higher Order Circuits
When a circuit has more than two energy-storing elements, say
vn (t) ¼ K1 e s1 t þ K2 e s2 t : (1:28)
n, the analysis of the circuit in general results in a differential
equation of order n. The solution of such an equation follows
Case 2: (R=2L)2 ¼ (1=LC). In this case, the result is a double
steps similar to the second-order case. The characteristic equa-
root at s0 ¼ R=2L. The natural response is a critically
tion will be of degree n and will have n roots. The natural
damped response of the form:
response will have n exponential terms. Also, the forced
response will in general have the same shape as the forcing
vn (t) ¼ (K1 t þ K2 )e s0 t : (1:29)
function. The Laplace transform is normally used to solve such
Case 3: 0 < (R=2L)2 < (1=LC). This case yields a pair of higher order circuits.
complex conjugate roots as:
sffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi
 2ffi 1.7 Laplace Transform
R 1 R
s 1, 2 ¼   j  ¼ s  jvd : (1:30)
2L LC 2L In the solution of linear time-invariant differential equations,
it was noted that a forcing function of the form Ki e st yields
The corresponding natural response is an underdamped oscil- an output of the form Ko e st where s is a complex variable. The
latory response of the form: function e st is a complex sinusoid of exponentially varying
amplitude, often called a damped sinusoid. Because linear
vn (t) ¼ Ke st cos (vd t þ u): (1:31) equations obey the superposition principle, the solution of a
linear differential equation to any forcing function can be
Case 4: R=2L ¼ 0. In this case, a pair of imaginary roots are found by superposing solutions to component-damped sinu-
created as: soids if the forcing function is expressed as a sum of damped
1 Linear Circuit Analysis 17

3
3

2
2

x x
1
1

0
0 1 2 0 1 2
t [s] t [s]
(A) Overdamped Response (B) Critically Damped Response

3 6
Freq. w0 = 4 r/s
Period T = 1.5708 s
4
2 f = f/t = 0.6366 Hz

2
x 1 x
0

0 −2

−4
−1

−6
0 1 2 3 0 1 2 3
t [s] t [s]
(C) Underdamped Response (D) Undamped Response

FIGURE 1.24 Typical Second-Order Circuit Responses

sinusoids. With this objective in mind, the Laplace transform gral. The equation 1.36 shows that f (t) is expressed as a sum
is defined. The Laplace transform decomposes a given time (integral) of infinitely many exponential functions of complex
function into an integral of complex-damped sinusoids. frequencies (s) with complex amplitudes (phasors) {F(s)}. The
complex amplitude F(s) at any frequency s is given by the
integral in equation 1.35. The Laplace transform, defined as
1.7.1 Definition the integral extending from zero to infinity, is called a single-
The Laplace transform of f (t) is defined as: sided Laplace transform against the double-sided Laplace
transform whose integral extends from 1 to þ1. As transi-
ð
1 ent response calculations start from some initial time, the
F(s) ¼ f (t)e st dt: (1:35) single-sided transforms are sufficient in the time domain
0 analysis of linear electric circuits. Hence, this discussion con-
siders only single-sided Laplace transforms.
The inverse Laplace transform is defined as:

s0 þj1
1.7.2 Laplace Transforms of Common Functions
ð
1 Consider
f (t) ¼ F(s)e st dt: (1:36)
2pj
s0 j1
f (t) ¼ Ae at for 0  t  1, (1:37)
F(s) is called the Laplace transform of f (t), and s0 is included
in the limits to ensure the convergence of the improper inte- then
18 P.K. Rajan and Arun Sekar
1
ð
1 
(aþs)t  df
at st Ae  s 2 F(s)  sf (0)  (0) þ 6(sF(s)  f (0)) þ 8F(s)
F(s) ¼ Ae e dt ¼ dt
(a þ s) 4
(1:40)
0 0 (1:38) ¼ :
Ae 1  Ae 0 A (s þ 1)
¼ ¼ :
(a þ s) sþa Substituting for the initial values, you get:
In this equation, it is assumed that Re(s)  Re(a). In the 4
region in the complex s-plane where s satisfies the condition s 2 F(s)  2s  3 þ 6sF(s)  12 þ 8F(s) ¼ : (1:41)
(s þ 1)
that Res > Rea, the integral converges, and the region is called
the region of convergence of F(s). When a ¼ 0 and A ¼ 1, the (2s þ 15)(s þ 1) þ 4
(s 2 þ 6s þ 8)F(s) ¼
above f (t) becomes u(t), the unit step function. Substituting (s þ 1)
these values in equation 1.38, the Laplace transform of u(t) is 2 (1:42)
(2s þ 17s þ 19)
obtained as 1/s. In a similar way, letting s ¼ j!, the Laplace ¼ :
(s þ 1)
transform of Ae j!t is obtained as A=(s  j!). Expressing
cos (!t) ¼ (e j!t þ e j!t )=2, we get the Laplace transform of (2s 2 þ 17s þ 19) (2s 2 þ 17s þ 19)
F(s) ¼ ¼ : (1:43)
A cos (!t) as A s=(s 2 þ !2 ). In a similar way, the Laplace trans- 2
(s þ 6s þ 8)(s þ 1) (s þ 2)(s þ 4)(s þ 1)
form of A sin (!t) is obtained as A !=(s 2 þ w 2 ). Transforms for
some commonly occurring functions are given in Table 1.4. Applying partial fraction expansion, you get:
This table can be used for finding forward as well as inverse
transforms of functions. 7=2 17=6 4=3
F(s) ¼ þ þ : (1:44)
As mentioned at the beginning of this section, the Laplace sþ2 sþ4 sþ1
transform can be used to solve linear time-invariant differen-
tial equations. This will be illustrated next in example 1.7. Taking the inverse Laplace transform using the Table 1.5, you
get:
Example 1.7. Consider the second-order differential
equation and use the Laplace transform to find a solution: 7e 2t 17e 4t 4e t
f (t) ¼ þ for t > 0: (1:45)
2 6 3
2
d f df
þ 6 þ 8f ¼ 4e t (1:39)
dt 2 dt It may be noted that the total solution is obtained in a single
df step while taking the initial conditions along the way.
with initial conditions f (0) ¼ 2 and (0) ¼ 3:
dt
1.7.3 Solution of Electrical Circuits Using the
Taking the Laplace transform of both sides of the above differ- Laplace Transform
ential equation produces:
There are two ways to apply the Laplace transform for the
solution of electrical circuits. In one method, the differen-
tial equations for the circuit are first obtained, and then the
differential equations are solved using the Laplace transform.
TABLE 1.4 Laplace Transforms of Common Functions In the second method, the circuit elements are converted
f (t), for t  0 F(s) into s-domain functions and KCL and KVL are applied to
the s-domain circuit to obtain the needed current or voltage
A A in the s-domain. The current or voltage in time domain is
s
obtained using the inverse Laplace transform. The second
A
Ae st method is simpler and is illustrated here.
sþs
A Let the Laplace transform of {v(t)} ¼ V (s) and Laplace
At transform of {i(t)} ¼ I(s). Then the s-domain voltage current
s2
! relations of the R, L, and C elements are obtained as follows.
sin (!t)
s 2 þ !2 Consider a resistor with the v–i relation:
s
cos (!t)
s 2 þ !2 v(t) ¼ R i(t): (1:46)
sþs
e st cos (!t)
(s þ s)2 þ !2
Taking the Laplace transform on both the sides yields:
!
e st sin (!t)
(s þ s)2 þ !2
V (s) ¼ R I(s): (1:47)
1 Linear Circuit Analysis 19

TABLE 1.5 Properties of Laplace Transforms where V1 (s), V2 (s), . . . , Vn (s) are the s-domain voltages
around the loop. In fact, the various time-domain theorems
Operations f (t) F(s)
considered earlier, such as the superposition, Thevenin, and
Addition f1 (t) þ f2 (t) F1 (s) þ F2 (s) Norton theorems, series and parallel equivalent circuits and
Scalar multiplication A f (t) A F(s) voltage and current divisions are also valid in the s-domain.
Time differentiation d=dt{f (t)} sF(s)  f (0)
Ð
1
The loop current method and node voltage method can be
F(s)
Time integration f (t)dt
s
applied for analysis in s-domain.
0
Ð
1
Convolution f1 (t  t)f2 (t)dt F1 (s)F2 (s) Example 1.8. Consider the circuit given in Figure
0
at
1.25(A) and convert a linear circuit into an s-domain
Frequency shift f (t)e F(s þ a)
Time shift f (t  a)u(t  a) e as F(s)
circuit. You can obtain the s-domain circuit shown
dF in Figure 1.25(B) by replacing each element by its
Frequency differentiation t f (t)
ds equivalent s-domain element. As noted previously, the
f (t) Ð
1 differential relations of the elements on application of
Frequency integration F(s)ds
t s the Laplace transform have become algebraic relations.
Scaling f (at), a > 0
1 s
F( )
Applying KVL around the loop, you can obtain the
a a following equations:
Initial value f (0þ ) lim sF(s)
s!1
Final value f (1) lim sF(s) 6 3 10
s!0 2I(s) þ 0:2sI(s)  0:4 þ I(s) þ ¼ : (1:51)
s s s
Note: The u(t) is the unit step function defined by u(t) ¼ 0 for t < 0 and u(t) ¼ 1 for
6 10 3 7 þ 0:4s
t > 0. (2 þ 0:2s þ )I(s) ¼  þ 0:4 ¼ : (1:52)
s s s s
Defining the impedance of an element as V (s)=I(s) ¼ Z(s) 2s þ 35 2(s þ 5) þ 25
I(s) ¼ ¼ pffiffiffi : (1:53)
produces Z(s) ¼ R for a resistance. For an inductance, þ 10s þ 30 (s þ 5)2 þ ( 5)2
s2
v(t) ¼ L di=dt. Taking the Laplace transform of the relation pffiffiffi pffiffiffi pffiffiffi
yields V (s) ¼ sL I(s)  Li(0), where i(0) represents the initial i(t) ¼ e 5t {2 cos ( 5t) þ 5 5 sin ( 5t)}
(1:54)
current in the inductor and where Z(s) ¼ sL is the impedance of for t > 0:
the inductance. For a capacitance, i(t) ¼ c dv=dt and I(s) ¼ sc
V (s)  cv(0), where v(0) represents the initial voltage across the From 1.51 to 1.54 equations, you can see that the solution
capacitance and where 1/sc is the impedance of the capacitance. using the Laplace transform determines the natural response
Equivalent circuits that correspond to the s-domain relations and forced response at the same time. In addition, the initial
for R, L, and C are shown in Table 1.6 and are suitable for writ- conditions are taken into account when the s-domain circuit is
ing KVL equations (initial condition as a voltage source) as set up. A limitation of the Laplace transform is that it can be
well as for writing KCL equations (initial condition as a current used only for linear circuits.
source). With these equivalent circuits, a linear circuit can be
converted to an s-domain circuit as shown in the example 1.8.
It is important first to show that the KCL and KVL relations 1.7.4 Network Functions
can also be converted into s-domain relations. For example,
For a one-port network, voltage and current are the two
the KCL relation in s-domain is obtained as follows: At any
variables associated with the input port, also called the driving
node, KCL states that:
port. One can define two driving point functions under zero
initial conditions as:
i1 (t) þ i2 (t) þ i3 (t) þ . . . þ in (t) ¼ 0: (1:48)
V (s)
By applying Laplace transform on both sides, the result is: Driving point impedance Z(s) ¼ :
I(s)
I1 (s) þ I2 (s) þ I3 (s) þ . . . þ In (s) ¼ 0, (1:49) I(s)
Driving point admittance Y (s) ¼ :
V (s)
which is the KCL relation for s-domain currents in a node. In
a similar manner, the KVL around a loop can be written in In the case of two-port networks, one of the ports may be
s-domain as: considered as an input port with input signal X(s) and the
other considered the output port with output signal Y(s). Then
V1 (s) þ V2 (s) þ . . . þ Vn (s) ¼ 0, (1:50) the transfer function is defined as:
20 P.K. Rajan and Arun Sekar

TABLE 1.6 s-Domain Equivalent Circuits for R, I, and C Elements

Time domain Laplace domain KVL Laplace domain KCL

R [ohm] R [ohm] G [siemens]

i(t) [ampere] I(s) [ampere] I(s) [ampere]

+ − + − + −
v(t) [volt] V(s) [volt] V(s) [volt]

v(t) = R i(t) V(s) = RI (s) I(s) = G V(s)

i(0+)/s

L[henry] sL[ohm] Li(0+) [volt]

i(t) [ampere] −+
(1/sL) [siemens]
I(s) +
I(s)
+ − + I(s)
V(s)
v(t) [volt]
+ V(s)
v(t) = Ldi/dt V(s) = (sL) I(s) − Li(0+) I(s) = (1/sL)V(s) + [i (0+)/s]

Cv(0+) [ampere]
C[farad] (1/sC)[ohm] (v (0 +)/s)

i(t) [A] + −
+ + sC [siemens]
I(s) I(s)
+ − I(s)
v(t) [volt] V(s) + V(s)

i(t) = C dv/dt V(s) = (1/sC)I(s) + (v(0 +)/s) I(s) = (sC) V(s) − Cv (0+)

Note: [A] represents ampere, and [V] represents volt.

Y (s) 1.8 State Variable Analysis

H(s) ¼ , under zero initial conditions:
X(s)
State variable analysis or state space analysis, as it is some-
In an electrical network, both Y(s) and X(s) can be either times called, is a matrix-based approach that is used for
voltage or current variables. Four transfer functions can be analysis of circuits containing time-varying elements as well
defined as: as nonlinear elements. The state of a circuit or a system
is defined as a set of a minimum number of variables associ-
V2 (s) ated with the circuit; knowledge of these variables along
Transfer voltage ratio Gv (s) ¼ ,
V1 (s) with the knowledge of the input will enable the prediction
under the condition I2 (s) ¼ 0: of the currents and voltages in all system elements at any future
time.
I2 (s)
Transfer current ratio Gi (s) ¼ ,
I1 (s)
under the condition V2 (s) ¼ 0: 1.8.1 State Variables for Electrical Circuits
As was mentioned earlier, only capacitors and inductors are
V2 (s)
Transfer impedance Z21 ¼ , capable of storing energy in a circuit, and so only the variables
I1 (s)
associated with them are able to influence the future condition
under the condition I2 (s) ¼ 0: of the circuit. The voltages across the capacitors and the
I2 (s) currents through the inductors may serve as state variables. If
Transfer admittance Y21 ¼ ,
V1 (s) loops are not solely made up of capacitors and voltage sources,
under the condition V2 (s) ¼ 0: then the voltages across all the capacitors are independent
1 Linear Circuit Analysis 21

2Ω
i 0.2 H
t=0
i(0) = 2 A
Vc(0) = 3 V

+ +
Vs(t) = 10 V 1 Vc
F
− 6
−

(A) Time-Domain Circuit

2Ω 0.2s Ω 0.4 V
− +

I(s)
+
+
10 V
s 6Ω Vc
s
−
3 +
s V −
−

(B) s-Domain Equivalent Circuit

FIGURE 1.25 Circuit for Example 1.8

variables and may be taken as state variables. In a similar way, equations, where the derivative of state variables is expressed
if there are no sets of inductors and current sources that as a linear combination of state variables and forcing func-
separate the circuit into two or more parts, then the currents tions, is said to be in normal form.
associated with the inductors are independent variables and
Example 1.9. Consider the circuit shown in Figure 1.26
may be taken as state variables. The following examples assume
and solve for state variable equations in matrix form.
that all the capacitor voltages and inductor currents are inde-
Taking vL and iC as state variables and applying KVL
pendent variables and will form the set of state variables for the
around loop ABDA, you get:
circuit.
diL 1 1 1 1
¼ vL ¼ (va  vC ) ¼ va  vC : (1:56)
1.8.2 Matrix Representation of State Variable dt L L L L
Equations
Similarly, by applying KCL at node B, you get:
Because matrix techniques are used in state variable analysis,
the state variables are commonly expressed as a vector x, and dvC 1 1
the input source variables are expressed as a vector r. The ¼ (iC ) ¼ (iL þ i1 ): (1:57)
dt C C
output variables are denoted as y.
Once the state variables x are chosen, KVL and KCL are used
to determine the derivatives ẋ of the state variables and the
output variables y in terms of the state variables x and source
variables r. They are expressed as: vL vo
+ − + −

x_ ¼ Ax þ Br: iL R1
(1:55) + +
y ¼ Cx þ Dr: va C vc R2 ib
− −
The ẋ equation is called the state dynamics equation, and the
y equation is called the output equation. A, B, C, and D are
appropriately dimensioned coefficient matrices. This set of FIGURE 1.26 Circuit for Example 1.9
22 P.K. Rajan and Arun Sekar

The current i1 can be found either by writing node equation at Consider the state dynamics equation:
node C or by applying the superposition as:
x_ ¼ Ax þ Br: (1:63)
R2 1
i1 ¼ ib  vc : (1:58)
R1 þ R2 R1 þ R2 Taking the Laplace transform on both sides yields:

Substituting for i1 in equation 1.57, you get: sX(s)  x(0) ¼ AX(s) þ BR(s), (1:64)

dvC 1 1 1 where X(s) and R(s) are the Laplace transforms of x(t) and
¼ iL þ ib  vc : (1:59)
dt C C(R1 þ R2 ) C(R1 þ R2 ) r(t), respectively, and x(0) represents the initial conditions.
Rearranging equation 1.64 results in:
The output vo can be obtained as i1 R1 and can be expressed
in terms of state variables and sources by employing equation (sI  A)X(s) ¼ x(0) þ BR(s)
1.58 as: (1:65)
X(s) ¼ (sI  A)1 x(0) þ (sI  A)1 BR(s):
R1 R2 R1
vo ¼  ib þ vc : (1:60) Taking the inverse Laplace transform of X(s) yields:
R1 þ R2 R1 þ R2
x(t) ¼ f(t)x(0) þ f(t)  Br(t), (1:66)
Equations 1.56, 1.59, and 1.60 can be expressed in matrix
form as:
where f(t), the inverse Laplace transform of {(sI  A)1 }, is
2 3 2 3 called the state transition matrix and where * represents the
diL 1  
6 dt 7 6 0  7 iL time domain convolution.
6 7 6 L 7
4 dvC 5 ¼4 1 1 5 v Expanding the convolution, x(t) can be written as:
C
dt C C(R 1 þ R 2 ) ðt
2 3 (1:61)
1   x(t) ¼ f(t)x(0) þ f(t  t)Br(t)dt: (1:67)
6L 0 7 va
þ4 6 7
1 5 i : 0
0 b
C(R1 þ R2 ) Once x(t) is known, y(t) may be found using the output
   equation 1.60.
R1 iL
[vo ] ¼ 0
R1 þ R2 vC
   (1:62)
R1 R2 va
þ 0 
R1 þ R2 ib
: 1.9 Alternating Current Steady State
Analysis
The ordering of the variables in the state variable vector x and
the input vector r is arbitrary. Once the ordering is chosen, 1.9.1 Sinusoidal Voltages and Currents
however, it must remain the same for all the variables in every Standard forms of writing sinusoidal voltages and currents are:
place of occurrence. In large circuits, topological methods may
be employed to systematically select the state variables and v(t) ¼ Vm cos (vt þ a)[V]: (1:68a)
write KCL and KVL equations. For want of space, these
methods are not described in this discussion. Next, this chap- i(t) ¼ Im cos (vt þ b)[A]: (1:68b)
ter briefly goes over the method for solving state variable
equations. Vm and Im are the maximum values of the voltage and current,
v is the frequency of the signal in radians/second, and a and b
are called the phase angles of the voltage and current, respect-
1.8.3 Solution of State Variable Equations ively. Vm , Im , and v are positive real values, whereas a and b
There are many methods for solving state variable equations: are real and can be positive or negative. If a is greater than b,
(1) computer-based numerical solution, (2) conventional dif- the voltage is said to lead the current, or the current to lag the
ferential equation time-domain solution, and (3) Laplace voltage. If a is less than b the voltage is said to lag the current,
transform s-domain solution. This chapter will only present or the current to lead the voltage. If a equals b, the voltage and
the Laplace transform domain solution. current are in phase.
1 Linear Circuit Analysis 23

1.9.2 Complex Exponential Function

Define Xm e j(vtþf) as a complex exponential function. By I Length of current phasor:Im
Euler’s theorem,

Imaginary part
e ju ¼ cos u þ j sin u:
Xm e j(vtþf) ¼ Xm [ cos (vt þ f) þ j sin (vt þ f)]: β
V Length of voltage phasor:Vm

x(t) ¼ Xm cos (vt þ f): α

j(vtþf) jf jvt 0 Real part
¼ Real [Xm e ] ¼ Real [(Xm e )e ]:
(1:69)

The term (Xm e jf ) is called the phasor of the sinusoidal func- FIGURE 1.27 Phasor Diagram
tion x(t). For linear RLCM circuits, the forced response is
sinusoidal at the input frequency. Since the natural response
decays exponentially in time, the forced response is also the of the vector is the magnitude of the phasor, and the direction
steady state response. is the phase angle. The projection of the vector on the x-axis is
the real part of the phasor, and the projection on the y-axis is
1.9.3 Phasors in Alternating Current Circuit the imaginary part of the phasor in rectangular form as noted
Analysis in Figure 1.27. The graphical representation is called the pha-
sor diagram and the vector is called the phasor.
Consider voltage and current waves of the same frequency:

v(t) ¼ Vm cos (vt þ a)[V]: 1.9.5 Phasor Voltage–Current Relationships of

Circuit Elements
i(t) ¼ Im cos (vt þ b)[A]:
Voltage v(t) and current i(t) are sinusoidal signals at a fre-
Alternative representation is by complex exponentials: quency of v rad/s, whereas V and I are phasor voltage and
current, respectively. The v–i and V–I relations for R, L, and C
v(t) ¼ Real [Vm e ja ]e jvt [V]: elements are given in Table 1.8.

i(t) ¼ Real [Im e jb ]e jvt [A]:

1.9.6 Impedances and Admittances in Alternating
Phasor voltage and current are defined as:
Current Circuits
Impedance Z is defined as the ratio of phasor voltage to
V ¼ Vm e ja [V]: (1:70a) phasor current at a pair of terminals in a circuit. The unit of
impedance is ohms. Admittance Y is defined as the ratio of
I ¼ Im e jb [A]: (1:70b) phasor current to phasor voltage at a pair of terminals of a
circuit. The unit of admittance is siemens. Z and Y are com-
Since a phasor is a complex number, other representations of a plex numbers and reciprocals of each other. Note that phasors
complex number can be used to specify the phasor. These are are also complex numbers, but phasors represent time-varying
listed in Table 1.7. sinusoids. Impedance and admittance are time invariant and
Addition of two voltages or two currents of the same fre- frequency dependent. Table 1.9 shows the impedances and
quency is accomplished by adding the corresponding phasors. admittances for R, L, and C elements. It may be noted that
the phasor impedance for an element is obtained by substitut-
1.9.4 Phasor Diagrams ing s ¼ j! in the s-domain impedance Z(s) of the correspond-
ing element.
Since a phasor is a complex number, it can be represented on a
complex plane as a vector in Cartesian coordinates. The length
TABLE 1.8 Element Voltage–Current Relationships
TABLE 1.7 Representation of Phasor Voltages and Currents
Element Time domain Frequency domain
Phasor Exponential form Rectangular form Polar form
Resistance: R v ¼ Ri V ¼ RI
V Vm e ja Vm cos a þ jVm sin a Vm ff a[V] Inductance: L v ¼ Ldi=dt V ¼ jv LI
I Im e jb Im cos b þ jIm sin b Im ff b[A] Capacitance: L i ¼ Cdv=dt I ¼ jv CV
24 P.K. Rajan and Arun Sekar

TABLE 1.9 Impedances and Admittances of Circuit Elements

Element Resistance: R Inductor: L Capacitor: C

Z [ohm] R j XL j XC
XL ¼ vL XC ¼ 1=v C
(XL is the inductive reactance.) (XC is the capacitive reactance.)
Y [siemens] G ¼ 1=R j BL j BC
BL ¼ 1=v L BC ¼ vC
(G is the conductance.) (BL is the inductive susceptance.) (BC is the capacitive susceptance.)

1.9.7 Series Impedances and Parallel Admittances the variables. Impedances and admittances describe the ele-
ment voltage–current relationships. Some of the methods are
If n impedances are in series, their equivalent impedance is
described in this section.
given by Zeq ¼ (Z1 þ Z2 þ . . . þ Zn ). Similarly, the equivalent
Method of superposition: Circuits with multiple sources
admittance of n admittances in parallel is given by
of the same frequency can be solved by using the mesh or
Yeq ¼ (Y1 þ Y2 þ . . . þ Yn ).
nodal analysis method on the phasor circuit at the source
frequency. Alternatively, the principle of superposition in
1.9.8 Alternating Current Circuit Analysis linear circuits can be applied. First, solve the phasor circuit
for each independent source separately. Then add the response
Before the steady state analysis is made, a given time-domain
voltages and currents from each source to get the total re-
circuit is replaced by its phasor-domain circuit, also called the
sponse. Since the responses are at the same frequency, phasor
phasor circuit. The phasor circuit of a given time-domain
addition is valid.
circuit at a specified frequency is obtained as follows:
Voltage and current source equivalence in ac circuits:
. Voltages and currents are replaced by their corresponding An ac voltage source in series with an impedance can be
phasors. replaced across the same terminals by an equivalent ac current
. Circuit elements are replaced by impedances or admit- source of the same frequency in parallel with an admittance, as
tances at the specified frequency given in Table 1.9. shown in Figure 1.28. Similarly, an ac current source in parallel
with an admittance can be replaced across the same terminals
All circuit analysis techniques are now applicable to the
by an equivalent ac voltage source of the same frequency in
phasor circuit.
series with an impedance.
Current and voltage division in ac circuits:
1.9.9 Steps in the Analysis of Phasor Circuits For two impedances in series:
. Select mesh or nodal analysis for solving the phasor
Z1 Z2
circuit. V1 ¼ ( )V , V2 ¼ ( )V
Z1 þ Z2 Z1 þ Z2
. Mark phasor mesh currents or phasor nodal voltages.
. Use impedances for mesh analysis and admittances for
nodal analysis.
. Write KVL around meshes (loops) or KCL at the nodes.
KVL around a mesh: The algebraic sum of phasor voltage
drops around a mesh is zero. I I
KCL at a node: The algebraic sum of phasor currents Z a a
+ +
leaving a node is zero.
. Solve the mesh or nodal equations with complex coeffi- +
- Vab Y Vab
E
cients and obtain the complex phasor mesh currents or
nodal voltages. The solution can be obtained by variable Is
b b
elimination or Cramer’s rule. Remember that the arith-
metic is complex number arithmetic. Voltage source Current source

Source equivalence: ac
1.9.10 Methods of Alternating Current Circuit E = ( Is / Y ) Is = ( E / Z )
Analysis Z = ( 1/Y ) Y = ( 1/Z )
All methods of circuit analysis are applicable to alternating
current (ac) phasor circuits. Phasor voltages and currents are FIGURE 1.28 Source Transformations
1 Linear Circuit Analysis 25

For n impedances in series then defined as the variation of the gain as a function of
0 1 0 1 0 1 frequency. The above gain functions are also called transfer
functions and written as H(jv). H(jv) is a complex number
B Z1 C B C B C
V1 ¼ B CV , V 2 ¼ B Z 2 CV , . . . , V n ¼ B Z n CV : and can be written in polar form as follows:
@Pn A @Pn A @Pn A
Zi Zi Zi
i¼1 i¼1 i¼1 H(jv) ¼ A(v)=f(v) (1:71)

For two admittances in parallel where A(v) is the gain magnitude function, jH(jv)j, and f(v)
    is the phase function given by the argument of H(jv). In
Y1 Y2 addition to the above gain functions, a number of other useful
I1 ¼ I, I 2 ¼ I
Y1 þ Y2 Y1 þ Y2 ratios (network functions) among the voltages and currents of
two port networks can be defined. These definitions and their
For n admittances in parallel: nomenclature are given in Figure 1.30.
0 1 0 1 0 1
B Y1 C B Y2 C B C 1.9.12 Bode Diagrams
I1 ¼ B CI, I2 ¼ B CI, . . . , I n ¼ B Y n CI:
@Pn A @Pn A @Pn A Bode diagrams are graphical representations of the frequency
Yi Yi Yi
i¼1 i¼1 i¼1
responses and are used in solving design problems. Magnitude
and phase functions are shown on separate graphs using
Thevenin theorem for ac circuits: A phasor circuit across a logarithmic frequency scale along the x-axis. Logarithm of
pair of terminals is equivalent to an ideal phasor voltage source the frequency to base 10 is used for the x-axis of a graph.
Voc in series with an impedance ZTh , where Voc is the open Zero frequency will correspond to negative infinity on the
circuit voltage across the terminals and where ZTh is the logarithmic scale and will not show on the plots. The x-axis
equivalent impedance of the circuit across the specified ter- is graduated in log10 v and so every decade of frequency
minals. (e.g., . . . 0.001, 0.01, 0.1, 1, 10, 100, . . . ) is equally spaced on
Norton theorem for ac circuits: A phasor circuit across a the x-axis.
pair of terminals is equivalent to an ideal phasor current source The gain magnitude, represented by decibels defined as
Isc in parallel with an admittance YN , where Isc is the short 20 log10 [A(v)], is plotted on the y-axis of magnitude plot.
circuit current across the terminals and where YN is the Since A(v) dB can be both positive and negative, the y-axis has
equivalent admittance of the circuit across the terminals. both positive and negative values. Zero dB corresponds to a
Thevenin and Norton equivalent circuits of a linear phasor magnitude function of unity. The y-axis for the phase function
circuit are shown in Figure 1.29. uses a linear scale in radians or degrees. Semilog graph paper
makes it convenient to sketch Bode plots.
Bode plots are easily sketched by making asymptotic ap-
1.9.11 Frequency Response Characteristics proximations first. The frequency response function H(jv) is a
The voltage gain Gv at a frequency v of a two-port network is rational function, and the numerator and denominator are
defined as the ratio of the output voltage phasor to the input factorized into first-order terms and second-order terms with
voltage phasor. In a similar manner, the current gain Gi is complex roots. The factors are then written in the standard
defined as the ratio of output current phasor to input current form as follows:
phasor. Because the phasors are complex quantities that  
depend on frequency, the gains, voltages, and currents are v
First-order terms: (jv þ v0 ) ! v0 1 þ j :
written as G(jv), V (jv), and I(jv). Frequency response is v0

A
ZTh A

A + YN
Isc
Linear phasor Voc
circuit
B B
B

Thevenin equivalent circuit Norton equivalent circuit

FIGURE 1.29 Thevenin and Norton Equivalent Circuits

26 P.K. Rajan and Arun Sekar

I1( jω) I2( jω)

+ C V2(jω) / V1(jω) = Voltage ratio
i
r + V2(jω) / I1(jω) = Transfer impedance
V1( jω) e
V2( jω) I2(jω) / V1(jω) = Tranfer admittance
u
i
t I2(jω) / I1(jω) = Current ratio
−
Input Output V1(jω) / I1(jω) = Input impedance

Voltage and current phasors shown I1(jω) / V1(jω) = Input admittance

FIGURE 1.30 Frequency Response Functions

Notes: The frequency response ratios are called network functions.
When the input and output are at different terminals, frequency response function is also called a transfer function.

Second-order terms: [(v20  v2 ) þ j(2zv0 v)] 1.10 Alternating Current Steady State
"  2 !   #
2 v v Power
! v0 1  þ j 2z :
v0 v0
1.10.1 Power and Energy
Here z is the damping ratio with a value of less than 1. The Power is the rate at which energy E is transferred, such as in
magnitude and phase Bode diagrams are drawn by adding the this equation:
individual plots of the first- and second-order terms. Asymp-
totic plots are first easily sketched by using approximations. For dE
p(t) ¼
making asymptotic Bode plots, the ratio v=v0 is assumed to be dt
much smaller than one or much larger than one, so the Bode
plots become straight line segments called asymptotic approxi- Energy is measured in Joules [J]. A unit of power is measured
mations. The normalizing frequency v0 is called the corner in watts [W]: 1W ¼ 1J=s. When energy is transferred at a
frequency. The asymptotic approximations are corrected at constant rate, power is constant. In general, energy transferred
the corner frequencies by calculating the exact value of magni- over time t is the integral of power.
tude and phase functions at the corner frequencies.
The first- and second-order terms can occur in the numerator ðT
or denominator of the rational function H(jv). Normalized E ¼ p(t)dt
plots for these terms are shown in figures 1.31 and 1.32. 0
Bode diagrams for any function can be made using the
normalized plots as building blocks. Figure 1.31 shows the
Bode diagrams for a first-order term based on the following 1.10.2 Power in Electrical Circuits
equations: Power in a two-terminal circuit at any instant is obtained by
   1 multiplying the voltage across the terminals by the current
v v through the terminals:
(i) H(jv) ¼ 1þj : (ii) H(jv) ¼ 1þj :
v0 v0
p(t) ¼ v(t)i(t): (1:72)
The magnitude and phase plots of a denominator second-
order term with complex roots are given in Figure 1.32. If If the voltage is in volts [V] and the current in amperes [A],
the term is in the numerator, the figures are flipped power is in watts. In direct current (dc) circuits under steady
about the x-axis, and the sign of the y-axis calibration is state, the voltage V and current I are constant and power is also
reversed. constant, given by P ¼ VI. In ac circuits under steady state, V
1 Linear Circuit Analysis 27

20

40 Actual
10 Asymptotic
30
Actual 0
Asymptotic
A(ω) dB

20

A(ω) dB
−10
10
−20
0
−30
−10
−40
−20
0.01 0.1 1 10 100 0.01 0.1 1 10 100
Normalized Frequency (ω/ω0) Normalized Frequency (ω/ω0)

(i) First-Order Numerator Term (ii) First-Order Denominator Term

(A) Magnitude Bode Plots

+π/2 0

Actual Actual
Phase function φ(ω)

Asymptotic
Phase function φ(ω)

Asymptotic
radions

radions

+π/4

−π/2
0.01 0.1 10 100 0.01 0.1 1 1 100
Frequency (radians/sec) Normalized Frequency

(i) First-Order Numerator Term (ii) First-Order Denominator Term

(B) Phase Bode Plots

FIGURE 1.31 Bode Diagrams of First-Order Terms

2T 3 2T 3
and I are sinusoidal functions of the same frequency. Power ð ð
1
in ac circuits is a function of time. For v(t) ¼ Vm cos (vt þ a) P ¼ f 4 p(t)dt 5 ¼ 4 p(t)dt 5
[V] and i(t) ¼ Im cos (vt þ b)[A]; T
0 0
ðT
p(t) ¼ [Vm cos (vt þ a)][Im cos (vt þ b)] 1
(1:73) ¼ 0:5Vm Im { cos (a  b) þ cos (2vt þ a þ b)}dt:
¼ 0:5Vm Im { cos (a  b) þ cos (2vt þ a þ b)} T
0

Average power P is defined as the energy transferred per second Evaluating the integral yields average power:
and can be calculated by integrating p(t) for 1s. Since the
voltage and current are periodic signals of the same frequency, P ¼ 0:5Vm Im cos (a  b)[W]: (1:74)
the average power is the energy per cycle multiplied by
the frequency f. Energy per cycle is calculated by integrating The p(t) is referred to as the instantaneous power, and P is the
p(t) over one cycle, that is, one period of the voltage or current average power or ac power. When a sinusoidal voltage of peak
wave. value of Vm [V] is applied to a 1V resistor, the average power
28 P.K. Rajan and Arun Sekar

20
ζ = 0.05
0.10
10 0.15
0.20
0.25
0

A(ω) [dB]
0.3
−10 0.4
0.5
0.6
0.8
−20 1.0

−30

−40
0.1 0.2 0.3 0.4 0.6 0.8 1.0 2 3 4 5 6 8 10
Normalized Frequency (ω/ω0)
(A) Magnitude Plot

0
ζ = 0.05
−20 0.10
Phase Function [degrees]

−40 0.3 0.15

0.4 0.20
−60 0.5 0.25
0.6
0.8
−80 1.0
−100
−120
−140
−160
−180
0.1 1 10
Normalized Frequency (ω/ω0)
(B) Phase Plot

FIGURE 1.32 Bode Diagrams of H(jv) ¼ [(v20  v2 ) þ j(2zv0 v)]1

dissipated in the resistor is 0:5 Vm2 [W]. Similarly, when source, the current leaving the positive terminal of the voltage
a sinusoidal current of Im [A] passes through a one is used for evaluating the supplied power.
ohm resistor, the average power dissipated in the resistor is
0:5 Im2 [W].
Root mean square (RMS) or effective value of an ac volt- 1.10.3 Power Calculations in AC Circuits
age or current is defined as the equivalent dc voltage or
current that will dissipate the same amount of power in a The average power of a resistance R in an ac circuit is obtained
1  V resistor. as 0:5 V2m =R [W] or 0:5 R I2m [W], with Vm the peak voltage
across the resistance and Im the peak current in the resistance.
pffiffiffiffiffiffi The average power in an inductor or a capacitor in an ac
VRMS ¼ 0:5Vm ¼ 0:707Vm :
pffiffiffiffiffiffi (1:75) circuit is zero.
IRMS ¼ 0:5Vm ¼ 0:707Im : Phasor voltages and currents are used in ac calculations.
Average power in ac circuits can be expressed in terms of
For determining whether the power is dissipated (consumed) phasor voltage and current. Using the effective values of V
or supplied (delivered), source or load power conventions are and I for the phasors, the following definitions are given:
used. In a load, the current flowing into the positive terminal Using the notation V ¼ V ff a [V], I ¼ Iff b [A] and conju-
of the voltage is taken in calculating the dissipated power. For a gate I, denoted by I  ¼ Iff  b [A], you get:
1 Linear Circuit Analysis 29

TABLE 1.10 AC Power in Circuit Elements

Voltage–current Complex
Element relationship power: S ¼ VI  Average power: P Reactive power: Q Power factor

Resistance R [ohm] V=RI V I=00 I 2R 0 Unity

Inductive reactance XL ¼ vL [ohm] V ¼ j XL I V I=900 0 I 2 XL Zero-lagging
Capacitive susceptance BC ¼ vC [siemens] I ¼ j BC V V I=  900 0 V 2 BC Zero-leading
Impedance Z ¼ (R þ jX) ¼ Z=u [ohm] V ¼ZI V I=u ¼ I 2 Z I 2R I 2X cos u
u > 0 Lagging
u < 0 Leading
Admittance Y ¼ (G þ jB) ¼ Y =f [siemens] I ¼YV V I/f ¼ V 2 Y V 2G V 2B cos f
f > 0 Leading
f < 0 Lagging

Notes: Bold letters refer to phasors or complex numbers. Units: Voltage in volts, current in amperes, average power in watts, reactive power in volt ampere reactive, and complex
power in voltampere

Average power P ¼ V I cos (a  b) (a  b) ¼ p=2 PF is zero-lagging:

 (1:76a)
¼ Real{V I }[W] (a  b) ¼ p=2 PF is zero-leading:
Reactive power Q ¼ V I sin (a  b)
(1:76b) As reactive power Q ¼ V I sin (a  b),
¼ Imaginary{V I*}[VAR]
its sign depends on the nature of PF:
Apparent power S ¼ V I[VA] (1:76c) Q is positive for lagging PF.
Q is negative for leading PF.
Complex power S ¼ (P þ j Q) ¼ {V I*}[VA] (1:76d)
Q is zero for UPF.
The PF of an inductive load is lagging and that of a capaci-
In the set of equations [W] stands for watts, [VAR] for volt- tive load is leading. A pure inductor has zero-lagging power
ampere reactive, and [VA] for voltampere. Average power factor and absorbs positive reactive power. A pure capacitor
is also called active power, real power or simply power. has zero-leading power factor and absorbs negative reactive
Reactive power is also referred to as imaginary power. Reac- power or delivers positive reactive power. Table 1.10 summar-
tive power is a useful concept in power systems because the izes the expressions for various power quantities in ac circuit
system voltage is affected by the reactive power flow. The elements. Loads are usually specified in terms of P and PF at a
average power in an inductor or capacitor is zero. By defin- rated voltage. Examples are motors and household appliances.
ition, the reactive power taken by an inductor is positive, and Alternatively, the apparent P and PF can be specified.
the reactive power taken by a capacitor is negative. Complex PF plays an important role in power systems. The product of
power representation is useful in calculating the power sup- V and I is called the apparent power. The investment cost
plied by the source to a number of loads connected in the of a utility depends on the voltage level and the current carried
system. by the conductors. Higher current needs larger, more expen-
Power factor is defined as the ratio of the average power in sive conductors. Higher voltage means more insulation costs.
an ac circuit to the apparent power, which is the product of the The revenue of a utility is generally based on the amount of
voltage and current magnitudes. energy in Kilowatt per hour sold. At low power factors, the
revenue is low since power P and energy sold is less. For
average power P getting full benefit of investment, the utility would like to sell
power factor ¼ ¼ (1:77)
apparent power S the highest possible energy, that is, operate at unity power
factor all the time. Utilities can have a tariff structure that
Power factor (PF) has a value between zero and unity. The penalizes the customer for low power factor. Most electromag-
nature of the power factor depends on the relationship be- netic equipment such as motors have low lagging PF and
tween the current and voltage phase angles as: absorb large reactive powers. By connecting capacitors across
the terminals of the motor, part or all of the reactive power
(a  b) > 0 PF is lagging: absorbed by the motor can be supplied by the capacitors. The
reactive power from the supply will be reduced, and the supply
(a  b) ¼ 0 PF is unity (UPF):
PF improved. Cost of the capacitors is balanced against the
(a  b) < 0 PF is leading: savings accrued due to PF improvement.
This page intentionally left blank
 2
Circuit Analysis:
A Graph-Theoretic Foundation

Krishnaiyan Thulasiraman 2.1 Introduction ........................................................................................ 31

School of Computer Science, 2.2 Basic Concepts and Results..................................................................... 31
University of Oklahoma, 2.2.1 Graphs . 2.2.2 Basic Theorems . 2.2.3 Cuts, Circuits, and Orthogonality .
Norman, Oklahoma, USA 2.2.4 Incidence, Circuit, and Cut Matrices of a Graph
2.3 Graphs and Electrical Networks............................................................... 36
M.N.S. Swamy 2.3.1 Loop and Cutset Transformations
Department of Electrical and
Computer Engineering, 2.4 Loop and Cutset Systems of Equations ..................................................... 38
Concordia University, 2.4.1 Loop Method of Network Analysis . 2.4.2 Cutset Method of Network Analysis:
Montreal, Quebec, Canada 2.5 Summary ............................................................................................ 41

2.1 Introduction Graphs permit easy pictorial representations. In a pictorial

representation, each vertex is represented by a dot, and each
The theory of graphs has played a fundamental role in dis- edge is represented by a line joining the dots associated with
covering structural properties of electrical circuits. This should the edge. In directed graphs, an orientation or direction is
not be surprising because graphs, as the reader shall soon see, assigned to each edge. If the edge is associated with the ordered
are good pictorial representations of circuits and capture all pair (vi , vj ), then this edge is oriented from vi to vj . If an edge e
their structural characteristics. This chapter develops most connects vertices vi and vj , then it is denoted by e ¼ (vi , vj ). In
results that form the foundation of graph theoretic study of a directed graph, (vi , vj ) refers to an edge directed from
electrical circuits. A comprehensive treatment of these devel- vi to vj . An undirected graph and a directed graph are shown
opments may be found in Swamy and Thulasiraman (1981). in Figure 2.1. Unless explicitly stated, the term graph may refer
All theorems in this chapter are stated without proofs. to a directed graph or an undirected graph.
The development of graph theory in this chapter is self- The vertices vi and vj associated with an edge are called the
contained except for the definitions of standard and elemen- end vertices of the edge. All edges having the same pair of end
tary results from set theory and matrix theory. vertices are called parallel edges.
In a directed graph, parallel edges refer to edges connecting
the same pair of vertices vi and vj the same way from vi to vj or
2.2 Basic Concepts and Results from vj to vi . For instance, in the graph of Figure 2.1(A), the
edges connecting v1 and v2 are parallel edges. In the directed
2.2.1 Graphs graph of Figure 2.1(B), the edges connecting v3 and v4 are
A graph G ¼ (V , E) consists of two sets: a finite set parallel edges. However, the edges connecting v1 and v2 are not
V ¼ (v1 , v2 , . . . vn ) of elements called vertices and a finite parallel edges because they are not oriented in the same way.
set E ¼ (e1 , e2 , . . . en ) of elements called edges. If the edges If the end vertices of an edge are not distinct, then the edge
of G are identified with ordered pairs of vertices, then G is is called a self-loop. The graph of Figure 2.1(A) has one self
called a directed or an oriented graph; otherwise, it is called loop, and the graph of Figure 2.1(B) has two self-loops. An
an undirected or an unoriented graph. edge is said to be incident on its end vertices. In a directed

Copyright ß 2004 by Academic Press. 31

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