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ECE204-Digital System Design-Lecture 5 - DSD ch9 Msi Logic Circuits

The document covers MSI logic circuits, focusing on decoders, encoders, multiplexers, and demultiplexers. It explains the functions and configurations of these circuits, including examples and questions for understanding. The content is part of a lecture by instructors from the Vietnamese-German University, aimed at electrical and computer engineering students.

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19 views19 pages

ECE204-Digital System Design-Lecture 5 - DSD ch9 Msi Logic Circuits

The document covers MSI logic circuits, focusing on decoders, encoders, multiplexers, and demultiplexers. It explains the functions and configurations of these circuits, including examples and questions for understanding. The content is part of a lecture by instructors from the Vietnamese-German University, aimed at electrical and computer engineering students.

Uploaded by

10223088
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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Digital System Design

Lecture 5 -MSI Logic Circuits

Instructors:
Dr. Nguyen Tuan Khanh, postdoc, [email protected]
M.Sc. Nguyen Vo That Thuyet, lab engineer, [email protected]
Electrical and Computer Engineering (ECE)
Faculty of Engineering, Vietnamese-German University, Vietnam

1
Sep. 2024
9-1 DECODERS
• A decoder logic circuit that accepts a set of inputs that represents a binary number and
activates only the output that corresponds to that input number.

• Not all of the possible input codes


used, e.g., BCD-to-decimal

• E.g.,
• Which output for A0A1A2 = 110?
• Which input for O5?

2
9-1 DECODERS
• 3-line to-8-line decoder
• Binary-to-octal decoder or
converter;
• 1-of-8 decoder.

• What is the number of inputs and


outputs of a decoder that accepts 64
different input combinations?

3
9-1 DECODERS
• ENABLE Inputs

is a part of the
74ALS138 IC

4
9-1 DECODERS
• Example
• Inputs of 74ALS138 (A0 to A2, E1 to E3) are given.
• Determine the output (O0 to O7):

5
9-1 DECODERS
• Can we combine four 1-of-8 decoders to make a 1-of-32
decoder?

• How many 74ALS138 ICs can be combined to achieve the


largest number of outputs?

6
9-1 DECODERS
• Combining decoders: when is each decoder enabled?

7
9-1 DECODERS
• Determine the levels at each decoder output for the following sets of input conditions.
(a)*All inputs LOW
(b)*All inputs LOW except E3 = HIGH
(c) All inputs HIGH except not(E1) = not(E2) = LOW
(d) All inputs HIGH

8
9-4 ENCODERS
• An encoder has the opposite
function of a decoder

9
9-4 ENCODERS

• Questions:
• If not(A4) is 0 while others are 1, what is at O2O1O0?
• How many bits are at output when there are 32 inputs?
• What if 2 inputs are active (LOW) at the same time? 10
9-4 ENCODERS
• Priority Encoders
• The output code will correspond to the highest-numbered input

11
9-4 ENCODERS
• Switch Encoder
• Decimal-to-BCD switch encoder

12
9-6 MULTIPLEXERS (DATA SELECTORS)

• A digital multiplexer (MUX)/data selector accepts


several inputs and selects one to the output.

• SELECT input code determines which input is


transmitted to output Z.

(ADDRESS
13
inputs)
9-6 MULTIPLEXERS (DATA SELECTORS)
• Basic Two-Input Multiplexer

14
9-6 MULTIPLEXERS (DATA SELECTORS)
• Four-Input Multiplexer

Using sum of products logic 15


9-6 MULTIPLEXERS (DATA SELECTORS)
• Two-, four-, eight-, and 16-input multiplexers are readily available in the TTL and CMOS logic
families.

• These basic ICs can be combined for multiplexing a larger number of inputs.

16
9-6 MULTIPLEXERS (DATA SELECTORS)
• Eight-Input Multiplexer

17
9-8 DEMULTIPLEXERS (DATA DISTRIBUTORS)
• A multiplexer takes several inputs and transmits
one of them to the output

• A demultiplexer (DEMUX) performs the reverse


operation: it takes a single input and distributes
it over several outputs

18
9-8 DEMULTIPLEXERS (DATA DISTRIBUTORS)
• The 74ALS138 decoder can function as a
demultiplexer w/ enable input (not(E1)) used as the
data input.

• Typical waveforms for a select code of show that is


identical to the data input I on E1.

19

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