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1-Dimensional fiber-based field-effect transistors

made by low-temperature photochemically
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Cite this: RSC Adv., 2016, 6, 18596

activated sol–gel metal-oxide materials for
electronic textiles†
Chang Jun Park,*a Jae Sang Heo,*a Kyung-Tae Kim,a Gyengmin Yi,a Jingu Kang,a
Jong S. Park,b Yong-Hoon Kimc and Sung Kyu Parka

We report the high performance metal-oxide fiber field-effect transistors (F-FETs) for electronic textiles
(e-textiles). By using low-temperature and a solution process, dense, pinhole-free, and relatively uniform
metal-oxide layers were successfully deposited on a 1-dimensional fiber substrate. Particularly, the
atomic layer deposited aluminum oxide gate dielectric layer, deposited at 100
C, exhibited an extremely
low leakage current density of 107 A cm2 and a high breakdown field of 4.1 MV cm1. Furthermore,
the indium oxide F-FETs, which are photochemically activated at a low temperature, showed a field-
Received 16th October 2015
Accepted 6th February 2016
effect mobility and on/off ratio of 3.7 cm2 V1 s1 and >106, respectively, which we believe are the
highest performance among fiber-type FETs reported to date. Based on these results, it is believed that
DOI: 10.1039/c5ra21613c
the metal-oxide F-FETs may provide a basic building block to accomplish 2-D woven e-textiles in the
www.rsc.org/advances future, provided further combining with the weaving and interconnection technologies.

Recently, numerous research groups have reported their

1. Introduction pronounced results on e-textiles, such as ber-embedded
Recently, “wearable devices” or “wearable smart devices” have electrolyte-gated eld-effect transistors (FETs),6 ber organic
gained signicant interest both in the industry and research light emitting diodes,7 and ber integrated circuits.8 In most of
elds, due to their signicance in the emerging electronics era.1 the researches, however, organic materials have been for the
Compared with conventional electronics such as smartphones device fabrication possibly due to their low-temperature proc-
or tablets, wearable devices are generally used in the proximity essability. Although lots of ber-based organic electronics have
of human bodies (as accessories or as clothes), and continu- shown their possibilities for the e-textile devices, their perfor-
ously interact and share data with other devices. Intuitively, it is mance is still unsatisfactory for the applications of consumer
considered that wearable devices would require embedment of level e-textile systems. Therefore, for the realization of high-
various electronic components in textiles, known as electronic performance and reliable e-textiles, functional bers made by
textiles (e-textiles) or smart textiles.2–4 Particularly, current inorganic materials and their corresponding fabrication tech-
e-textiles are realized by attaching electronic components onto nologies should be developed. Among several candidates of the
wearable clothes such as light emitting diode embedded materials, metal-oxides are considered to be more competitive
t-shirts.5 Although these initial approaches for e-textiles may be than other material systems since their electrical and mechan-
prevailing on current markets, the realization of wearable ical properties are easily tuned and a variety of conformal
devices using integrated electronic and functional bers is deposition methods are available from vapour deposition to
considered as a key step towards to true e-textiles. solution-processing.
In this work, we demonstrate a simple and facile route to
implement high-performance metal-oxide ber FETs (F-FETs)
by using the processes compatible with current microelec-
a
School of Electrical and Electronics Engineering, Chung-Ang University, Seoul 06974, tronic fabrication. Particularly, a low-temperature atomic layer
Korea. E-mail: [email protected]
b
deposition (ALD) and a solution-processing combined with low-
Department of Organic Material Science and Engineering, Pusan National University,
Pusan 46241, Korea
temperature photochemical activation were used to form dense
c
School of Advanced Materials Science and Engineering, SKKU Advanced Institute of and reliable metal-oxide dielectric and semiconducting layers
Nanotechnology (SAINT), Sungkyunkwan University, Suwon 16419, Korea. E-mail: on a cylindrical shape ber substrate, respectively. Using these
[email protected] processes, high mobility indium oxide (InOx) and indium
† Electronic supplementary information (ESI) available. See DOI: gallium zinc oxide (IGZO) F-FETs were successfully fabricated,
10.1039/c5ra21613c

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showing electrical performances comparable to those fabri- deposited using a thermal evaporation system and patterned by
cated on planar substrates. a shadow mask. The channel width and length of F-FETs were
196 mm and 75 mm, respectively.
The dielectric properties of ALD deposited AlOx lms were
2. Experimental analyzed by using an LCR meter (Agilent 4284A, Agilent Tech-
nologies) and a semiconductor parameter analyzer (Agilent
An IGZO precursor solution was prepared by dissolving indium
4156C, Agilent Technologies). For the characterization, a stan-
nitrate hydrate (In(NO3)3$xH2O), gallium nitrate (Ga(NO3)3$xH2O)
dard metal/insulator/metal structure (Cr coated optical ber/
and zinc acetate dehydrate (Zn(CH3COO)2$2H2O) in 2-methoxy-
AlOx/Al) was used. The fabricated F-FETs were also analyzed by
ethanol (2-ME) with molar concentrations of 0.085 M, 0.0125 M,
using a semiconductor parameter analyzer (Agilent 4156C,
and 0.0275 M, respectively. Similarly, an InOx precursor solution
Agilent Technologies) in air ambient at room temperature. Also,
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was prepared by dissolving indium nitrate hydrate in 2-ME with

the structures of F-FET devices were analyzed by high-resolution
molar concentration of 0.05 M. Both of the IGZO and InOx
transmission electron microscope (HR-TEM; JEM-3010 micro-
precursor solutions were stirred for 12 h at 75
C before spin-
scope, JEOL).
coating.
Aer a thorough cleaning of a glass optical ber (diameter of
200 mm, without cladding layers) using acetone, isopropanol 3. Result and discussions
alcohol and de-ionized water, an O2 plasma treatment was fol-
In metal-oxide F-FETs, controlling the surface roughness of the
lowed to make a hydrophilic surface (100 W, 60 s). For gate
one-dimensional (1-D) ber is important to avoid device failures
electrode, Cr (100 nm) was deposited on the glass optical ber
from gate dielectric breakdown and to achieve a uniform layer
by using a radio-frequency magnetron sputtering system. Then,
coating over the 1-D ber structure. In our experiments, to
an AlOx gate dielectric layer was deposited by using an ALD
demonstrate electrically reliable F-FETs and to investigate the
system at the temperature of 100
C. The thickness of the AlOx
geometrical effect on the devices, a bare glass optical ber
gate dielectric layer was 60–80 nm. On the AlOx gate dielectric,
without any cladding layers was used as a substrate, which
InOx or IGZO precursor solution was coated by using dip-
exhibits a root-mean-square surface roughness of 1 nm.
coating method. The bers were immersed in the precursor
Fig. 1(b) and (c) illustrate schematics of a cylindrical, top-
solution for 30 second and pulled up at a speed of 0.5 meter per
contact-structured metal-oxide F-FET and a ber-type basic
min. For uniform solution coating, the dip-coating process ware
building block for an e-textile integrated circuit, respectively.
repeated for 2 times and pre-baked at 100
C with a hot air
For the formation of a uniform and reliable gate dielectric layer,
heating system as shown in Fig. 1. To promote sol–gel reaction
an ALD-deposited AlOx layer with a thickness of around 60–
and conversion into a dense metal-oxide lm at a low temper-
80 nm was deposited as shown in Fig. 2(a). A sol–gel processed
ature, the sample was then photochemically activated using
AlOx layer was also tested, however, the rather non-uniform and
a high-density ultraviolet (UV) treatment system equipped with
rough surface of the coated layer oen induced device failures
a low-pressure Hg lamp (emission wavelengths of 253.7 nm
and poor device uniformity in a single layer coating. To avoid
(90%) and 184.9 nm (10%); area of 20  20 cm2; UV253H, Fil-
the failures, we also tried to coat the dielectric layers with multi-
gen) under N2-purging condition. The output energy intensity of
layer structures and obtained more reliable dielectric layer via
the lamp was 25–28 mW cm2 and the distance between the
ber sample and the DUV lamp was 1–1.5 cm. For source/drain
electrodes, aluminium (Al) with a thickness of 50 nm was

Fig. 2 (a) Optical images of ALD-deposited and dip-coated AlOx films

on fiber substrates. (b) Optical images of InOx and IGZO coated fiber
Fig. 1 (a) A schematic of the dip-coating system for F-FET fabrication. substrates (by dip-coating on ALD-deposited AlOx/Cr-gated fibers). (c)
Structures of, (b) a cylindrical metal-oxide F-FET and (c) a fiber-type Frequency-dependent capacitance and (d) electric field-dependent
basic building block for an e-textile integrated circuit. leakage current density of the ALD-deposited AlOx film on a fiber.

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the solution-process. In Fig. 2(c) and (d), areal capacitance vs.

frequency (C–F) and leakage current density vs. electric eld
(J–E) characteristics of the ALD-deposited AlOx gate dielectric on
a Cr-gated ber substrate are showed. The areal capacitance of
the AlOx gate dielectric was 152 nF cm2 at 1 kHz, showing
a dielectric constant of 6.39. For the extraction of the dielectric
constant (3r), the following equation was used,
A
C ¼ 30 3r
d
where C is the capacitance, A is the overlapped area between top
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(Al) and bottom ber electrodes, d is the thickness of gate

dielectric layer, and 30 is the vacuum permittivity. We observed
a slight decrease in the capacitance value with increasing
frequency (140 nF cm2 at 1 MHz), which can be attributed to
physical and structural defects in the lm such as pin-holes and
hydroxyl groups or oxygen vacancies, respectively. Meanwhile,
the ALD-deposited AlOx gate dielectric layer on the ber Fig. 3 (a) A schematic of shadow masking process on fiber for S/D
substrate exhibited an excellent insulating property as shown in electrodes formation. (b) Optical images of interposed shadow mask
Fig. 2(d). Particularly, the AlOx gate dielectric showed a leakage on an IGZO-coated fiber, and scanning electron microscope and
current density of 1  107 A cm2 at 3 MV cm1 with a break- optical images of an IGZO F-FET. (c) and (d) Cross-sectional TEM
down eld of 4.1 MV cm1. The low leakage current density and images and atomic composition ratio of dip-coated IGZO film on
a fiber substrate (inset).
high breakdown eld indicate uniform and conformal coating
of an AlOx gate dielectric layer on the ber substrate, supporting
that the ALD deposition method can be a facile route for
substrate and re-evaporation of the Al electrodes on the oppo-
obtaining spatially uniform and reliable insulating layers on
site side. Cross-sectional TEM images of an IGZO F-FET with an
cylindrical type ber substrates.
AlOx gate dielectric layer are shown in Fig. 3(c) and (d). As
On the AlOx gate dielectric layer, a semiconducting layer was
shown here, the AlOx and IGZO layers are uniformly deposited
formed by immersing the ber substrate in an IGZO or InOx
over the ber without plausible to note that the simple dip-
precursor solution. While pulling up the bers, with a speed of
coating and low-temperature photo-activation process can be
0.5 meter per min, the bers were pre-baked at 100
C by
applied even to the 1-D cylindrical ber substrates as well as
passing through a heating zone composed of a thermal coil. To
conventional planar substrates.
achieve a full exibility in the dip-coating and baking process,
In previous reports, most of the ber-type FETs were fabri-
pre-cut optical ber segments (10 cm in length) were loaded on
cated by using organic semiconductors due to easy process-
a polymer-based carrier. During this process, the solvent
ability and low process temperature of organic
molecules in the as-coated lms are evaporated and the lms
semiconductors.10 In our case, by using the low-temperature
become high viscose gel-like state on the ber substrates,
photochemical activation process, high-performance metal-
maintaining the coating uniformity. Aerwards, the pre-baked
oxide semiconductors could be applied to the F-FETs at
bers were irradiated with DUV using a low pressure Hg lamp
a substantially low-temperature (<150
C), and having unprec-
for 2 h in N2 purging environment. N2 gas was continuously
edented electrical performance over organic-based F-FETs. Also,
owed through the chamber to create an inert gas atmosphere
recent reports on the mechanical stability of metal-oxide
and prevent the formation of ozone, allowing transmission of
devices11 support that the possibility of using metal-oxide
DUV to the substrate (especially the 184.9 nm wavelength)
materials in ultra-exible bers and e-textile systems. In
without a signicant attenuation. The atomic composition ratio
Fig. 4, the transfer and output characteristics of IGZO F-FETs
of the IGZO semiconducting layer coated on the ber substrate
with W/L ratios of 2.61 are showed. For the device character-
was almost comparable to that on a planar substrate (inset of
ization, we used the same evaluation techniques with those of
Fig. 3(d)) demonstrating that the dip-coating method is valid in
planar structured FETs. Threshold voltage (Vth) was obtained
depositing uniform and functional metal-oxide semiconductor
from a linear tting to square root of drain current (ID) vs. gate-
lms on an arbitrary-shaped ber substrate.9 To construct
source voltage (VGS) from the equation,
a cylindrical top-contact structure F-FET, Al source/drain elec-
trodes were deposited on the semiconducting layer with inter- WCi
ID ¼ m ðVGS  Vth Þ2
posing a thin crossing wire as a shadow mask during the 2L sat
evaporation, as illustrated in Fig. 3(a). The deposition of Al where, W and L are channel width and length, respectively,
source/drain electrodes was carried out without rotating the which are dened by top contact source/drain electrode geom-
ber substrate, therefore a non-uniform coverage of the Al etry, Ci is capacitance of gate dielectric, msat is the saturation
source/drain electrodes occurs (about half of the lateral surface eld-effect mobility. Since the wire-type shadow mask itself is
is covered) (Fig. 3(b)). This could be avoided by rotating the ber non-planar, the channel length is different from the actual

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Fig. 5 (a) Fabrication process of a 1-dimensionally integrated fiber

inverter circuit and (b) 2-dimensionally weaved textile electronics.
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electrical/mechanical stability may still limit their applications

in commercial level electronic devices. Moreover, in case of the
electrochemical and organic devices, environmental and elec-
trical stress also should be considered, since the electro-
chemical and organic materials are rather sensitive to
geometrical, temperature or even light variations.15 Due to the
coplanar top-contact structure and relatively stable metal-oxide
materials, the F-FETs demonstrated here would be most
Fig. 4 Electrical characteristics of IGZO F-FETs. Transfer character- amenable for use in circuits and multifunctional systems such
istics of (a) and (b) output characteristics of IGZO F-FETs. Distribution as 2-dimensionally weaved textile electronics as illustrated
of (c) mobility and (d) threshold voltages of 26 devices. in Fig. 5.
The driving voltage, parasitic capacitance, and the relatively
high gate leakage must be considered in evaluating the suit-
diameter of the ber. We measured the channel lengths of the ability of ber-based FETs and multifunctional e-textile
devices by using an optical microscope. The IGZO and InOx systems. Moreover, the efficient and practical interconnec-
F-FETs [Fig. S1†] showed an eld-effect mobility of >3.9 and tions between the functional 1-D ber devices are still one of the
>3.5 cm2 V1 s1 (average of 1.52 and 1.15 cm2 V1 s1), key challenges for 2-D weaving technology. We believe that the
respectively. Also, the on/off current ratio of more than 106, metal-oxide based high-performance F-FETs demonstrated here
subthreshold slope as steep as 0.3 volt per decade, and Vth of 1– may be established as a basic building block to accomplish the
5 V were obtained. Comparing with planar-type devices 2-D woven e-textiles, provided a proper interconnection tech-
[Fig. S2†] (fabricated by using a spin-cast metal-oxide lms on nology in the future.
an ALD-deposited AlOx gate dielectric, and dened Al source/
drain electrodes), the F-FET devices typically showed less
device-to-device uniformity and large gate leakage current. It is
4. Conclusions
worth to note that establishing a reliable and high-quality In this study, we demonstrate high-performance metal-oxide
semiconducting and dielectric layers, and clearly dened elec- F-FETs via low-temperature solution process for the rst time.
trical contact with source/drain electrodes were particularly By using ALD-deposited AlOx gate dielectric and solution-
important in F-FETs due to the large cross-over area between processed metal-oxide semiconductors, we successfully fabri-
gate to source/drain electrodes and non-planar surface of cated cylindrical shape F-FETs with high eld-effect mobility.
cylindrical ber substrates.12 Even considering the low dimen- The metal-oxide F-FETs exhibited electrical characteristics
sion of the F-FETs (low W/L ratios) and non-planar device comparable to those of planar analogues, but at the same time
structure, the saturation mobility of as high as 3.7 cm2 V1 s1 offers novel and promising device geometry for 2-D weaving
and on/off current ratio of 106 demonstrate one of the highest technology. We believe that our approaches might be poten-
performances reported to date in cylindrical type F-FETs. tially of interest for the next generation e-textile, or smart textile
The experimental results described above identify the phys- systems.
ical properties which are possibly due to the unique 1-D
geometry of the ber substrates. We note, however, that the 1-D
ber geometry also presents unique challenges for integration,
Acknowledgements
including, for example, interconnection between functional This work was partially supported by the National Research
ber devices for integrated circuits and various functional Foundation of Korea (NRF) grant funded by the Korea govern-
electronic systems. Recently, although several novel schemes ment (MSIP) (No. NRF-2013R1A2A2A01006404). By the Human
such as wire electrochemical transistors (WECTs),13 electrolyte- Resources Development (No. 20154030200860) of the Korea
gated ber transistors,6 and wedge planar embedded e-textiles14 Institute of Energy Technology Evaluation and Planning
have been suggested, the low electrical performance and (KETEP) grant funded by the Korea government Ministry of

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