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HPC - Assignment 2

The document outlines an assignment for a High Performance Computing (HPC) course, detailing various topics related to parallel programming. It includes questions on critical path length, limitations of parallel performance, task interaction groups, process mapping, decomposition techniques, load balancing, and memory hierarchy. Additionally, it requires the creation of a task-dependency graph for finding the minimum number in a sequence and comparing it to a serial version.

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trushitghetiya
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17 views

HPC - Assignment 2

The document outlines an assignment for a High Performance Computing (HPC) course, detailing various topics related to parallel programming. It includes questions on critical path length, limitations of parallel performance, task interaction groups, process mapping, decomposition techniques, load balancing, and memory hierarchy. Additionally, it requires the creation of a task-dependency graph for finding the minimum number in a sequence and comparing it to a serial version.

Uploaded by

trushitghetiya
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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TE COMPUTER ENGINEERING (2019 PATTERN) HIGH PERFORMANCE COMPUTING(HPC)

KJ's Educational Institute


Trinity Academy of Engineering, Pune
DEPARTMENT OF COMPUTER ENGINEERING
Subject : HPC Assignment 2 Unit - II

1. Explain preliminaries of parallel programming. What is critical path length?


2. What are the limitations of parallel performance?
3. Explain the concept of task interaction group with the help of example.
4. How will you define processes and their mapping?
5. What are different decomposition techniques? Explain in details.
6. Explain owner computes rule.
7. Explain in details characteristics of task & task interaction.
8. What are mapping techniques for load balancing?
9. Explain in details static mapping and dynamic mapping.
10. Write down methods for containing overheads in details.
11. Enlist in details different parallel algorithm models.
12. Describe processor architecture in details or explain Flynn’s taxonomy.
13. Explain memory hierarchy. Also how will you apply this memory hierarchy to transaction specific memory
design?
14. How will you define interconnection communication between these processes?
15. What are mapping techniques for load balancing? Explain at least two mapping techniques.
16. Draw the task-dependency graph for finding the minimum number in the sequence {4, 9, 1, 7, 8, 11, 2,
12} where each node in the tree represents the task of finding the minimum of a pair of numbers.
Compare this with serial version of finding minimum number from an array.

Prepared BY : Prof. Abhijeet D. Cholke

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