System Programming:BTECCE22504

Prof. M adhavi Dac hawar

Comp Engg. Dept
V i s h w a k a r m a U n i ver si ty
 Unit 1:
Introduction to
System
Programming
Assembler
 Assembler

Assembler is a translator which takes assembly language

code as input and produces machine code as output.

RESHMA PISE 21
 Assembly Language Programming (ALP)
Assembly language is an example of middle-level language.
We use predefined words called mnemonics.
Binary code instructions in machine language are replaced with
mnemonics and operands.
As the computer cannot understand mnemonics, we use a translator
called Assembler to translate mnemonics into machine language.
Three features of Assembly Language:
➢ Mnemonic Operation Codes
➢ Symbolic operands
➢ Data declarations
 Assembly Language Advantages
Mnemonic operation codes:
• Writing instructions in a middle-level language is easier than writing instructions in a
machine language.
• Assembly language is more readable compared to low-level language.
• Easy to find errors in program and modify.
• Not necessary to memorize numeric operation codes.
Symbolic operands:
Symbolic names can be associated with data or instructions.
Symbolic names can be used as operands in assembly instructions as data operands or
address operands (need not know memory address).
Data declarations: Data can be declared in a variety of notations, including the
decimal notation.
Avoids conversion of constants into their machine representation.
 ALP Statement Format
<Label> : Mnemomic <operand spec>[,<operand spec>…]

Ex : Next : MOV AREG, Number

Label :
Symbolic labeling of an assembler address.
If a label is specified in a statement, it is associated as a symbol name with the memory address
generated for the instruction.
Mnemomic : Symbolic description of an operation (e.g: mov, add )
Operands : Reg, Variable, Adress or Constant
<operand spec> has the following syntax:
<symbolic name> [+<displacement>] [(<index register>)]
e.g. AREA, AREA+5
In assembler language, "AREA" is often used to define a section of code or data. The
"+5" part likely means an offset of 5 from a base address.
AREA+5(4)

AREA: This defines a specific section of code or data in memory.

•+5: This indicates an offset of 5 units (such as bytes, words, etc.) from the base
address of the defined area.
•(4): This further specifies an additional offset within the already offset address,
suggesting an additional 4 units from the Area+5 Location.

•AREA(4)

AREA: This directive is used to declare a code or data section. It typically includes
attributes that specify the characteristics of the area, such as its name, type (code
or data), and whether it is readable, writable, or executable.

(4): This is an offset from the base address of the defined area. In this case, it
indicates an address that is 4 units past the start of the area.

Comments: You need the comments for the readability of the program and debugging.
 ALP:Mnemonic Operation Codes
Each statement has two operands, the first operand is a register and the
second operand refers to a memory word using a symbolic name and
optional displacement.

Add: adds the second operand

to the first operand,
modifying the first operand.
Also, sets the condition code.
Comp: Compares the first
operand with the second
operand and sets the
condition code based on the
result.
BC: Branches on condition.
The program counter is
Source: M. Dhamdhere, Systems Programming and Operating Systems , Tata McGraw-Hill,
updated based on the
condition code.
 ALP:Mnemonics

◼ MOVE instructions move a value between a memory word and a register

◼ MOVER – First operand is target and second operand is source
◼ MOVEM – first operand is source, second is target
◼ All arithmetic is performed in a register and sets condition code.
◼ A Comparision instruction sets condition code analogous to arithmetics, i.e.
without affecting values of operands.
◼ condition code can be tested by a Branch on Condition (BC) instruction and the
format is:
BC <condition code spec> , <memory address>
Condition code can be : LT, LE, EQ, GT, GE and ANY
•LT (Less Than)
•Indicates that the result of the comparison is less than.
•Set when the first operand is less than the second operand.
•LE (Less Than or Equal)
•Indicates that the result of the comparison is less than or equal to.
•Set when the first operand is less than or equal to the second operand.
•EQ (Equal)
•Indicates that the result of the comparison is equal.
•Set when the first operand is equal to the second operand.
•GT (Greater Than)
•Indicates that the result of the comparison is greater than.
•Set when the first operand is greater than the second operand.
•GE (Greater Than or Equal)
•Indicates that the result of the comparison is greater than or equal to.
•Set when the first operand is greater than or equal to the second operand.
•ANY
•Indicates any condition.
•This is often used to branch regardless of the specific condition code.
COMP R1, R2 ; Compare R1 and R2, setting the condition code
BC LT, LABEL ; Branch to LABEL if R1 < R2
BC LE, LABEL ; Branch to LABEL if R1 <= R2
BC EQ, LABEL ; Branch to LABEL if R1 == R2
BC GT, LABEL ; Branch to LABEL if R1 > R2
BC GE, LABEL ; Branch to LABEL if R1 >= R2
BC ANY, LABEL; Branch to LABEL unconditionally
 Example: ALP and its equivalent Machine Language
Program
◼ MOVER – First operand
is target and second
operand is source
◼ MOVEM – first operand
is source, second is
target
◼ DS- Define storage
◼ Dc 1 – allocate storage
with a variable one and
initialize with value 1

Source: M. Dhamdhere, Systems Programming and Operating Systems , Tata McGraw-Hill,

 Types of Assembly Language Statements

There are 3 types :

➢ Imperative Statements
➢ Declarative Statements
➢ Assembler Directives
Imperative Statements:
They specify an action to be performed during the execution of an
assembled program.
Each imperative statement is translated into one machine instruction.
Ex: MOV , ADD , MUL , BC
 Types of Assembly Language Statements
Declarative Statements: Two types and syntax is
[Label] DC '<value>’
[Label] DS <constant>
The DC (Declare constant) statement defines memory words containing constants.
Ex: NUM DC ’5’
Defines symbol NUM which is a memory word containing numeric value 5
• The DC statement does not really implement constants It just
initializes memory words to given values.

• The values are not protected by the assembler and can be changed by moving a new value into the
memory word.
• In the above example, the value of NUM can be changed by executing an instruction
MOVEM BREG, NUM
The DS (declare storage) statement reserves memory word and
associates names with them. Ex:

N DS 1 : Reserves a memory area of 1 word, associating the name N to it

ARRAY DS 100 : Reserves a block of 100 words and the name ARRAY is associated with
first word of the block. (ARRAY + <displacement> to access the other words)
An Assembly Program can have constants like HLL, in two ways

– as immediate operands, and as literals.

1.) Immediate operands can be used in an assembly statement only if the

architecture of the target machine supports.

Ex: SUB BREG, 6

This is translated into an instruction with two operands – BREG and the value 6 as
an immediate operand.
2) A Literal is an operand with the syntax = '<value>’.
➢It differs from a constant because its location cannot be defined in the assembly
program.
➢ It’s value does not change during the execution of the program.
➢ Literals are allocated memory addresses at end of program or it can be specified
by assembler directive LTORG assembler directive.

Ex: ADD AREG, =‘5’ ➔ ADD AREG, NUM

NUM DC ‘5’
Use of literals vs. Use of DC
 Types of Assembly Language Statements
Assembler Directives (AD):
An assembler directive is a statement to give direction to the assembler to perform task of the
assembly process.
It controls the organization of the program and provide necessary information to the assembler
to generate necessary machine codes.
They ADs are not translated into machine code. Do not occupy memory.
Few examples of assembler directives are:
1)START <constant> : Specifies that the first word of the target program generated should be
placed in the memory word having address <constant>.
2)END [<operand spec>]: This directive indicates the end of the of the source program. The
optional <operand spec> indicates the address of the instruction where the execution of the
program should begin.

Other examples : ORG, LTORG, EQU

Design of Assembler : Phases

Prof. M a d h a v i D a c h a w a r
Comp Engg. Dept
Vishwakarma University
 Language Processing
There are two phases in Designing of an assembler:
Language processing = Analysis of source program + Synthesis of target program
Analysis of source program is specification of the source program
Basically it involves :
▪ Checking if program is syntactically and semantically correct.

▪ Collect information required for synthesis. (e.g. Symbol Table)

Synthesis of target program is generation of target language statements.

In assembler, it involves generation of machine code
 Assembly Lang. to M/C Language
1. Find address of variables
Opcode Register
and labels. Memory
START 501 operand
LC
2. Replace Symbolic address by READ M 501 + 09 0 510
numeric address. MOVER AREG, N 502 + 04 1 509
ADD AREG, M 504 + 01 1 510
506 + 05 1 511
3. Replace Symbolic opcodes MOVEM AREG, SUM
by machine opcode. PRINT SUM 508 + 10 0 511

N DC 5 101
509
4. Reserve storage for data.
M DS 1 510 ---
SUM DS 1 511 ---
END
 Analysis Phase : Tasks Performed
The Main function of the Analysis phase is to build the Symbol table and Literal table.
➢ Determine the addresses with which the symbolic names used in a program are associated.
To perform the this, we need to fix the addresses of all program instructions. This function is
called Memory Allocation.

➢To implement memory allocation a data structure called Location counter (LC) is maintained.
it is initialized to the constant specified in the START statement or if nothing is mentioned in
START it is initialized to 0 by default.
To update the contents of LC, analysis phase needs to know lengths of different instructions.

Analysis phase : Scan each statement of ALP and

▪ Isolate the label, mnemonics opcode, and operand fields of a statement.
▪ If a label is present, enter the pair (symbol, <LC value>) in a new entry of symbol table.
▪ Check if the mnemonics opcode is valid (Refer Mnemonic table)
▪ Update the value of LC (LC processing )
 Synthesis Phase: Data Structures
Ex: MOVER BREG, NUM
The following information is needed to synthesize machine instruction for this stmt:
1. Machine operation code of instruction MOVER [This does not depend on the source program but
depends on the assembly language, hence synthesis phase can determine this information for
itself]
2. Address of the memory word with which symbol NUM is associated [depends on the source
program and it has to be computed by the Analysis phase].
3. If there is literal operand , the address of literal is required. (e.g. MOVER BREG, =‘5’)

The data structures required during the synthesis phase :

➢ Mnemonics Table
➢ Symbol Table
➢ Literal Table
 Synthesis Phase: Data Structures
1. Mnemonics Table
- The primary fields are mnemonic , opcode, and size. ( ADD , 01 , 2)
- It is a fixed table for specific assembler which is merely accessed by the analysis and
synthesis phases
2. Symbol Table
- Each entry has two primary fields : Symbol name and Address. (NUM , 510)
- Symbol table is constructed during analysis and used during synthesis
3. Literal Table
- Each entry has two fields : Literal and Address. e.g. ( 5 , 510)
- Generated by the analysis phase and used during synthesis.
 Synthesis Phase : Tasks Performed
➢ Obtain Machine opcode corresponding to the mnemonic from the
mnemonic table.

➢ Obtain address of the Symbol (can be memory operand or label) from

symbol table.

➢ Convert the data constants to internal machine representations.

➢ Build / Synthesize a machine instruction in the proper format.

 Example Mnemonic Opcode Size/length
MOVER 04 2
Assembly Language Program LC ADD 01 2
START 200 200 BC 07 2
NEXT: MOVER AREG, NUM 200 … … …
ADD BREG, AREG 202
BC ANY, NEXT 204
NUM DC 5 206
END 206 Symbol Address
NEXT 200
NUM 206
 Analysis and Synthesis phase of assembler
Mnemonic Opcode length
MOVER 01 2
ADD 02 2

Mnemonic Table

Analysis Synthesis Target

Source --------------------------------->
Phase Phase Program
Program

Symbol Table
Symbol Address
→ Data Access
N 210
-- > Control Access
Literal Table AGAIN 230
Literal Address
‘5’ 230
‘8’ 231
Design of Assembler : Pass structure

Prof. Madhavi Dachawar

Comp Engg. Dept
Vishwakarma University
 Assembler Design

➢ Pass of a language processor – One complete scan of the

source program.
➢ Assembler Design can be done in:
❑ Single pass
❑ Two pass
❑ Multi pass
 Single Pass Assembler
Single Pass Assembler:
➢ Does analysis and synthesis tasks in a single pass.
➢ In single pass assembler, the problem of forward
reference should be handled.
Forward reference :
When the variables are used before their definition. It is reference to a
symbol that is defined later in the program.
Ex: START 100
MOVER AREG, N // To translate this instruction, address of N is required.
..... and the assembler has not yet processed the symbol N

N DC 10
 Two Pass Assembler

➢ Does two scans of source program.

➢ Translation work is divided in two passes.
➢ Resolves the forward references easily.
➢ Analysis -> Pass 1, Synthesis –> Pass
 Two Pass Assembler
➢ The first pass separates the symbol / label , mnemonic opcode and operand fields.
LC processing is performed and the symbol defined are inserted into the symbol table.
➢ Literals are entered in Literal table. Intermediate code generated.
➢ The second pass synthesizes the machine code using intermediate code & the address
information found in the symbol and literal tables. It determines forward references.

Assembly
program

Intermediate Object
Pass 1 Pass 2
file codes

OPTAB SYMTAB SYMTAB

Literal Table
 Advanced Assembler Directives
➢ ORG/ ORIGIN
Syntax : ORG <address spec>
This directive indicates that LC should be set to the address given by <address spec>.
Ex : ORG 400

➢ EQU
Syntax : <symbol> EQU <address spec>
Where <address spec> is an < constant > or <operand spec>
Ex : MAX EQU 100 or A EQU B

➢ LTORG
A programmer can specify where literals should be placed.
By default, assembler places all the literals after the END statement.
 Literals
The assembler allocates memory to the literals of literal pool at every LTORG statement and
at the END statement, .
The pool contains all literals used in the program since the start of the program or since the
last LTORG statement

LC START 200
200 ADD AREG, = ‘5’
202 SUB BREG , = ‘8’
……

230 LTORG The LTORG statement allocates the addresses 230 and 231 to the values
'5' and ‘8’.
232 MOVER AREG, BREG First literal pool
234 MOVER CREG, = ‘3’
…..
The END statement allocates the addresses 250 to the literal ‘3’.
250 END Second literal pool.
 Data Structures in Pass I
1. Location Counter : LC
2. OPTAB – a table of mnemonic op codes, static table
Implemented as array or hash table, easy for search
◦ Contains mnemonic op code, class and mnemonic info
◦ Class field indicates whether the op code corresponds to
◦ an imperative statement (IS) / a declaration statement (DL) or an assembler Directive (AD)
◦ For IS, mnemonic info field contains the pair ( machine opcode, instruction length)
◦ Else, it contains the ID of the routine to handle the AD or DL statement.
Ex : MOVER IS (04, 1)
BC IS (07, 1)
LTORG AD R#5
DS DL R#1
DC DL R#2
 Data Structures in Pass I
3. SYMTAB - Symbol Table
◦ A SYMTAB entry contains primarily symbol name and address . Implemented as hash table.
Index no. Symbol Address
1 LOOP 502
2 AGAIN 514
3 NUM 550

4. LITTAB – a table of literals

Index Literal Address
1 =‘5’ 511
2 =‘1’ 512
3 =‘1’ 520

5. POOLTAB – POOL Table POOLTAB contains the LITTAB index of the first literal of each
Literal no. literal pool. When LTORG / END statement is processed, literals
in the current pool are allocated addresses starting with current LC value.
#1
#3
Algorithm - First Pass of 2- Pass Assembler

Source: M. Dhamdhere, Systems Programming and Operating Systems , Tata McGraw-Hill,

Algorithm - First Pass of 2- Pass Assembler

Source: M. Dhamdhere, Systems Programming and Operating Systems , Tata McGraw-Hill,

 Assignments
Consider the following Assembly language code.
START 200
MOVER AREG , = ' 6 '
LOOP : READ N
MOVER BREG , N
SUB AREG , BREG
JZ LOOP
ORG 500
LTORG
ADD BREG , = ' 30 '
LTORG
INC BREG
N DC '10'
STR DS 20
NUM EQU N
END
Assume each imperative instruction is of length 2.
Generate Symbol table.
Generate Literal table and Pool Table
Perform LC processing for the program given.
Intermediate Code Forms: 2 Pass Assembler

Prof. Reshma Pise

Comp Engg. Dept
Vishwakarma University
 Intermediate Code
Output of Pass 1 of two – pass assembler is Intermediate code
Intermediate code consist of a set of IC units, each unit consists of 3 fields :
1. Address ( LC )
2. Representation of mnemonics opcode.
3. Representation of operands

There are 2 possible forms of IC :

1) Variant I
2) Variant II

They differ in representation of operands fields.

In Variant I operand fields are completely processed by Pass 1.
 Intermediate Code
The mnemonics field contains a pair of the form (statement class, code).
Statement class can be one of IS, DL, and AD for imperative statement, declaration
statement and assembler directive respectively.

For imperative statement, code is the instruction opcode in the machine language from
MOT.
e.g. MOV = > (IS , 04 ) // 4 is opcode of MOV

For declarations and assembler directives, code is the index number within the class.
Thus, (AD, 05) stands for assembler directive number 5 which LTORG.
 Intermediate Code: Variant I
Representation of First operand :
A single digit number which is a code for a register or the
condition code.
(Ex: 1 – AREG or 1 – LT etc.)

Representation of Second operand :

A pair of the form (operand class, code)
where operand class is one of the C, S and L standing for
constant, symbol and literal

Ex: The operand descriptor for the statement START 200 is

(C , 200).
For a symbol or literal, the code field contains the index of
symbol / literal in SYMTAB or LITTAB
( S , 1 ) or ( L , 1 )
Source: M. Dhamdhere, Systems Programming and Operating Systems , Tata McGraw-Hill,
•START 200:
•(AD,01) (C,200):
•AD: Assembler Directive
•01: Code for START directive
•C,200: Constant 200
•READ A:
•(IS,09) (S,01):
•IS: Imperative Statement
•09: Code for READ instruction
•S,01: Symbol 01 (memory location of A)
•MOVER AREG, A:
•(IS,04) (1)(S,01):
•IS: Imperative Statement
•04: Code for MOVER instruction
•1: Code for AREG (accumulator register)
•S,01: Symbol 01 (memory location of A)
•SUB AREG, =‘1’:
•(IS,02) (1)(L,01):
•IS: Imperative Statement
•02: Code for SUB instruction
•1: Code for AREG (accumulator register)
•L,01: Literal 01 (value 1)
•BC GT, LOOP:
•(IS,07) (4)(S,02):
•IS: Imperative Statement
•07: Code for BC instruction
•4: Code for GT (Greater Than)
•S,02: Symbol 02 (label LOOP)
•STOP:
•(IS,00):
•IS: Imperative Statement
•00: Code for STOP instruction
•A DS 1:
•(DL,02) (C,1):
•DL: Declarative Statement
•02: Code for DS (Define Storage)
•C,1: Constant 1
•LTORG:
•(AD,05):
•AD :Assembler Directives
•05: Code for LTORG directive
 Intermediate Code: Variant II

➢ In variant II , symbols, condition codes and CPU

register operands are not processed.
➢ Declarative statement and assembler directives :
operand field is processed to support LC processing.

➢ Imperative statements the operand

field is processed only to identify
literal references.
 Intermediate Code Forms

Source: M. Dhamdhere, Systems Programming and Operating Systems , Tata McGraw-Hill,

Memory requirement with (a) Variant I and (b) Variant II
In Variant I operand fields are completely processed by Pass 1. Pass 1 is overloaded and
requires more space.
 Memory Layout (a)
1. Pass I:
1. Data structures: Memory space allocated for data structures used in the first pass.
2. Work area: Memory space allocated for the working area during the first pass.
2. Pass II:
1. Data structures: Memory space allocated for data structures used in the second pass.
2. Work area: Memory space allocated for the working area during the second pass.
 In layout (a), the data structures and work area seem to be independent for each pass.
 This means that the memory allocated for data structures and the work area in Pass I is
separate from those in Pass II.
 There is no sharing of data structures between passes.
 Memory Layout (b)
1. Pass I:
1. Data structures: Memory space allocated for data structures used in the first pass.
2. Work area: Memory space allocated for the working area during the first pass.
2. Pass II:
1. Data structures: Memory space allocated for data structures used in the second
pass, but these are the same as those used in Pass I.
2. Work area: Memory space allocated for the working area during the second pass,
but this is the same as that used in Pass I.
 In layout (b), the data structures and work area are shared between Pass I
and Pass II.
 This means that the memory allocated for data structures and the work area
in Pass I is reused in Pass II.
 There is no duplication of memory for the data structures and work area
between the two passes.
 Intermediate Code Forms
Summary
•Layout (a): Independent memory allocation for each pass, with no sharing of data
structures or work area.
•Layout (b): Shared memory allocation for both passes, with the same data structures
and work area used in both passes.
Design of Assembler : Pass 2 of 2–Pass
Assembler

Prof. Reshma Pise

Comp Engg. Dept
Vishwakarma University
 Two Pass Assembler
➢ .
➢

Assembly
program

Intermediate Object
Pass 1 Pass 2
file codes

OPTAB SYMTAB SYMTAB

Literal Table
 Pass 2 of 2–Pass Assembler

Functions :
➢ Process IC to synthesize the machine code.
➢ LC Processing
➢ Error Reporting

Input : Intermediate Code generated in Pass 1.

Output : Machine code (Object file)
Data Structures Used : LC, Symbol Table, Literal Table and Pool Table.
 Pass 2 : Algorithm
The target code is to be assembled in the area named code_area.
1. code_area_address = address of code_area;
Pooltab_ptr = 1;
Loc_cntr = 0;
2. While next statement is not an END statement
a) Clear machine_code_buffer
b) If an LTORG statement
i) Process literals in LITTAB from current pool and assemble the literals in
machine_code_buffer.
ii) size= size of memory area required for literals
iii) Pooltab_ptr = pooltab_ptr + 1;
a) If a START or ORIGIN statement
i) Loc_cntr = value specified in operand field;
ii) size = 0;
b) If a declaration statement
i) If a DC statement then assemble the constant in machine_code_buffer;
ii) size = size of memory area required by DC / DS;
 Pass 2 : Algorithm
e) If an Imperative statement
i) Get operand address from SYMTAB or LITTAB
ii) Assemble instruction in machine_code_buffer;
iii) size = size of instruction;

f) If size≠ 0 then
i) Move contents of machine_code_buffer to the
address code_area_address + Loc_cntr;
ii) Loc_cntr = Loc_cntr + size;

3. Processing end statement

i) Perform steps 2(b) and 2(f)
ii) Write code_area into output file.
 Error Reporting

The symbol B referenced in statement

10 is undefined. It is not possible to
such error during pass I.
This kind of error can be detected
only after completing pass I.
During pass II , SYMTAB is
available. Symbol table is searched for
the entry B. If a match is not found,
error is reported.
Design of Assembler : One Pass Assembler

Prof. Reshma Pise

Comp Engg. Dept
Vishwakarma University
 Single Pass Assembler
One-pass assemblers
➢ A one pass assembler requires 1 scan of the source program to generate machine code
➢ No intermediate code generated
➢ LC processing and construction of the symbol table is done as in two pass assembler.
Main problem - Forward references
Data items
Labels on instructions
Forward reference : When the variables are used before their definition. It is reference
to a symbol that is defined later in the program.
Ex: START 100
MOVER AREG, N // To translate this instruction, address of N is required.
..... and the assembler has not yet processed the symbol N

N DC 10
 Single Pass Assembler:Backpatching
The problem of forward references is handled using a process called Backpatching
The operand field of an instruction containing a forward reference is left blank
Ex: MOVER AREG, N
Is partially synthesized since N is a forward reference. Second operand field in
the machine code is left blank. It will be inserted later.

◦ An entry is added in Table of Incomplete Instructions (TII) , A table of instructions

containing forward references.

◦ Each entry in the TII is a pair of the form (<instruction address>, <symbol referenced>)

◦ When the END statement is processed, the symbol table would contain the addresses of all
symbols defined in the source program.
 Single Pass Assembler:Backpatching

◦ When the END statement is processed , TII would contain information of all forward
references.

◦ Now each entry in TII is processed to complete the machine code.

Ex: the entry (501, N) would be processed by finding the address of N from the
symbol table and inserting it in the operand field of the instruction with assembled
address 501.

◦ At the end of the program, report the error if symbol is not found in symbol table.
( It means the symbol is undefined )
Mind Map of Assembler