What is Computer Architecture and Organization?

In general terms, the architecture of a computer system can be considered as a catalogue of tools or
attributes that are visible to the user such as instruction sets, number of bits used for data,
addressing techniques, etc.

Whereas, Organization of a computer system defines the way system is structured so that all those
catalogued tools can be used. The significant components of Computer organization are ALU, CPU,
memory and memory organization.

Why do we study computer architecture and organization?

Knowing what's inside and how it works will help you design, develop, and implement applications
better, faster, cheaper, more efficient, and easier to use because you will be able to make informed
decisions instead of guestimating and assuming.

Data Representation in Computer Organization

In computer organization, data refers to the symbols that are used to represent events, people,
things and ideas. The data can be represented in the following ways:

Data: Data can be anything like a number, a name, notes in a musical composition, or the color in a
photograph. Data representation can be referred to as the form in which we stored the data,
processed it and transmitted it. In order to store the data in digital format, we can use any device like
computers, smartphones, and iPads. Electronic circuitry is used to handle the stored data.

Digitization: Digitization is a type of process in which we convert information like photos, music,
number, text into digital data. Electronic devices are used to manipulate these types of data. The
digital revolution has evolved with the help of 4 phases, starting with the big, expensive standalone
computers and progressing to today's digital world. All around the world, small and inexpensive
devices are spreading everywhere.

Binary Digits
The binary digits or bits are used to show the digital data, which is represented by 0 and 1. The
binary digits can be called the smallest unit of information in a computer. The main use of binary digit
is that it can store the information or data in the form of 0s and 1s. It contains a value that can be
on/off or true/false. On or true will be represented by the 1, and off or false will be represented by
the 0. The digital file is a simple file, which is used to collect data contained by the storage medium
like the flash drive, CD, hard disk, or DVD.

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Representing Numbers:
The number can be represented in the following way:
Numeric Data: Numeric data is used to contain numbers, which helps us to perform arithmetic operations.
The digital devices use a binary number system so that they can represent numeric data. The binary number
system can only be represented by two digits 0 and 1. There can't be any other digits like 2 in the system. If we
want to represent number 2 in binary, then we will write it as 10.

Representing Text
The text can be represented in the following ways:
Character Data: Character data can be formed with the help of symbols, letters, and numerals, but they can't
be used in calculations. Using the character data, we can form our address, hair colour, name, etc. Character
data normally takes the data in the form of text. With the help of the text, we can describe many things like
our father name, mother name, etc.
Digital Devices: Several types of codes are employed by the digital devices to represent character data,
including Unicode, ASCII, and other types of variants. The full form of ASCII is American Standard Code
for Information Interchange. It is a type of character encoding standard, which is used for electronic
communication. With the help of telecommunication equipment, computers and many other devices, ASCII

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code can represent the text. The ASCII code needs 7 bits for each character, where the unique character is
represented by every single bit. For the uppercase letter A, the ASCII code is represented as 1000001.
Extended ASCII can be described as a superset of ASCII. The ASCII set uses 7 bits to represent every character,
but the Extended ASCII uses 8 bits to represent each character. The extended ASCII contains 7 bits of ASCII
characters and 1 bit for additional characters. Using the 7 bits, the ASCII code provides code for 128 unique
symbols or characters, but Extended ASCII provides code for 256 unique symbols or characters. For the
uppercase letter A, the Extended ASCII code is represented as 01000001.

In Computer Organization and Architecture, data formats are necessary to understand in architecture. During
designing, the CPU user needs to decide that the CPU will take Number (data) in which format. Some criteria
are already set in the system for the working of the processor. For example, if a system understands the
Number in 1’s complement number representation and provides CPU data in 2’s complement number
representation, the CPU gives you an incorrect answer.

In system architecture, the designer already set a word size like a word size of 16 bit or 32 bit or 64 bit. If the
user system is 32 bit and the user is installing an application of 64-bit configuration, that application doesn’t
work properly. The application always shows a problem in the running of the system.

Types of Data input in Computer

(1) Number

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Numbers are digits (0-9) used for calculating (subtraction, addition, multiplication, division and other
mathematical calculation). Mathematics is originated with numbers. In a computer system, numbers are
represented in different ways.

Ways of number representation are:-

 Integer
 Real Number

Integer
Integers are the whole Number (not a fraction) represented in the computer as a group of binary digits (bits).
These are some of the data types commonly used in computers. Integers can be positive, negative or zero-like
34, -567 or 0, 45563. Different integers are divided into two parts.

(a) Unsigned type of integer

An unsigned integer can hold a whole number (0-n). Number (0-n) can be zero and positive Number
like 0, 36277. Unsigned integers cannot use negative values or numbers.
If the computer has an 8-bit register to store Number, the range of unsigned integer is:-
 Smallest Number = 0000000 =0
 Largest Number = 1111111 = 28 -1= 255

If the computer has a 16-bit register to store Number, the range of unsigned integer is:-
 Smallest Number = 000000000000000 =0
 Largest Number = 111111111111111 = 216 -1= 65535

If the computer has a 32-bit register to store Number, the range of unsigned integer is:-
 Smallest Number =0
 Largest Number = 232 -1= 4,294,967,295 or about 4 billion.


(b) Signed Integer

Like unsigned integer, signed integer also represents zero (0), positive value, but it can also represent Negative
Number (-234). It is representing real Numbers as fixed-point representation in the system and will discuss
further in detail. In a computer system, there are three ways to represent signed integer:-
1. SMR- Sign Magnitude Representation.
2. 1’s Complement Representation.
3. 2’s Complement representation.

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 A. SMR (Sign Magnitude Representation)

Here, the MSB (Most significant bit) and LSB (least significant bit) are used.

MSB (Most significant bit) – The leftmost and higher-order bit in the binary Number have a higher number.
For example, in binary number 1001, the MSB is 1, and in binary number 0011, the MSB is 0.

 If MSB is 0, then the Number evaluated is positive.

 If MSB is 1, then the Number evaluated is negative.

LSB (least significant bit) – Least significant bit is the smallest bit in the binary number series at the rightmost
side. For example, in binary number 1010, the LSB is 0, and in binary number 0111, the LSB is 1.

The computer only understands binary numbers where 0 is for +ve (positive) and 1 for negative. In
representation, 1 bit is reserved for the Number.

Let, Total number of bits = n

Sign bit = 0 (it means number is positive)
Sign Bit = 1 (It means Number is negative)

Important Point – For all positive signed integer numbers, all the three ways (sign-magnitude, 1’s
complement, 2’s complement) have the same representation.

Representation of 25 in 8 bit using SMR, 1’s complement and 2’s complement.

0 0 0 1 1 0 0 1

B. 1’s complement of a binary number is another binary number obtained by toggling all bits in it, i.e.,
transforming the 0 bit to 1 and the 1 bit to 0.

Examples: Let numbers be stored using 4 bits

1's complement of 7 (0111) is 8 (1000)
1's complement of 12 (1100) is 3 (0011)

C.2’s complement of a binary number is 1 added to the 1’s complement of the binary number.
Examples: Let numbers be stored using 4 bits
2's complement of 7 (0111) is 9 (1001)
2's complement of 12 (1100) is 4 (0100)

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These representations are used for signed numbers.
The main difference between 1′ s complement and 2′ s complement is that 1′ s complement has two
representations of 0 (zero) – 00000000, which is positive zero (+0) and 11111111, which is negative zero (-
0); whereas in 2′ s complement, there is only one representation for zero – 00000000 (+0) because if we
add 1 to 11111111 (-1), we get 00000000 (+0) which is the same as positive zero. This is the reason why 2′
s complement is generally used.

Decimal Sign 1's 2's

Magnitude Compliment Compliment
+7 0111 0111 0111
+6 0110 0110 0110
+5 0101 0101 0101
+4 0100 0100 0100
+3 0011 0011 0011
+2 0010 0010 0010
+1 0001 0001 0001
+0 0000 0000 0000
-0 1000 1111 0000
-1 1001 1110 1111
-2 1010 1101 1110
-3 1011 1100 1101
-4 1100 1011 1100
-5 1101 1010 1011
-6 1110 1001 1010
-7 1111 1000 1001
-8 **** **** 1000

How to add two negative numbers using 1’s compliment

Ex: (-44)
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 +(-39)
-----------
-----------

Characters
Characters are words (letters, alphabet) that we input in the system, but we cannot represent characters
directly on a computer as we do with binary numbers. So to solve this, Scientists have given some different
methods in Binary to represent the characters.

 ASCII – Most of us are aware of this because it is currently used in Binary to represent the character. The full
form of ASCII is the American Standard Code for information interchange. It is a method used to define a set
of characters in the system. It is a seven-bit character code where every bit represents a unique character and
can represent 128 different symbols.
7 bit = 0000000 to 1111111
0 to 27 -1 to 127

ASCII codes are used in computers, telecommunication equipment and other devices to represent the text.
Uppercase letters and lower case letters are assigned different Numbers in the ASCII table. For example,
character “B” is assigned to the decimal number “66” or “0 (zero)” is assigned to decimal number 48. Here’s is
an ASCII table with a partial symbol.

ASCII Symbol ASCII Symbol ASCII Symbol

48 0 65 A 97 a
49 1 66 B 98 b
50 2 67 C 99 c
51 3 68 D 100 d
52 4 69 E 101 e
53 5 70 F 102 f
54 6 71 G 103 g
55 7 72 H 104 h
56 8 73 I 105 i
57 9 74 J 106 j
75 K 107 k

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 76 L 108 l
77 M 109 M

 EBCDIC – EBCDIC stands for Extended Binary coded decimal interchange, which uses 8-bit binary
code (a string of 0’s or 1’s) for each Number and alphanumeric character, including punctuation
marks, accented letters and non-alphabetic characters. It is one of the data-encoding system
designed and developed by IBM in which 256 possible characters are defined.

 UNICODE – Unicode refers to the universal code. ISO designs the advanced and latest character
encoding standard to support characters from all languages worldwide. Unicode supports 2 or 4 byte
for each character. There are many types of Unicode encodings, such as UTF-8 and UTF-
16. Estimated Range of Unicode = 0 to 216-1 = 0 to 65535 symbols. Programming language like Java
uses UNICODE.

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Real Numbers
There two types of approaches that are developed to store real numbers with the proper method.

A. Fixed point number

B. Floating point number

Fixed point notation has fixed numbers after the decimal. For example, 364.432.

Floating-point allows varying numbers of digits after the decimal. For example 36.4423 x 10 1 or
3.64423 x 102.

In digital technology, data is stored in memory registers with binary bits 0’s and 1’s because the
computer only understands binary language. When we enter data in the system, it is converted into
binary bits, and it is processed and used in the CPU in different ways. Memory registers have a
format and a specific range to store data. Scientists have designed a real number representation
method in memory registers of 8 bit, 16 bit, 32bit.

1) Fixed point representation

In computing, fixed-point number representation is a real data type for a number. With the help of
fixed number representation, data is converted into binary form, and then data is processed, stored
and used by the system.

Fixed point representation of data

Sign bit -The fixed-point numbers in binary uses a sign bit. A positive number has a sign bit 0, while a
negative number has a sign bit 1.

Integral Part – The integral part is of different lengths at different places. It depends on the register’s
size, like in an 8-bit register, integral part is 4 bits.

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Fractional part – Fractional part is also of different lengths at different places. It depends on the
register’s size, like in an 8-bit register, integral part is of 3 bits.

 8 bits = 1 Sign bit + 4 bits (integral) + 3bits (fractional part)

 16 bits = 1 Sign bit + 9 bits (integral) +6 bits (fractional part)
 32 bits = 1 Sign bit + 15 bits (integral) + 9 bits (fractional part)

How to write the number in Fixed-point notation?

Number is 4.5

Step 1:- Convert the number into binary form.

4.5 = 100.1

Step 2:- Represent binary number in fixed point notation

2) Floating point Number Representation −

The floating-point representation of a number has two parts. The first part represents a signed, fixed-point
number called the mantissa. The second part designates the position of the decimal (or binary) point and is
called the exponent. The fixed-point mantissa may be a fraction or an integer.

For example, the decimal number + 6132.789 is represented in floating-point with a fraction and an exponent
as follows:
Fraction Exponent
+0.6132789 +04
This is equivalent to the scientific notation +0.6132789 X 10+4.
Floating-point is always interpreted to represent a number in the following form:
m x re
Only the mantissa m and the exponent e are physically represented in the
register (including their signs).
A floating-point binary number is represented in a similar manner except that it uses base 2 for the
exponent.
For example, the binary number +1001.11 is represented with an 8-bit fraction and 6-bit exponent as follows:
+1001.11 => +.100111 X 24
Fraction Exponent
01001110 000100
The fraction has a 0 in the leftmost position to denote positive. The binary point of the fraction follows the
sign bit but is not shown in the register. The exponent has the equivalent binary number +4. The floating-
point number is equivalent to
M X 2e = + (. 1001110)2 X 2+4

IEEE (Institute of Electrical and Electronics Engineers) has standardized Floating-Point Representation as
following diagram.

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So, actual number is (-1)s(1+m)x2(e-Bias), where s is the sign bit, m is the mantissa, e is the exponent value,
and Bias is the bias number. The sign bit is 0 for positive number and 1 for negative number. Exponents are
represented by or two’s complement representation.
According to IEEE 754 standard, the floating-point number is represented in following ways:
 Half Precision (16 bit): 1 sign bit, 5 bit exponent, and 10 bit mantissa
 Single Precision (32 bit): 1 sign bit, 8 bit exponent, and 23 bit mantissa
 Double Precision (64 bit): 1 sign bit, 11 bit exponent, and 52 bit mantissa
 Quadruple Precision (128 bit): 1 sign bit, 15 bit exponent, and 112 bit mantissa

Register Transfer Language

A digital computer system exhibits an interconnection of digital modules such as registers, decoders,
arithmetic elements, and Control logic. These digital modules are interconnected with some common data
and control paths to form a complete digital system.

Moreover, digital modules are best defined by the registers and the operations that are performed on the
data stored in them. The operations performed on the data stored in registers are called Micro-operations.

The internal hardware organization of a digital system is best defined by specifying:

o The set of registers and the flow of data between them.
o The sequence of micro-operations performed on the data which are stored in the registers.
o The control paths that initiates the sequence of micro-operation

The Register Transfer Language is the symbolic representation of notations used to specify the sequence of
micro-operations.

In a computer system, data transfer takes place between processor registers and memory and between
processor registers and input-output systems. These data transfer can be represented by standard notations
given below:

o Notations R0, R1, R2..., and so on represent processor registers.

o The addresses of memory locations are represented by names such as LOC, PLACE, MEM, etc.
o Input-output registers are represented by names such as DATA IN, DATA OUT and so on.
o The content of register or memory location is denoted by placing square brackets around the name of
the register or memory location.

Register Transfer
Computer registers are denoted by capital letters (sometimes followed by numerals) to denote the function of
the register. The register that holds an address for the memory unit is usually called a memory address
register and is denoted by MAR. Other registers are PC (for program counter), IR (for instruction register, and
R1 (for processor register). An n-bit register is sequence of n-flip-flops numbered from 0 through n-1,
starting from 0 in the rightmost position and increasing the numbers toward the left.

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The most common way to represent a register is by a rectangular box with the name of the register inside,
as shown in the figure below. The individual bits can be distinguished as shown in (B). The numbering of bits
in a 16-bit register can be marked on top of the box as shown in (C). A16-bit register is partitioned into two
parts in (D).
Bits 0 through 7 are assigned the symbol L (for low byte) and bits 8 through 15 are assigned the symbol H
(for high byte). The name of the 16-bit register is PC. The symbol PC (0-7) or PC (L) refers to the low-order
byte and PC (8-15) or PC (H) to the high-order byte.

For instance, the following statement denotes a transfer of the data of register R1 into register R2.

R2 ← R1

o Typically, most of the users want the transfer to occur only in a predetermined control condition.
This can be shown by following if-then statement:

If (P=1) then (R2 ← R1); Here P is a control signal generated in the control section.

o It is more convenient to specify a control function (P) by separating the control variables from the
register transfer operation. For instance, the following statement defines the data transfer
operation under a specific control function (P).

P: R2 ← R1

The following image shows the block diagram that depicts the transfer of data from R1 to R2.

Here, the letter 'n' indicates the number of bits for the register. The 'n' outputs of the register R1 are
connected to the 'n' inputs of register R2.

A load input is activated by the control variable 'P' which is transferred to the register R2.

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Bus and Memory Transfers
A digital system composed of many registers, and paths must be provided to transfer information
from one register to another. The number of wires connecting all of the registers will be excessive if
separate lines are used between each register and all other registers in the system.

A bus structure, on the other hand, is more efficient for transferring information between registers in
a multi-register configuration system.

A bus consists of a set of common lines, one for each bit of register, through which binary
information is transferred one at a time. Control signals determine which register is selected by the
bus during a particular register transfer.

The following block diagram shows a Bus system for four registers. It is constructed with the help of
four 4 × 1 Multiplexers each having four data inputs (0 through 3) and two selection inputs (S1 and
S2).

There are labels to make it more convenient for you to understand the input-output configuration of
a Bus system for four registers. For instance, output 1 of register A is connected to input 0 of MUX1.
Here we have Bus system for 4 register.

The two selection lines S1 and S2 are connected to the selection inputs of all four multiplexers. The
selection lines choose the four bits of one register and transfer them into the four-line common bus.

When both of the select lines are at low logic, i.e. S1 S0 = 00, the 0 data inputs of all four multiplexers
are selected and applied to the outputs that forms the bus. This, in turn, causes the bus lines to
receive the content of register A since the outputs of this register are connected to the 0 data inputs
of the multiplexers.

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Similarly, when S1S0 = 01, register B is selected, and the bus lines will receive the content provided by
register B.
The following function table shows the register that is selected by the bus for each of the four
possible binary values of the Selection lines.

Three-State Bus Buffers

A bus system can also be constructed using three-state gates instead of multiplexers. The three state
gates can be considered as a digital circuit that has three gates, two of which are signals equivalent to logic 1
and 0 as in a conventional gate. However, the third gate exhibits a high-impedance state.
The most commonly used three state gates in case of the bus system is a buffer gate. The graphical symbol of
a three-state buffer gate can be represented as:

A three-state gate is a digital circuit that exhibits three states.

 Two of the states are signals equivalent to logic 1 and 0 as in a conventional gate.
 The third state is high impedance state which behaves like an open circuit, which means that the
output is disconnected and does not have logic significance.
 The control input determines the output state. When the control input C is equal to 1, the output is
enabled and the gate behaves like any conventional buffer, with the output equal to the normal input.
 When the control input C is 0, the output is disabled and the gate goes to a high-impedance state,
regardless of the value in the normal input.

The following diagram demonstrates the construction of a bus system with three-state buffers.

 The construction of a bus system with three-state buffers is demonstrated in previous figure.
 The outputs of four buffers are connected together to form a single bus line.

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  The control inputs to the buffers determine which of the four normal inputs will communicate with
the bus line.
 The connected buffers must be controlled so that only one three-state buffer has access to the bus
line while all other buffers are maintained in a high impedance state.
 One way to ensure that no more than one control input is active at any given time is to use a decoder,
as shown in the figure: Bus line with three state-buffers.
 When the enable input of the decoder is 0, all of its four outputs are 0, and the bus line is in a high-
impedance state because all four buffers are disabled.
 When the enable input is active, one of the three-state buffers will be active, depending on the binary
value in the select inputs of the decoder.
 A 2 * 4 decoder ensures that no more than one control input is active at any given point of time.

Memory Transfer
Most of the standard notations used for specifying operations on memory transfer are stated below.
o The transfer of information from a memory unit to the user end is called a Read operation.
o The transfer of new information to be stored in the memory is called a Write operation.
o A memory word is designated by the letter M.
o We must specify the address of memory word while writing the memory transfer operations.
o The address register is designated by AR and the data register by DR.
o Thus, a read operation can be stated as:
Read: DR ← M [AR]
o The Read statement causes a transfer of information into the data register (DR) from the
memory word (M) selected by the address register (AR).
o And the corresponding write operation can be stated as:
Write: M [AR] ← R1
o The Write statement causes a transfer of information from register R1 into the memory word
(M) selected by address register (AR).

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Arithmetic Micro-Operations:
Arithmetic micro-operations perform arithmetic operations on numeric data stored in registers.

4 bit Binary Adder:

The digital circuit that generates the arithmetic sum of two binary numbers of any lengths is called binary
adder.

 The binary adder is constructed with full-adder circuits connected in cascade, with the output
carry from one full-adder connected to the input carry of the next full-adder.
 The figure shows the interconnections of four full-adders (FA) to provide a 4-bit binary adder.
 The augends bits of A and the addend bits of B are designated by subscript numbers from
right to left, with subscript 0 denoting the low-order bit.
 The carries are connected in a chain through the full-adders.
 The input carry to the binary adder is C0 and the output carry is C4.
 The S outputs of the full-adders generate the required sum bits.
 An n-bit binary adder requires n full-adders.
 The output carry from each full-adder is connected to the input carry of the next-high-order
full-adder.
 The n data bits for the A inputs come from one register (such as R1), and the n data bits for
the B inputs come from another register (such as R2). The sum can be transferred to a third
register or to one of the source registers (R1 or R2), replacing its previous content.

4 bit Binary Adder-Subtractor:

This circuit is used to make addition and subtraction i.e. dual operation.

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4 bit Binary Incrementer:
The increment micro-operation adds one to register value.

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Logic Micro-operations
 Logic micro operations specify binary operations for strings of bits stored in registers.
 These operations consider each bit of the register separately and treat them as binary
variables.
Example:

Hardware Implementation of Logic Circuit

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Applications of Logic Micro-operations:
1. Selective Set Operation
 The selective-set operation sets to 1 the bits in register A where there are corresponding
1's in register B.
 It does not affect bit positions that have 0's in B.
 The OR micro-operation can be used to selectively set bits of a register.

2. Selective Complement Operation

 The selective-complement operation complements bits in register A where there are
corresponding 1's in register B.
 It does not affect bit positions that have 0's in B.
 The Exclusive - OR micro-operation can be used to selectively set bits of a register.

3. Selective Clear Operation

 The selective-clear operation clears to 0 the bits in register A only where there are
corresponding 1's in register B.
 It does not affect bit positions that have 0's in B.
 The corresponding logic micro-operation is A ← A ∧ B’.

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4. Mask Operation
 The mask operation is similar to the selective-clear operation except that the bits of
register A are cleared only where there are corresponding 0’s in register B.
 The mask operation is an AND micro-operation.

5. Insert Operation
 The insert operation inserts a new value into a group of bits.
 This is done by first masking and then ORing them with required value.
 The mask operation is an AND micro-operation and the insert operation is an OR micro-
operation.

6. Clear Operation
 The clear operation compares the words in register A and register B and produces an all
0’s result if the two numbers are equal.
 This operation is achieved by an exclusive-OR micro-operation.

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Shift Micro-operations:
 Shift micro-operations are used for serial transfer of data.
 Used in conjunction with arithmetic, logic and other data processing operations.
 The content of the register can be shifted to the left or the right.
 The first flip-flop receives its binary information from the serial input.
 The information transferred through the serial input determines the type of shift.

1. Logical Shift: A logical shift is one that transfers 0 through the serial input.

2. Circular Shift: A circular shift (also known as a rotate operation) circulates the bits of the
register around the two ends without loss of information.
This is accomplished by connecting the serial output of the shift register to its serial input.

3. Arithmetic Shift
 An arithmetic shift is a micro-operation that shifts a signed binary number to the left or right.
 An arithmetic shift-left multiplies a signed binary number by 2.
 An arithmetic shift-right divides the number by 2.

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4 - bit Combinational Circuit Shifter

 The 4-bit shifter has four data inputs, A0 through A3 and four data outputs, H0 through
H3.
 There are two serial inputs, one for shift left (IL) and the other for shift right (IR).
 When the selection input S = 0, the input data are shifted right (down in the diagram).
 When S = 1, the input data are shifted left (up in the diagram).
 The two serial inputs can be controlled by another multiplexer to provide the three
possible types of shifts.

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BASIC COMPUTER ORGANIZATION AND DESIGN:

1. What is Computer Register?

A computer register is a temporary storage space for instructions and data that the
CPU is currently using. Registers are essential for the efficient functioning of a
computer system.

There are various needs of the registers in computer for

 Instruction sequencing needs a counter to calculate the address of the next

instruction after execution of the current instruction is completed (PC).
 Necessary to provide a register in the control unit for storing the instruction
code after it is read from memory (IR).
 Needs processor registers for manipulating data (AC and TR) and a register for
holding a memory address (AR).

The registers are also listed in Table 5.1 together with a brief description of their
function and the number of bits that they contain.

 The data register (DR) holds the operand read from memory.
 The accumulator (AC) register is a general purpose processing register.
 The instruction read from memory is placed in the instruction register (IR).
 The temporary register (TR) is used for holding temporary data during the
processing.
 The memory address register (AR) has 12 bits since this is the width of a
memory address.

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  The program counter (PC) also has 12 bits and it holds the address of the next
instruction to be read from memory after the current instruction is executed.
 Two registers are used for input and output.
i. The input register (INPR) receives an 8-bit character from an input
device.
ii. The output register (OUTR) holds an 8-bit character for an output
device.

The above requirements dictate the register configuration shown in Figures

below:

2. Instruction Codes:
The organization of the computer is defined by its internal registers, the timing
and control structure, and the set of instructions that it uses.

Internal organization of a computer is defined by the sequence of micro-

operations it performs on data stored in its registers.

Computer can be instructed about the specific sequence of operations it must

perform.

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 User controls this process by means of a Program.

Program: set of instructions that specify the operations, operands, and the
sequence by which processing has to occur.

Instruction: a binary code that specifies a sequence of micro-operations for the

computer.

The computer reads each instruction from memory and places it in a control
register. The control then interprets the binary code of the instruction and
proceeds to execute it by issuing a sequence of micro-operations. – Instruction
Cycle

Instruction Code: group of bits that instruct the computer to perform specific
operation.

Instruction code is usually divided into two parts: Opcode and address(operand)

Operation Code (opcode):

 group of bits that define the operation
 Eg: add, subtract, multiply, shift, complement.
 No. of bits required for opcode depends on no. of operations available in
computer.
 n bit opcode >= 2n (or less) operations

Address (operand):
 specifies the location of operands (registers or memory words)
 Memory words are specified by their address
 Registers are specified by their k-bit binary code
 k-bit address >= 2k registers

Stored Program Organization:

The ability to store and execute instructions is the most important property of a
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general-purpose computer. That type of stored program concept is called stored
program organization.

The simplest way to organize a computer is to have one processor register and
an instruction code format with two parts. The first part specifies the operation
to be performed and the second specifies an address.

The below figure shows the stored program organization

Instructions are stored in one section of memory and data in another.

For a memory unit with 4096 words we need 12 bits to specify an address since 212 =
4096.

If we store each instruction code in one 16-bit memory word, we have available four
bits for the operation code (abbreviated opcode) to specify one out of 16 possible
operations, and 12 bits to specify the address of an operand.

Accumulator (AC):
Computers that have a single-processor register usually assign to it the name accumulator and
label it AC. The operation is performed with the memory operand and the content of AC

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Addressing of Operand:
 Sometimes it is convenient to use the address
bits of an instruction code not as an address
but as the actual operand.
 When the second part of an instruction code
specifies an operand, the instruction is said to
have an immediate operand.
 When the second part specifies the address of
an operand, the instruction is said to have a
direct address.
 When second part of the instruction designate
an address of a memory word in which the
address of the operand is found such
instruction have indirect address.
 One bit of the instruction code can be used to
distinguish between a direct and an indirect
address.
 The instruction code format shown in below
Fig. (a). It consists of a 3-bit operation code, a 12-bit address, and an indirect address mode bit
designated by I . The mode bit is 0 for a direct address and 1 for an indirect address.

A direct address instruction is shown in Fig. 5-2(b).

 It is placed in address 22 in memory. The I bit is 0, so the instruction is recognized as a direct
address instruction. The opcode specifies an ADD instruction, and the address part is the
binary equivalent of 457.
 The control finds the operand in memory at address 457 and adds it to the content of AC.
 The instruction in address 35 shown in Fig. (c) has a mode bit I = 1.
 Therefore, it is recognized as an indirect address instruction.
 The address part is the binary equivalent of 300. The control goes to address 300 to find the
address of the operand. The address of the operand in this case is 1350.
 The operand found in address 1350 is then added to the content of AC.
 The effective address to be the address of the operand in a computation-type instruction or
the target address in a branch-type instruction.
 Thus the effective address in the instruction of Fig. (b) is 457 and in the instruction of Fig (c)
is 1350

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Common Bus System:
 The basic computer has eight registers, a memory unit, and a control unit
 Paths must be provided to transfer information from one register to another and between
memory and registers.
 A more efficient scheme for transferring information in a system with many registers is to
use a common bus.
 The connection of the registers and memory of the basic computer to a common bus
system is shown in Fig. 5-4.
 The outputs of seven registers and memory are connected to the common bus.
 The specific output that is selected for the bus lines at any given time is determined from
the binary value of the selection variables S2, S1, and S0.
 The number along each output shows the decimal equivalent of the required binary
selection.

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Instruction Set:
Most computer instructions can be classified into three
categories:
A. Data Transfer Instructions:
Data transfer instructions move data from one place in the
computer to another without changing the data content. The
most common transfers are between memory and processor
registers, between processor registers and input or output, and
between the processor registers themselves.

Accompanying each instruction is a mnemonic symbol. Different computers use different

mnemonics for the same instruction name

B. Data Manipulation Instructions:

The data manipulation instructions in a typical computer are usually divided into three basic
types:
 Arithmetic instructions
 Logical and bit manipulation instructions
 Shift instructions
B1. Arithmetic instructions:
The four basic arithmetic operations are addition,
subtraction, multiplication, and division. Most computers
provide instructions for all four operations. Some small
computers have only addition and possibly subtraction
instructions.

The mnemonics for three add instructions that specify

different data types are shown below:
ADDI : Add two binary integer numbers
ADDF : Add two floating-point numbers
ADDD : Add two decimal numbers in BCD

B2. Logical and Bit Manipulation Instructions:

Logical instructions perform binary operations on strings of
bits stored in registers. They are useful for manipulating
individual bits or a group of bits that represent binary-coded
information. The logical instructions consider each bit of the
operand separately and treat it as a Boolean variable. By
proper application of the logical instructions, it is possible to
change bit values, to clear a group of bits, or to insert new bit
values into operands stored in registers or memory words.

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B3. Shift Instructions:
Shifts are operations in which the bits of a word are
moved to the left or right. Shift instructions may specify
either logical shifts, arithmetic shifts, or rotate-type
operations. In either case the shift may be to the right or
to the left. Table below lists four types of shift
instructions:

C. Program Control Instructions:

Program control instructions provide decision-
making capabilities and change the path taken
by the program when executed in the
computer a program control type of
instruction, when executed, may change the
address value in the program counter and
cause the flow of control to be altered. In
other words, program control instructions
specify conditions for altering the content of
the program counter. Some program control
instructions are listed in Table below:

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Instruction Set of a Basic Computer

The basic computer has 16-bit instruction register (IR) which can denote three types means either
memory reference or register reference or input-output instruction.

A. Memory Reference Instructions: These instructions refer to memory address as an

operand. The other operand is always accumulator. Specifies 12-bit address, 3-bit opcode
(other than 111) and 1-bit addressing mode for direct and indirect addressing.

B. Register Reference Instructions: These instructions perform operations on registers rather

than memory addresses. The IR(14 – 12) is 111 (differentiates it from memory reference) and
IR(15) is 0 (differentiates it from input/output instructions). The rest 12 bits specify register
operation.

C. Input / Output Instructions: These instructions are for communication between computer
and outside environment. The IR(14 – 12) is 111 (differentiates it from memory reference) and
IR(15) is 1 (differentiates it from register reference instructions). The rest 12 bits specify I/O
operation.

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 Hex Code
Symbol Description
I=0 I=1
AND 0xxx, 8xxx AND memory word to AC

Memory Reference
ADD 1xxx, 9xxx Add memory word to AC

Instructions
LDA 2xxx, Axxx Load memory word to AC
STA 3xxx, Bxxx Store AC content in memory
BUN 4xxx, Cxxx Branch Unconditionally
BSA 5xxx, Dxxx Branch and Save Return Address
ISZ 6xxx, Exxx Increment and skip if 0
CLA 7800 Clear AC
CLE 7400 Clear E(overflow bit)
Register Reference Instructions

CMA 7200 Complement AC

CME 7100 Complement E
CIR 7080 Circulate right AC and E
CIL 7040 Circulate left AC and E
INC 7020 Increment AC
SPA 7010 Skip next instruction if AC > 0
SNA 7008 Skip next instruction if AC < 0
SZA 7004 Skip next instruction if AC = 0
SZE 7002 Skip next instruction if E = 0
HLT 7001 Halt computer
INP F800 Input character to AC
Input/ Output

OUT F400 Output character from AC

Instructions

SKI F200 Skip on input flag

SKO F100 Skip on output flag
ION F080 Interrupt On
IOF F040 Interrupt Off

Timing and Control:

The timing for all registers in the basic computer is controlled by a master clock generator. The
clock pulses are applied to all flip-flops and registers in the system, including the flip-flops and
registers in the control unit. The clock pulses do not change the state of a register unless the
register is enabled by a control signal. The control signals are generated in the control unit and
provide control inputs for the multiplexers in the common bus, control inputs in processor
registers, and micro-operations for the accumulator.

There are two major types of control organization:

A. Hardwired control
B. Micro-programmed control

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The differences between hardwired and micro-programmed control are as under:

Hardwired control Microprogrammed control

The control logic is implemented with The control information is stored in a control memory.
gates, flip-flops, decoders, and other The control memory is programmed to initiate the
digital circuits. required sequence of microoperations.

The advantage that it can be optimized Compared with the hardwired control
to produce a fast mode of operation. operation is slow.

Requires changes in the wiring among Required changes or modifications can be done by
the various components if the design updating the microprogram in control memory.
has to be modified or changed.

Hardwired Control Unit?

A hardwired control is a method of generating control signals with the help of Finite State
Machines (FSM). The control signals that are necessary for instruction execution control in the
Hardwired Control Unit are generated by specially built hardware logical circuits, and we can’t
change the signal production mechanism without physically changing the circuit structure.

33
Characteristics of Hardwired Control Unit
 The block diagram of the hardwired control unit is shown in the Figure above.
 It consists of two decoders, a sequence counter, and a number of control logic gates.
 An instruction read from memory is placed in the instruction register (IR). It is divided into
three parts: The I bit, the operation code, and bits 0 through 11.
 The operation code in bits 12 through 14 are decoded with a 3 x 8 decoder. The eight
outputs of the decoder are designated by the symbols D0 through D7.
 Bit 15 of the instruction is transferred to a flip-flop designated by the symbol I.
 Bits 0 through 11 are applied to the control logic gates.
 The 4-bit sequence counter can count in binary from 0 through 15.
 The outputs of the counter are decoded into 16 timing signals T 0 through T15.
 The sequence counter SC can be incremented or cleared synchronously.
 The counter is incremented to provide the sequence of timing signals out of the 4 x 16
decoder.
 As an example, consider the case where SC is incremented to provide timing signals T0, T1,
T2, T3 and T4 in sequence. At time T4, SC is cleared to 0 if decoder output D3 is active.

 This is expressed symbolically by the statement D3T4: SC0

 The timing diagram given down side shows the time relationship of the control signals.
 The sequence counter SC responds to the positive transition of the clock.
 Initially, the CLR input of SC is active. The first positive transition of the clock clears SC to 0,
which in turn activates the timing signal T0 out of the decoder. T0 is active during one clock
cycle.
 SC is incremented with every positive clock transition, unless its CLR input is active.
 This produces the sequence of timing signals T0, T1, T2, T3, T4 and so on, as shown in the
diagram.
 The last three waveforms in Figure show how SC is cleared when D3T4 = 1.
 Output D3 from the operation decoder becomes active at the end of timing signal T 2.
 When timing signal T4 becomes active, the output of the AND gate that implements the
control function D3T4 becomes active.
34
  This signal is applied to the CLR input of SC. On the next positive clock transition (the one
marked T4 in the diagram) the counter is cleared to 0.
 This causes the timing signal T0 to become active instead of T5 that would have been active
if SC were incremented instead of cleared.

Instruction Cycle:
A program residing in the memory unit of the computer consists of a sequence of instructions. The
program is executed in the computer by going through a cycle for each instruction. Each instruction
cycle in turn is subdivided into a sequence of sub cycles or phases. In the basic computer each
instruction cycle consists of the following phases:

1. Fetch an instruction from memory.

2. Decode the instruction.
3. Read the effective address from memory if the instruction has an indirect address.
4. Execute the instruction.

Upon the completion of step 4, the control goes back to step 1 to fetch, decode,
and execute the next instruction.

35
 Step Fetch execute cycle steps Simplified description
The PC contains the address of the memory location that PC has address of next
1
has the next instruction which has to be fetched instruction
This address is then copied from the PC to the MAR via
2 PC copied to the MAR
the address bus
The contents (instruction) at the memory location Lookup MAR and get
3 (address) contained in MAR are then copied into the contents. Copy contents
MDR into the MDR
The contents (instruction) in the MDR is then copied and Copy MDR contents into the
4
placed into the CIR (Current Instruction Register) CIR
The value in the PC is then incremented by 1 so that it
5 now points to the next instruction which has to be PC is then incremented by 1
fetched
The instruction is finally decoded and then executed by
The instruction is decoded
6 sending out signals (via control bus) to the various
and then executed
components of the computer
7 Repeat

Fetch and Decode:

 Initially, the program counter PC is loaded with the address of the first instruction in the
program.
 The sequence counter SC is cleared to 0, providing a decoded timing signal T0. After each
clock pulse, SC is incremented by one, so that the timing signals go through a sequence T0,
T1, T2, and so on.
 The microoperations for the fetch and decode phases can be specified by the following
register transfer statements.

 Since only AR is connected to the address

inputs of memory, it is necessary to transfer
the address from PC to AR during the clock
transition associated with timing signal T0. The
instruction read from memory is then placed in
the instruction register IR with the clock
transition associated with timing signal T1.

36
Figure 5-8 shows how the first two register transfer statements are implemented in the bus system.
 To provide the data path for the transfer of PC to AR we must apply timing signal T0 to achieve
the following connection:
i. Place the content of PC onto the bus by making the bus selection inputs S2, S1, S0 equal to
010.
ii. Transfer the content of the bus to AR by enabling the LD input of AR.
 In order to implement the second statement it is necessary to use timing signal T1 to provide the
following connections in the bus system.
i. Enable the read input of memory.
ii. Place the content of memory onto the bus by making S2S1S0=111.
iii. Transfer the content of the bus to IR by enabling the LD input of IR.
iv. Increment PC by enabling the INR input of PC.

 Multiple input OR gates are included in the diagram because there are other control functions that
will initiate similar operations.

Determine the Type of Instruction:

 The timing signal that is active after the decoding is T3.

 During time T3, the control unit determines the type of instruction that was read from the
memory.
 The flowchart of fig.5-9 shows the initial configurations for the instruction cycle and also how
the control determines the instruction cycle type after the decoding.
 Decoder output D7 is equal to 1 if the operation code is equal to binary 111.
 If D7=1, the instruction must be a register-reference or input-output type.
 If D7 = 0, the operation code must be one of the other seven values 000 through 110,
specifying a memory-reference instruction.
 Control then inspects the value of the first bit of the instruction, which is now available in flip-
flop I.
 If D7 = 0 and I = 1, indicates a memory-reference instruction with an indirect address. So it is
then necessary to read the effective address from memory.
 If D7 = 0 and I = 0, indicates a memory-reference instruction with a direct address.
 If D7 = 1 and I = 0, indicates a register-reference instruction.
 If D7 = 01and I = 1, indicates an input-output instruction.
 The three instruction types are subdivided into four separate paths.
 The selected operation is activated with the clock transition associated with timing signal T3.

37
Control Flowchart:
A flowchart showing all microoperations for the execution of the seven memory-reference
instructions is shown in Fig. 5.11.

38
Input-Output and Interrupt:
 Instructions and data stored in memory must come from some input device.
 Computational results must be transmitted to the user through some output device.
 To demonstrate the most basic requirements for input and output communication, we will
use as an illustration a terminal unit with a keyboard and printer.

Input-Output Configuration:
 The terminal sends and receives serial information.
 Each quantity of information has eight bits of an alphanumeric code.
 The serial information from the keyboard is shifted into the input register INPR.
 The serial information for the printer is stored in the output register OUTR.
 These two registers communicate with a communication interface serially and with the AC in
parallel.

39
  The input register INPR consists of eight bits and holds alphanumeric input information.
 The 1-bit input flag FGI is a control flip-flop.
 The flag bit is set to 1 when new information is available in the input device and is cleared
to 0 when the information is accepted by the computer.
 The output register OUTR works similarly but the direction of information flow is reversed.
 Initially, the output flag FGO is set to 1.
 The computer checks the flag bit; if it is 1, the information from AC is transferred in parallel to
OUTR
and FGO is cleared to 0.
 The output device accepts the coded information, prints the corresponding character, and
when the operation is completed, it sets FGO to 1.

Program Interrupt:
 The computer keeps checking the flag bit, and when it finds it set, it initiates an information
transfer.
 The difference of information flow rate between the computer and that of the input—output
device makes this type of transfer inefficient.
 An alternative to the programmed controlled procedure is to let the external device inform
the computer when it is ready for the transfer.
 In the meantime the computer can be busy with other tasks. This type of transfer uses the
interrupt facility.
 While the computer is running a program, it does not check the flags.
 When a flag is set, the computer is momentarily interrupted from the current program.
 The computer deviates momentarily from what it is doing to perform of the input or output
transfer.
 It then returns to the current program to continue what it was doing before the interrupt.
 The interrupt enable flip-flop IEN can be set and cleared with two instructions.
40
 a. When IEN is cleared to 0 (with the IOF instruction), the flags cannot interrupt
the computer.
b. When IEN is set to (with the ION instruction), the computer can be interrupted.
 The way that the interrupt is handled by the computer can be explained by means of the
flowchart of Fig. 5-13.
 An interrupt flip-flop R is included in the computer. When R = 0, the computer goes through
an instruction cycle.
 During the execute phase of the instruction cycle IEN is checked by the control.
 If it is 0, it indicates that the programmer does not want to use the interrupt, so control
continues with the next instruction cycle.
 If IEN is 1, control checks the flag bits. If both flags are 0, it indicates that neither the input nor
the output registers are ready for transfer of information. In this case, control continues with
the next instruction cycle.
 If either flag is set to 1 while IEN = 1, flip-flop R is set to 1. At the end of the execute phase,
control checks the value of R, and if it is equal to 1, it goes to an interrupt cycle instead of an
instruction cycle.

41
Design of Basic Computer
The basic computer consists of the following hardware components:

1. A memory unit with 4096 words of 16 bits each

2. Nine registers: AR, PC, DR, AC, IR, TR, OUTR, INPR, and SC
3. Seven flip-flops: I, S, E, R, lEN, FGI, and FGO
4. Two decoders: a 3 x 8 operation decoder and a 4 x 16 timing decoder.
5. A 16-bit common bus
6. Control logic gates
7. Adder and logic circuit connected to the input of AC

In order to design the logic associated with AC, it is necessary to extract all the statements that
change the content of AC.

42
43