RAVI GROUP TUITION

Subject : computer science

Std : 12th
Section : Paper – II (Hardware) :- Theory(50M)

Chapter 2 : Instruction set & programming of 8085 (35M).

Q.] Explain addressing mode’s of 8085 microprocessor with suitable examples. …..(4M)
Ans : 1) Addressing mode defines data transmission methods such as ,
(i) Register to Register
(ii) Register to memory location
(iii) Memory location to register
2) 8085 microprocessor has five types of addressing modes such as,
(i) Implicit / Implied addressing mode
(ii) Register addressing mode
(iii) Immediate addressing mode
(iv) Direct addressing mode
(v) Register Indirect addressing mode

(i) Implicit / implied addressing mode :

* Instruction : STC
* STC : Set carry flag
* Size : One byte instruction
* Syntax : STC
*Definition : STC instruction is used to create a carry in the program without any arithmetic process

(ii) Register addressing mode :

* Instruction : MOV
* MOV : Move 8-bit data from register to register.
* Size : One byte instruction.
* Syntax : MOV Reg1 , Reg2 [ Reg1  Reg2 ]
* Examples : (i) MOV A,B [AB]
Meaning : An 8-bit data is transfer from register B to register A
(ii) MOV C,D [CD]
(iii) Example with 8-bit data, D = 35H and E = 57H
If, MOV D,E [DE]
Then, D = 57H and E = 57H
 RAVI GROUP TUITION
Subject : computer science
Std : 12th
Section : Paper – II (Hardware) :- Theory(50M)

Chapter 2 : Instruction set & programming of 8085 (35M).

(iii) Immediate addressing mode :
1) * Instruction : MVI
* MVI : Move immediate 8-bit data into register.
* Size : Two byte instruction.
* Syntax : MVI Reg , 8-bit data [ Reg  8-bit data ]
* Examples : (i) MVI C , 25H [ C  25H ] (i.e. C = 25H)
Meaning : An 8-bit data 25H is loaded in register C.
(ii) MVI A , 4AH [ A  4AH ] (i.e. A = 4AH)
(iii) MVI E , 59H [ E  59H ] (i.e. E = 59H)

2) * Instruction : LXI
* LXI : Load immediate 8-bit data from memory location to register pair
* Size : Three byte instruction.
* X : Register Pair
* Syntax : LXI Reg pair , Memory location [ Reg Pair  Memory Location ]
* Examples : (i) LXI H , C050H [ HL  C050H ]
Meaning : The content of C050H is loaded in HL register pair
(ii) LXI B , D090H [ BC  D090H ]
(iii) LXI D , C050H [ DE  F070H ]

(iv) Direct addressing mode :

1) * Instruction : LDA
* LDA : Load accumulator with 8-bit data from memory location.
* Size : Three byte instruction.
* Syntax : LDA Memory location [ A  Memory Location ]
* Examples : (i) LDA C070H [ A  C070H ]
Meaning : Load 8-bit data in accumulator from memory location C070H.
(ii) LDA C045H [ A  C045H ]
 RAVI GROUP TUITION
Subject : computer science
Std : 12th
Section : Paper – II (Hardware) :- Theory(50M)

Chapter 2 : Instruction set & programming of 8085 (35M).

2) * Instruction : STA
* STA : Store 8-bit data in memory location from accumulator.
* Size : Three byte instruction.
* Syntax : STA Memory location [ A → Memory Location ]
* Examples : (i) STA C030H [ A → C030H ]
Meaning : Store 8-bit data in C030H from accumulator.
(ii) STA D090H [ A → D090H ]

3) * Instruction : LHLD
* LHLD : Load registers L and H with 16-bit data from memory locations respectively.
* Size : Three byte instruction.
* Syntax : LHLD Memory location [ L  Memory Location ]
[ H  Memory Location + 1 ]
* Examples : (i) LHLD C075H [ L  C075H ]
[ H  C076H ]
Meaning : Load registers L and H with 16 bit data from C075H & C076H
respectively.
(ii) LHLD C090H [ L  C090H ]
[ H  C091H ]

4) * Instruction : SHLD
* SHLD : Store 16-bit data in memory locations from registers L and H respectively.
* Size : Three byte instruction.
* Syntax : SHLD Memory location [ L → Memory Location ]
[ H → Memory Location + 1 ]
* Examples : (i) SHLD C040H [ L → C040H ]
[ H → C041H ]
Meaning : Store 16-bit data in C040H and C041H from registers L & H respectively.
(ii) SHLD C035H [ L → C035H ]
[ H → C036H ]
 RAVI GROUP TUITION
Subject : computer science
Std : 12th
Section : Paper – II (Hardware) :- Theory(50M)

Chapter 2 : Instruction set & programming of 8085 (35M).

(v) Register indirect addressing mode :

1) * Instruction : MOV
* MOV : Move 8-bit data from register to register.
* Size : One byte instruction.
* Syntax : MOV Reg1 , Reg2 [ Reg1  Reg2 ]
* M = HL register pair
* Examples : (i) MOV A,M [ A  HL ]
Meaning : An 8-bit data transfer from HL register pair to register A.
(ii) MOV M,D [ HL  D ]

2) * Instruction : MVI
* MVI : Move immediate 8-bit data into register.
* Size : Two byte instruction.
* Syntax : MVI Reg , 8-bit data [ Reg  8-bit data ]
* M = HL register pair
* Examples : (i) MVI M , 29H [ HL  29H ] (i.e. HL = 29H)
Meaning : An 8-bit data 29H is loaded in register pair HL.
(ii) MVI M , F3H [ HL  F3H ] (i.e. HL = F3H)
 RAVI GROUP TUITION
Subject : computer science
Std : 12th
Section : Paper – II (Hardware) :- Theory(50M)

Chapter 2 : Instruction set & programming of 8085 (35M).

Q.] Define instruction’s group of 808 programming with suitable example. (3M)
Ans : instruction set of 8085 microprocessor programming is divided in five groups, Such as
1) Data transfer group
2) Arithmetic group
3) Logical group
4) Branching group
5) Machine control / Interrupt control group

1) Data transfer group : (i) In this group, instructions are used to transfer data between ,
Register to Register , Register to memory location & Memory location to
register
(ii) Examples : MOV A , B , LXI H , C050H
STA C040H , XCHG etc….

2) Arithmetic group : (i) In this group, instructions are used to perform arithmetic operations such as,
Addition, Subtraction, Increment and Decrement.
(ii) Examples : ADD B , SUB C , INX H , DCR C etc…

3) Logical group : (i) In this group, Instructions are used to perform logical operations such as,
AND, OR, EX-OR, complement, compare & rotation
(ii) Examples : ANA B , ORI D , XRA M , CMA ,
CMP E , RRC etc…

4) Branching group : (i) In this group, Instructions are used to provide conditional statements and it is
also used to create loop system in 8085 program.
(ii) Examples : JC C005H , JNZ C037H
JPO D009H , JMP F003H etc…

5) Machine control group : (i) In this group, Instructions are used to provide control and maintenance
on execution of program such as , read / write stack, input/output ports
and interrupts etc.
(ii) Examples : PUSH , POP PSW , NOP , RIM
SIM , HLT , RST 1 etc…
 RAVI GROUP TUITION
Subject : computer science
Std : 12th
Section : Paper – II (Hardware) :- Theory(50M)

Chapter 2 : Instruction set & programming of 8085 (35M).

Data Transfer Group :
Sr.
No. Instruction Meaning

1. Syntax MOV Reg1 , Reg2 Reg1  Reg2

MOV A , B A  B
MOV C , A C  A
Examples MOV D , E D  E
MOV M , A HL  A
MOV A , M A  HL

2. Syntax MVI Reg , 8-bit data Reg  8-bit data

MVI A , 00H A  00H

Examples MVI C , 09H C  09H
MVI M , 00H HL  00H

3. Syntax LXI Reg , memory Reg  memory

pair location Pair location

LXI H , C050H HL  C050H

Examples LXI B , C070H BC  C070H
LXI D , C010H DE  C010H

4. Syntax LDA Memory location A  Memory location

LDA C080H A  C080H
Examples
LDA C020H A  C020H
5. Syntax LDAX Reg Pair A  Reg Pair
LDAX B A  BC
Examples
LDAX D A  DE

6. Syntax STA Memory location A → Memory location

STA C090H A → C090H
Examples
STA C040H A → C040H

7. Syntax STAX Reg Pair A → Reg Pair

STAX B A → BC
Examples
STAX D A → DE

L  Memory location
8. Syntax LHLD Memory location
H  Memory location +1

L  C095H
LHLD C095H
H  C096H
Examples
L  C050H
LHLD C050H
H  C051H

Syntax SHLD Memory location L → Memory location

9.
H → Memory location +1

L → C060H
SHLD C060H
H → C061H
Examples
L → C020H
SHLD C020H
H → C021H

Exchange data
10. Syntax XCHG
between HL & DE pair

Example XCHG 
HL → DE
 RAVI GROUP TUITION
Subject : computer science
Std : 12th
Section : Paper – II (Hardware) :- Theory(50M)

Chapter 2 : Instruction set & programming of 8085 (35M).

Arithmetic group :

Sr. Instructions Meanings

No

ADDITION

1. Syntax ADD Reg A + Reg = A

ADD B A + B = A
Examples ADD E A + E = A
ADD M A + HL = A

2. Syntax ADI 8-bit data A + 8-bit data = A

ADI 25H A + 25H = A

Examples
ADI A3H A + A3H = A

3. ADC Reg
Syntax A + Reg + carry = A
ADC E A + E + carry = A
Examples
ADC M A + HL + carry = A

4. Syntax ACI 8-bit data A + 8-bit data + carry = A

ACI 57H A + 57H + carry = A

Examples
ACI F1H A + F1H + carry = A
 RAVI GROUP TUITION
Subject : computer science
Std : 12th
Section : Paper – II (Hardware) :- Theory(50M)

Chapter 2 : Instruction set & programming of 8085 (35M).

Sr. Instructions Meanings

No

SUBTRACTION

1. Syntax SUB Reg A + Reg = A

SUB C A - C = A
Examples SUB A A - A = A
SUB M A - HL = A

2. Syntax SUI 8-bit data A + 8-bit data = A

SUI 45H A - 45H = A

Examples
SUI B3H A - B3H = A

3. SBB Reg
Syntax A + Reg + carry = A
SBB D A - D - borrow = A
Examples
SBB M A - HL + borrow = A

4. Syntax SBI 8-bit data A - 8-bit data - borrow = A

SBI F9H A - F9H - borrow = A

Examples
SBI 67H A - 67H - borrow = A
 RAVI GROUP TUITION
Subject : computer science
Std : 12th
Section : Paper – II (Hardware) :- Theory(50M)

Chapter 2 : Instruction set & programming of 8085 (35M).

Sr. Instructions Meanings

No

INCREMENT

1. Syntax INR Reg Reg = Reg + 1

INR A A = A + 1
Examples INR D D = D + 1
INR M HL = HL + 1

2. Syntax INX Reg pair Reg pair = Reg pair + 1

INX H HL = HL + 1
Examples INX B BC = BC + 1
INX D DE = DE + 1

DECREMENT

1. Syntax DCR Reg Reg = Reg - 1

DCR A A = A - 1
Examples DCR C C = C - 1
DCR M HL = HL - 1

2. Syntax DCX Reg pair Reg pair = Reg pair - 1

DCX H HL = HL - 1
Examples DCX B BC = BC - 1
DCX D DE = DE - 1
 RAVI GROUP TUITION
Subject : computer science
Std : 12th
Section : Paper – II (Hardware) :- Theory(50M)

Chapter 2 : Instruction set & programming of 8085 (35M).

Q.] Load the registers B and C with 8-bit data 02H and 05H respectively. write a program to
perform
addition and store the result in register E.
Ans : Logic : Flowchart :
B  02H
Start
C  05H
A  C
Load Reg B & C with
A+B=A 02H & 05H
E  A
Stop
Moved data from C to A

Output:
A+B=A
Before execution:
Reg B = 02H
Reg B = 02H Store result from A to E

After Execution:
Reg B = 02H Stop

Program :

Mnemonics ; Comments

MVI B , 02H ; Load reg B with 02H

MVI C , 05H ; Load reg C with 05H

MOV A , C ; Transfer data from reg C to A

ADD B ; Addition of A and B

MOV E , A ; store result from reg A to E

RST 1 / HLT ; Reset / ;Stop

 RAVI GROUP TUITION
Subject : computer science
Std : 12th
Section : Paper – II (Hardware) :- Theory(50M)

Chapter 2 : Instruction set & programming of 8085 (35M).

Q.] Write a program to perform addition between two 8-bit data stored in memory locations C030H
and C040H. Store the result in C050H.
Ans : Logic : Flowchart: →
Start
HL  C030H
A  HL
HL  C040H Load HL with C030H &
Transfer in Reg A
B  HL
A+B=A
A → C050H Load HL with C040H &
Stop Transfer in Reg B

Output:
A+B=A
Before Execution:
C030H = 03H
C040H = 06H Store result from A to C050H

After Execution:
C050H = 09H Stop

Program :
Mnemonics ; Comments

LXI H , C030H ; Load HL with C030H

MOV A , M ; Moved data from HL to A

LXI H , C040H ; Load HL with C040H

MOV B , M ; Moved data from HL to B

ADD B ; Addition of A and B

STA C050H ; Store result from A to C050H

RST 1 ; Reset
 RAVI GROUP TUITION
Subject : computer science
Std : 12th
Section : Paper – II (Hardware) :- Theory(50M)

Chapter 2 : Instruction set & programming of 8085 (35M).

Q.] Write a program to perform addition between two memory locations starting from C045H.
Store the result in memory location C050H .

Ans : Logic :
Extra Information :
HL  C045H
A  HL LXI H , C045H [ HL  C045H ]
Increment HL pair i.e. HL = C045H
C  HL if → Increment HL pair
A+C=A HL = HL + 1
A → C050H HL = C045H + 1
Stop then → HL = C046H

Program :
Mnemonics ; Comments

LXI H , C045H ; Load HL with C045H

MOV A , M ; Moved data from HL to A

INX H ; Increment HL pair

MOV C , M ; Moved data from HL to C

ADD C ; Addition of A and C

STA C050H ; Store result from A to C050H

RST 1 ; Reset

Output:
Before Execution:
C045H = 03H
C046H = 04H

After Execution:
C050H = 07H
 RAVI GROUP TUITION
Subject : computer science
Std : 12th
Section : Paper – II (Hardware) :- Theory(50M)

Chapter 2 : Instruction set & programming of 8085 (35M).

Q.] Explain one byte, two byte and three byte instruction formats with suitable
examples.
Ans: Instruction set of 8085 microprocessor is divided in three categories such as,
1) One byte instruction
2) Two byte instruction
3) Three byte instruction

1) One byte instruction :

(i) This instruction uses only registers to perform various operations in 8085 program.
(ii) Direct 8-bit data and 16-bit memory location are not allowed in this instruction.
(iii) This instruction uses only one memory location to store its one byte hexadecimal code,
Therefore it is called as one byte instruction.
(iv) No need to skip any memory location after using one byte instruction in 8085 program.
Examples : MOV A , B
LDAX B
XCHG
ADD C
SUB M
INX H
DCR D etc…

2) Two byte instruction :

(i) This instruction uses registers and 8- bit data to perform various operations in 8085 program.
(ii) Direct 16-bit memory location is not allowed in this instruction.
(iii) This instruction uses only two memory location to store its two byte hexadecimal code,
Therefore it is called as two byte instruction.
(iv) It need to skip one memory location after using two byte instruction in 8085 program.
Examples : MVI C , 05H
ADI 07H
SUI 45H
ACI 39H
SBI A9H etc…
 RAVI GROUP TUITION
Subject : computer science
Std : 12th
Section : Paper – II (Hardware) :- Theory(50M)

Chapter 2 : Instruction set & programming of 8085 (35M).

3) Three byte instruction :
(i) This instruction uses registers and 16-bit memory location to perform various operations
in 8085 program.
(ii) Direct 8-bit data is not allowed in this instruction.
(iii) This instruction uses only three memory location to store its three byte hexadecimal code,
Therefore it is called as three byte instruction.
(iv) It need to skip two memory location after using three byte instruction in 8085 program.
Examples : LXI H , C050H
LDA C050H
STA C090H
LHLD C045H
SHLD C035H etc…

Test : 8085 Programs (10 marks)

Q.] Write a program to perform subtraction between two memory locations starting
from C070H. Store the result in memory location C090H .
(Note : make logic , flowchart , program and output )

Q.] Explain one byte, two byte and three byte instruction formats with suitable
examples.
 RAVI GROUP TUITION
Subject : computer science
Std : 12th
Section : Paper – II (Hardware) :- Theory(50M)

Chapter 2 : Instruction set & programming of 8085 (35M).

Q.] Write a program to perform addition between two memory locations starting from C035H.
Store the result in memory location C050H.
Ans : Logic Basic program structure
HL  C035H LXI H , C035H
A  HL MOV A , M
Increment HL pair INX H
B  HL MOV B , M
A+B=A ADD B
A → C050H STA C050H
Stop RST 1

Program with proper instruction format:

Memory Mnemonics Hex

Location code ; Comments
Opcode Operand
Program C000 LXI H , C035H 21 ; Load HL with C035H →
Address
C001 35
C002 C0
C003 MOV A,M 7E ; Moved data from HL to A
C004 INX H 23 ; Increment HL pair
C005 MOV B,M 46 ; Moved data from HL to B
C006 ADD B 80 ; Addition of A and B
C007 STA C050H 32 ; Store result from A to C050H
C008 50
C009 C0
C00A RST 1 CF ; Reset

Output:
Before Execution: After Execution:
C035H = 03H C050H = 07H
C036H = 04H
 RAVI GROUP TUITION
Subject : computer science
Std : 12th
Section : Paper – II (Hardware) :- Theory(50M)

Chapter 2 : Instruction set & programming of 8085 (35M).

Branching Group :

Q.] Explain conditional instructions / conditional jump instructions with suitable

examples.
(3M / 4M)
Ans : 1) * Instruction : JC
* JC : Jump if carry
* Size : Three byte instruction
* Addressing mode : Direct addressing mode
* Syntax : JC Memory Location
* Examples : JC C005H , JC C007H etc…
* Flowchart symbol :

If
Yes
Carry = 1

No

2) * Instruction : JNC
* JNC : Jump if no carry
* Size : Three byte instruction
* Addressing mode : Direct addressing mode
* Syntax : JNC Memory Location
* Examples : JNC C006H , JNC C009H etc…
* Flowchart symbol :
If
No
Carry = 1

Yes
 RAVI GROUP TUITION
Subject : computer science
Std : 12th
Section : Paper – II (Hardware) :- Theory(50M)

Chapter 2 : Instruction set & programming of 8085 (35M).

3) * Instruction : JZ
* JZ : Jump if zero
* Size : Three byte instruction
* Addressing mode : Direct addressing mode
* Syntax : JZ Memory Location
* Examples : JZ C004H , JZ C007H etc…
* Flowchart symbol :
If
Yes
result = 0

No

4) * Instruction : JNZ
* JNZ : Jump if no zero
* Size : Three byte instruction
* Addressing mode : Direct addressing mode
* Syntax : JNZ Memory Location
* Examples : JNZ C003H , JNZ C004H etc…
* Flowchart symbol :
No
If
result = 0

Yes
 RAVI GROUP TUITION
Subject : computer science
Std : 12th
Section : Paper – II (Hardware) :- Theory(50M)

Chapter 2 : Instruction set & programming of 8085 (35M).

5) * Instruction : JP
* JP : Jump if plus (positive)
* Size : Three byte instruction
* Addressing mode : Direct addressing mode
* Syntax : JP Memory Location
* Examples : JP C004H , JP C009H etc…
* Flowchart symbol :
Yes
If
result = +ve

No

5) * Instruction : JM
* JM : Jump if minus (negative)
* Size : Three byte instruction
* Addressing mode : Direct addressing mode
* Syntax : JM Memory Location
* Examples : JM C003H , JM C002H etc…
* Flowchart symbol :
Yes
If
result = -ve

No
 RAVI GROUP TUITION
Subject : computer science
Std : 12th
Section : Paper – II (Hardware) :- Theory(50M)

Chapter 2 : Instruction set & programming of 8085 (35M).

5) * Instruction : JPE
* JPE : Jump if even parity
* Size : Three byte instruction
* Addressing mode : Direct addressing mode
* Syntax : JPE Memory Location
* Examples : JPE C006H , JPE C004H etc…
* Flowchart symbol :
Yes
If
Even parity

No

5) * Instruction : JPO
* JPO : Jump if odd parity
* Size : Three byte instruction
* Addressing mode : Direct addressing mode
* Syntax : JPO Memory Location
* Examples : JPO C005H , JPO C004H etc…
* Flowchart symbol :
Yes
If
Odd parity

No
 RAVI GROUP TUITION
Subject : computer science
Std : 12th
Section : Paper – II (Hardware) :- Theory(50M)

Chapter 2 : Instruction set & programming of 8085 (35M).

Q.] Explain unconditional instruction / unconditional jump with suitable example. (3M)

Ans : * Instruction : JMP

* JMP : Unconditional Jump
* Size : Three byte instruction
* Addressing mode : Direct addressing mode
* Syntax : JMP Memory Location
* Examples : JPO C003H , JPO C008H etc…
* Definition : (i) JMP instruction has no “if condition”.
(ii) This instruction is used to create the jump in 8085 program
without any condition.
 RAVI GROUP TUITION
Subject : computer science
Std : 12th
Section : Paper – II (Hardware) :- Theory(50M)

Chapter 2 : Instruction set & programming of 8085 (35M).

Q.] Write a program to perform 8-bit addition between two memory location starting from C050H
Store the sum and carry in the memory locations from C070H.
Ans
Memory Mnemonics
Logic : Location Hex
; Comments
Opcode Operand code
C000 MVI D , 00H 16 ; Load 00H in reg D
D  00H
C001 00
HL  C050H C002 LXI H , C050H 21 ; Load HL pair with C050H
C003 50
A  HL
C004 C0
Increment HL pair C005 MOV A,M 7E ; Move data from HL to A
B  HL C006 INX H 23 ; increment HL pair
C007 MOV B,M 46 ; Move data from HL to B
A + B = A
C008 ADD B 80 ; Addition of A and B
No C009 JNC C00DH D2 ; if no carry then jump to
If
C00A 0D C00DH
Carry = 1
yes C00B C0
C00C INR D 14 ; Increment reg D
Increment Reg D
C00D STA C070H 32 ; Store result from A to C070
A → C070H C00E 70

A  D C00F C0
C010 MOV A,D 7A ; Move data from reg D to A
A → C071H
C011 STA C070H 32 ; Store result from A to C071
Stop C012 70
C013 C0
C014 RST 1 CF ; Restart

Output :
Before execution After Execution
C050H = 05H C070H = 07H
C050H = 02H C071H = 00H
 RAVI GROUP TUITION
Subject : computer science
Std : 12th
Section : Paper – II (Hardware) :- Theory(50M)

Chapter 2 : Instruction set & programming of 8085 (35M).

Logical Group of 8085 µp instruction set :
This group of instruction set consist of following logical operations such as ,
AND, OR, EX-OR, complement, Compare, and Rotation
1) AND :
Truth table :
* Instruction : ANA, ANI
A B Y=A.B
* ANA : AND process between A and any register
0 0 0
* ANI : AND immediate process between A and 8-bit data
0 1 0
* Size : (i) ANA is one byte instruction
1 0 0
(ii) ANI is two byte instruction
1 1 1
* Addressing Mode : (i) ANA : Register addressing mode
(ii) ANI : Immediate addressing mode
* Syntax : (i) ANA reg [ A ^ reg = A]
(ii) ANI 8-bit data [ A ^ 8-bit data = A]
* Examples : ANA
(i) ANA D [ A ^ D = A]
(ii) ANA M [ A ^ HL = A]
* Examples : ANI
(i) ANI 45H [ A ^ 45H = A]
(ii) ANI F3H [ A ^ F3H = A]

Example: A = 57H & B = 39H

ANA B [ A ^ D = A]
A = 57H = 0 1 0 1 0 1 1 1
B = 39H = 0 0 1 1 1 0 0 1
------------------------------------------
A = 11H = 0 0 0 1 0 0 0 1

Example: A = 45H
ANI 24 H [ A ^ 24H = A]
A = 45H = 0 1 0 0 0 1 0 1
8-bit data = 24H = 0 0 1 0 0 1 0 0
-----------------------------------------------------
A = 04H = 0 0 0 1 0 1 0 0
 RAVI GROUP TUITION
Subject : computer science
Std : 12th
Section : Paper – II (Hardware) :- Theory(50M)

Chapter 2 : Instruction set & programming of 8085 (35M).

Logical Group of 8085 µp instruction set :
This group of instruction set consist of following logical operations such as ,
AND, OR, EX-OR, complement, Compare, and Rotation
2) OR :
Truth table :
* Instruction : ORA, ORI
A B Y=A+B
* ORA : OR process between A and any register
0 0 0
* ORI : OR immediate process between A and 8-bit data
0 1 1
* Size : (i) ORA is one byte instruction
1 0 1
(ii) ORI is two byte instruction
1 1 1
* Addressing Mode : (i) ORA : Register addressing mode
(ii) ORI : Immediate addressing mode
* Syntax : (i) ORA reg [ A v reg = A]
(ii) ORI 8-bit data [ A v 8-bit data = A]
* Examples : ORA
(i) ORA E [ A v E = A]
(ii) ORA M [ A v HL = A]
* Examples : ORI
(i) ORI 35H [ A v 35H = A]
(ii) ORI A9H [ A v A9H = A]

Example: A = 67H & D = 32H

ORA D [ A v D = A]
A = 67H = 0 1 1 0 0 1 1 1
B = 32H = 0 0 1 1 0 0 1 0
------------------------------------------
A = 77H = 0 1 1 1 0 1 1 1

Example: A = 45H
ORI A7 H [ A v A7H = A]
A = 45H = 0 1 0 0 0 1 0 1
8-bit data = A7H = 1 0 1 0 0 1 1 1
-----------------------------------------------------
A = E7H = 1 1 1 0 0 1 1 1
 RAVI GROUP TUITION
Subject : computer science
Std : 12th
Section : Paper – II (Hardware) :- Theory(50M)

Chapter 2 : Instruction set & programming of 8085 (35M).

Logical Group of 8085 µp instruction set :
This group of instruction set consist of following logical operations such as ,
AND, OR, EX-OR, complement, Compare, and Rotation
3) EX-OR :
Truth table :
* Instruction : XRA, XRI
A B Y=A ¥ B
* XRA : EX-OR process between A and any register
0 0 0
* XRI : EX-OR immediate process between A and 8-bit data
0 1 0
* Size : (i) XRA is one byte instruction
1 0 0
(ii) XRI is two byte instruction
1 1 1
* Addressing Mode : (i) XRA : Register addressing mode
(ii) XRI : Immediate addressing mode
* Syntax : (i) XRA reg [ A ¥ reg = A]
(ii) XRI 8-bit data [ A ¥ 8-bit data = A]
* Examples : XRA
(i) XRA E [ A ¥ E = A]
(ii) XRA M [ A ¥ HL = A]
* Examples : XRI
(i) XRI 45H [ A ¥ 45H = A]
(ii) XRI F3H [ A ¥ F3H = A]

Example: A = 57H & C = 39H

XRA C [ A ¥ C = A]
A = 57H = 0 1 0 1 0 1 1 1
C = 39H = 0 0 1 1 1 0 0 1
------------------------------------------
A = 6EH = 0 1 1 0 1 1 1 0

Example: A = 45H
XRI 57 H [ A ¥ 57H = A]
A = 45H = 0 1 0 0 0 1 0 1
8-bit data = 57H = 0 1 0 1 0 1 1 1
-----------------------------------------------------
A = 12H = 0 0 0 1 0 0 1 0
 RAVI GROUP TUITION
Subject : computer science
Std : 12th
Section : Paper – II (Hardware) :- Theory(50M)

Chapter 2 : Instruction set & programming of 8085 (35M).

Logical Group of 8085 µp instruction set :
This group of instruction set consist of following logical operations such as ,
AND, OR, EX-OR, complement, Compare, and Rotation
4) Complement :
* Instructions : CMA , CMC
* CMA : Complement of accumulator
* CMC : Complement of carry
* Size : Both instructions are one byte instructions
* addressing modes : (i) CMA instruction relate with Register addressing mode
(ii) CMC instruction relate with Implicit addressing mode
* Syntax : (i) CMA (ii) CMC
Examples: CMA : if A = 67H = 0 1 1 0 0 1 1 1
& if we apply CMA instruction on register A (i.e accumulator)
Then we get complement of given binary number
i.e in above binary number “1” replace with “0” and “0” replace with “1”.
So, A = 98H = 1 0 0 1 1 0 0 0
CMC : if carry = 1 → apply CMC → then carry = 0
if carry = 0 → apply CMC → then carry = 1

5) Compare :

* Instructions : CMP , CPI

* CMP : Compare Accumulator with any register
* CPI : Compare immediate Accumulator with 8-bit data
* Size : (i) CMP :- One byte instruction
(ii) CPI :- Two byte instruction
* addressing modes : (i) CMP instruction relate with Register addressing mode
(ii) CPI instruction relate with immediate addressing mode
* Syntax : (i) CMP Reg. [ A < > Reg ]
(i) CPI 8-bit data [ A < > 8-bit data ]
* Examples :

CMP : (i) CMP B [A <> B]

(ii) CMP M [ A < > HL ]

CPI : (i) CPI 29H [ A < > 29H ]

(ii) CPI 4AH [ A < > 4AH ]
 RAVI GROUP TUITION
Subject : computer science
Std : 12th
Section : Paper – II (Hardware) :- Theory(50M)

Chapter 2 : Instruction set & programming of 8085 (35M).

Logical Group of 8085 µp instruction set :
This group of instruction set consist of following logical operations such as ,
AND, OR, EX-OR, complement, Compare, and Rotation
6) Rotation :
* Instructions : RRC , RLC , RAR , RAL
* RRC : Rotate Accumulator right without carry
* RLC : Rotate Accumulator left without carry
* RAR : Rotate Accumulator right with carry
* RAL : Rotate Accumulator left with carry
* Size : All instructions are one byte instructions.
* Addressing mode : Register addressing mode
* Syntax : (i) RRC (ii) RLC (iii) RAR (iv) RAL
* Examples : Assume, A = 45H
(i) RRC
A = 45H = 0 1 0 0 0 1 0 1

RRC
A = A2H = 1 0 1 0 0 0 1 0
------------------------------------------------------------------------------------------------------------------------------------
(ii) RLC
A = 45H = 0 1 0 0 0 1 0 1

RLC
A = 8AH = 1 0 0 0 1 0 1 0
------------------------------------------------------------------------------------------------------------------------------------
(iii) RAR
A = 45H = 0 0 1 0 0 0 1 0 1

RAR

A = 22H = 1 0 0 1 0 0 0 1 0 (Carry is generated in this example)

------------------------------------------------------------------------------------------------------------------------------------
(iv) RAL
A = 45H = 0 0 1 0 0 0 1 0 1

RAR

A = 8AH = 0 1 0 0 0 1 0 1 0 (Carry is not generated in this example)