Here’s a detailed explanation of each topic covered under Unit 1: Semiconductor Physics from the

Electronic Devices syllabus:

1. Quantum Mechanics Review

Purpose: Quantum mechanics forms the basis for understanding the behavior of electrons within
semiconductor materials. Classical mechanics fails to accurately describe phenomena at the atomic level,
such as electron behavior in crystals.

• Wave-Particle Duality: Electrons exhibit properties of both particles and waves. This duality is
explained by quantum mechanics, and its implications are critical in understanding electron transport
within semiconductors.

• de Broglie Wavelength: The wavelength associated with an electron is inversely proportional

to its momentum. This helps explain electron diffraction and behavior at small scales.

• Heisenberg’s Uncertainty Principle: It states that the position and momentum of an electron
cannot both be precisely known at the same time. This limitation highlights the probabilistic nature of
electron locations and energy states in a material.

• Quantum States and Energy Levels: Electrons can exist only at discrete energy levels within
atoms. When these atoms come together to form a solid, these discrete levels spread out into bands
(explained later).

2. Electrons in Periodic Lattices

Definition: In a semiconductor crystal lattice, atoms are arranged periodically. This periodic structure
affects electron motion due to periodic potential fields created by the atomic nuclei.

• Band Formation: The overlapping of electron orbitals in adjacent atoms leads to the formation
of energy bands.

• Conduction Band: Contains higher energy states, and electrons here are free to move within the
lattice, contributing to conduction.

• Valence Band: The band just below the conduction band, occupied by electrons that are bound
to atoms.

• Band Gap: The energy difference between the valence and conduction bands. Electrons must
gain enough energy to jump from the valence band to the conduction band for conduction to occur.

• e-k Diagrams (Energy-Momentum Relationship):

• e-k diagrams depict the relationship between the energy (E) of electrons and their wavevector
(k). These diagrams help visualize allowed energy levels and the movement of electrons in a
semiconductor.

• When an electric field is applied, the electrons change their momentum, leading to a change in
their energy. This is crucial in understanding their transport properties.

3. Energy Bands in Intrinsic and Extrinsic Silicon

Intrinsic Silicon:
 • Definition: Pure silicon without any impurities.

• Behaviour: At absolute zero, the valence band is fully occupied, and the conduction band is
empty. As temperature increases, thermal energy allows some electrons to cross the band gap into the
conduction band, creating electron-hole pairs.

• Electrical Conductivity: Intrinsic silicon has relatively low conductivity as there are limited
free charge carriers (electrons in the conduction band and holes in the valence band).*-

Extrinsic Silicon:

• Definition: Silicon doped with impurities to increase conductivity. Doping introduces additional
free charge carriers.

• Types of Doping:

• n-type: Created by doping silicon with elements like phosphorus or arsenic (Group V elements).
These elements have an extra electron that becomes a free carrier, contributing to conduction.

• p-type: Created by doping with elements like boron (Group III). These atoms create “holes” or
vacant electron states, which can act as positive charge carriers.

• Effects of Doping: Doping significantly increases the conductivity of silicon by increasing the
number of free carriers.

4. Diffusion and Drift Currents

Diffusion Current:

• Description: Occurs due to a concentration gradient of carriers. When there is a difference in

carrier concentration across a region, carriers move from high to low concentration areas.

• Mathematical Description: The diffusion current density is proportional to the concentration

gradient of carriers:

where is the charge, is the diffusion coefficient, and is the concentration gradient.

Drift Current:

• Description: Caused by the movement of carriers in response to an applied electric field. The
electric field exerts a force on the charge carriers, causing them to move.

• Mathematical Description: The drift current density is given by:

where is the mobility of the carriers, is the number of carriers, and is the electric field.

Combined Effect: The total current density in a semiconductor is the sum of the drift and diffusion
currents. These effects are critical in understanding the behavior of carriers in devices such as diodes
and transistors.

5. Mobility and Resistivity

Mobility ():
 • Definition: Describes how quickly charge carriers (electrons or holes) move through a material
when subjected to an electric field.

• Factors Affecting Mobility:

• Temperature: Increased thermal vibrations reduce mobility by scattering carriers.

• Impurity Concentration: Doping introduces impurity scattering, affecting mobility.

• Relation with Conductivity: Mobility is directly related to conductivity, as higher mobility

leads to more efficient carrier movement.

Resistivity ():

• Definition: A measure of how strongly a material opposes the flow of electric current.

• Formula: The resistivity of a material is inversely proportional to its conductivity ():

where , with being the carrier concentration.

• Doping Impact: Adding impurities (doping) reduces resistivity by increasing the number of
charge carriers.

6. Sheet Resistance
Definition:

• Sheet resistance is a measure of resistance of thin films of uniform thickness. It is particularly

useful for characterizing resistive layers in semiconductor processing.

• Units: Measured in ohms per square ().

Calculation:

• The resistance of a square of the material is the same regardless of its size, provided the
thickness remains constant. This makes it a valuable metric for characterizing resistive elements in
integrated circuits.

Applications:

• Used extensively in characterizing layers in microelectronics, particularly thin film resistors and
semiconductor materials.

7. Resistor Design in Semiconductors

Purpose:

• Resistors are integral components in circuits, used to limit current, divide voltages, and provide
biasing for transistors.

Design Considerations:
 • Doping Levels: The resistivity and sheet resistance of a resistor are controlled by adjusting the
doping concentration during fabrication.

• Geometry: Length, width, and thickness of the resistor determine its overall resistance, as given
by:

where is the length, is the cross-sectional area, and is the resistivity.

Challenges:

• Ensuring uniform doping and consistent thickness is critical for reliable resistor behavior within
integrated circuits.

This concludes the detailed explanation of Unit 1. If you need further elaboration or examples for any
specific topic, please let me know!

Here are detailed notes for Unit 2: Diodes, designed for exam preparation. Each concept is
explained with definitions, properties, and applications to help you understand clearly.

1. Generation and Recombination of Carriers

• Generation of Carriers:
o When thermal energy or light excites an electron in the valence band, it
jumps to the conduction band, leaving a hole behind.
o This process creates electron-hole pairs (EHPs) in semiconductors.
o Happens due to thermal energy or light (photoelectric effect).
• Recombination of Carriers:
o When a free electron recombines with a hole, it results in energy release
(usually as heat or light).
o Types:
▪ Radiative recombination: Releases light (e.g., LEDs).
▪ Non-radiative recombination: Releases heat.

2. Poisson and Continuity Equation

• Poisson Equation:
 o Relates the electric field (EE) to the charge density (ρ\rho):
∇2V=−ρϵ\nabla^2 V = -\frac{\rho}{\epsilon} Where VV is potential, ρ\rho
is charge density, and ϵ\epsilon is permittivity.
o Used to analyze electric fields in p-n junctions.
• Continuity Equation:
o Describes the conservation of charge in a semiconductor:
∂p∂t+∇⋅Jp=G−R\frac{\partial p}{\partial t} + \nabla \cdot J_p = G - R
Where:
▪ pp: Hole concentration.
▪ JpJ_p: Current density of holes.
▪ GG: Generation rate.
▪ RR: Recombination rate.
o Ensures the balance between carrier generation and recombination.

3. p-n Junction Characteristics

• Formation:
o When a p-type material (excess holes) and n-type material (excess
electrons) are joined, electrons diffuse to the p-side and holes to the n-side,
creating a depletion region.
o Depletion Region: Region around the junction with no mobile carriers, only
immobile ions.
• V-I Characteristics:
o Forward Bias:
▪ Reduces the barrier potential, allowing current to flow.
▪ Current increases exponentially with voltage.
o Reverse Bias:
▪ Increases the barrier potential, blocking current flow (except leakage
current).
▪ At high reverse voltage, breakdown occurs.

4. Small Signal Switching Models

• Small Signal Model:
o Used to analyze diodes in AC signals.
 o The diode is represented as a combination of:
▪ Resistance (rdr_d): Represents dynamic resistance.
▪ Capacitance (CjC_j ): Accounts for junction capacitance.
• Switching Model:
o Represents the diode's behavior during ON/OFF transitions.

5. Breakdown Mechanisms

Avalanche Breakdown:

• Cause: High reverse voltage accelerates carriers, causing collisions and generating
more carriers.
• Occurs in: Lightly doped junctions with a wide depletion region.
• Applications: High-voltage rectifiers.

Zener Breakdown:

• Cause: Strong electric fields in a heavily doped junction pull electrons out of their
bonds.
• Occurs in: Heavily doped junctions with a narrow depletion region.
• Applications: Voltage regulation.

6. Special Diodes

Zener Diode:

• Purpose: Operates in reverse breakdown to maintain a constant voltage.

• Application: Voltage regulators.

Schottky Diode:

• Construction: Metal-semiconductor junction.

• Features: Low forward voltage drop, fast switching.
• Applications: High-speed circuits.
Light Emitting Diode (LED):

• Mechanism: Radiative recombination emits photons (light).

• Materials: GaAs, GaP.
• Applications: Indicators, displays.

Tunnel Diode:

• Features: Operates due to tunneling effect in heavily doped junctions.

• Applications: High-frequency oscillators and amplifiers.

Varactor Diode:

• Purpose: Acts as a variable capacitor.

• Application: Tuned circuits like radios and TVs.

Solar Cell:

• Mechanism: Converts sunlight into electricity using the photovoltaic effect.

• Application: Renewable energy systems.

7. Rectifier and Regulator Circuits

Rectifiers:

• Convert AC to DC.

Half-Wave Rectifier:

• Allows current to pass during one half of the AC cycle.

• Efficiency: 40.6%.
• Disadvantage: Produces a pulsating DC output.

Full-Wave Rectifier:

• Allows current to flow during both halves of the AC cycle.

• Efficiency: 81.2%.
 • Types:
o Center-Tapped Full-Wave Rectifier.
o Bridge Rectifier.

Regulator Circuits:

• Maintain a constant output voltage despite input voltage or load variations.

Zener Regulator:

• Uses a Zener diode to stabilize the output voltage.

IC Regulators:

• Integrated circuits like LM7805 for fixed voltage regulation.

If you need diagrams or further examples, let me know!

Here are detailed, exam-focused notes on Unit 3: Transistors with explanations of each
topic. I’ll also recommend related topics at the end.

1. Bipolar Junction Transistor (BJT)

Definition:

A BJT is a semiconductor device that amplifies current or switches signals. It has three
regions: Emitter (E), Base (B), and Collector (C).

• Types:
 o NPN Transistor: Majority carriers are electrons.
o PNP Transistor: Majority carriers are holes.

Working Principle:

• The emitter injects carriers into the base, and the collector collects these carriers.
• A small base current controls a larger emitter-to-collector current.

2. V-I Characteristics of BJT

• Input Characteristics: Shows the relation between base current (IBI_B) and base-
emitter voltage (VBEV_{BE}) for a fixed collector-emitter voltage (VCEV_{CE}).
o Resembles a forward-biased diode.
• Output Characteristics: Shows the relation between collector current (ICI_C) and
collector-emitter voltage (VCEV_{CE}) for various IBI_B.
o Regions:
▪ Cutoff Region: Transistor OFF (IC=0I_C = 0).
▪ Active Region: Transistor amplifies (IC∝IBI_C \propto I_B).
▪ Saturation Region: Transistor fully ON (ICI_C is maximum).

3. Ebers-Moll Model

Definition:

A mathematical model that explains the behavior of BJTs in all operating regions. It treats
the transistor as two coupled diodes (base-emitter and base-collector).

• Key Equations: IE=IE0(eVBEVT−1)−αRIC0(eVBCVT−1)I_E =

I_{E0}(e^{\frac{V_{BE}}{V_T}} - 1) - \alpha_R I_{C0}(e^{\frac{V_{BC}}{V_T}} - 1)
IC=αFIE0(eVBEVT−1)−IC0(eVBCVT−1)I_C = \alpha_F
I_{E0}(e^{\frac{V_{BE}}{V_T}} - 1) - I_{C0}(e^{\frac{V_{BC}}{V_T}} - 1) Where:
o IEI_E: Emitter current.
o ICI_C: Collector current.
o αF\alpha_F: Forward common-base current gain.
o αR\alpha_R: Reverse common-base current gain.
4. Transistor Configurations

Common Emitter (CE):

• Input: Base-emitter junction.

• Output: Collector-emitter junction.
• Applications: Amplifiers, switches.

Common Base (CB):

• Input: Emitter-base junction.

• Output: Collector-base junction.
• Applications: High-frequency amplifiers.

Common Collector (CC):

• Input: Base-emitter junction.

• Output: Emitter-collector junction.
• Applications: Impedance matching.

5. MOS Capacitor

Definition:

A MOS (Metal-Oxide-Semiconductor) capacitor consists of a metal gate, oxide layer, and

semiconductor substrate. It forms the basic structure of a MOSFET.

• Modes of Operation:
o Accumulation: Negative gate voltage attracts holes to the surface.
o Depletion: Small positive gate voltage repels holes, creating a depletion
region.
o Inversion: Higher positive voltage attracts electrons, creating an inversion
layer.
6. MOSFET (Metal-Oxide-Semiconductor Field-Effect
Transistor)

Construction and Working:

• Structure: Consists of a source, gate, drain, and body (substrate).

• Working Principle:
o Voltage at the gate controls the current flow between source and drain.

7. I-V Characteristics of MOSFET

• Regions of Operation:
o Cutoff Region: Gate-source voltage (VGSV_{GS}) < Threshold voltage
(VthV_{th}). No current flows.
o Linear/Ohmic Region: VGS>VthV_{GS} > V_{th} and VDSV_{DS} is small. The
MOSFET acts like a resistor.
o Saturation Region: VGS>VthV_{GS} > V_{th} and VDSV_{DS} exceeds a
critical value. The MOSFET acts as a constant current source.
• Drain Current Equation (Saturation Region):

ID=μnCox2WL(VGS−Vth)2I_D = \frac{\mu_n C_{ox}}{2} \frac{W}{L} (V_{GS} - V_{th})^2

Where:

o μn\mu_n: Mobility of electrons.

o CoxC_{ox}: Oxide capacitance.
o W/LW/L: Width-to-length ratio of the channel.

8. Types of MOSFETs

Depletion-Type MOSFET:

• Channel Presence: Conducts even at VGS=0V_{GS} = 0.

• Operation: Gate voltage depletes the channel to reduce current.
• Applications: Used in constant current sources.
Enhancement-Type MOSFET:

• Channel Presence: No channel at VGS=0V_{GS} = 0.

• Operation: Gate voltage enhances the channel to allow current.
• Applications: Widely used in digital circuits and amplifiers.

Recommended Topics Related to This Unit

1. Biasing of Transistors: Study methods like fixed bias, collector-to-base bias, and
voltage-divider bias.
2. Amplifiers: Explore CE, CB, and CC amplifiers and their gain, input/output
impedances.
3. Power Transistors: Characteristics and applications of transistors in high-power
systems.
4. Field-Effect Transistors (FETs): Differences between BJTs and FETs, JFET basics.
5. Transistor Applications: Switches, amplifiers, oscillators, and digital logic gates.

Let me know if you need further clarification or additional diagrams!

Here are detailed and exam-oriented notes on Unit 4: Fabrication Processes, with
explanations for each topic.

1. Oxidation

Definition:

Oxidation is a process where a silicon wafer is exposed to oxygen or water vapor to form a
thin layer of silicon dioxide (SiO2SiO_2) on its surface.
 • Purpose:
o Acts as an insulating layer.
o Protects the silicon from contamination.
o Serves as a mask for diffusion or ion-implantation.
• Types of Oxidation:
o Thermal Oxidation:
▪ Dry Oxidation: Uses oxygen gas (O2O_2), forms a thin, high-quality
oxide.
▪ Wet Oxidation: Uses water vapor (H2OH_2O), forms a thicker oxide
layer.
o Plasma Oxidation:
▪ Uses a plasma to enhance oxidation at lower temperatures.
• Key Reaction (Dry Oxidation):

Si+O2→SiO2Si + O_2 \rightarrow SiO_2

2. Diffusion

Definition:

Diffusion is the process of introducing impurities (dopants) into a silicon wafer to change
its electrical properties.

• Mechanism: At high temperatures, dopants diffuse into silicon via random motion.
• Dopants:
o n-type: Phosphorus (PP), Arsenic (AsAs).
o p-type: Boron (BB).
• Process:
o Pre-deposition: A fixed amount of dopant is deposited on the wafer surface.
o Drive-in: The dopants diffuse deeper into the wafer at high temperature.
• Applications:
o Formation of p-n junctions.
o Adjusting resistivity.
3. Ion-Implantation

Definition:

A process where ions are accelerated and implanted into the silicon wafer to precisely
control doping.

• Advantages over Diffusion:

o High precision in dopant placement.
o Operates at room temperature.
• Process:
o Dopant ions are generated (e.g., B+B^+, P+P^+).
o Ions are accelerated to high energies.
o Ions are implanted into the silicon substrate.
• Applications:
o Fabricating MOSFETs and integrated circuits.

4. Annealing

Definition:

A heat treatment process to repair damage caused by ion-implantation and activate

dopants.

• Purpose:
o Recrystallizes damaged silicon lattice.
o Diffuses dopants slightly for uniform distribution.
• Temperature: Ranges between 600°C to 1000°C depending on the material and
process.
5. Photolithography

Definition:

Photolithography is a patterning process used to transfer geometric patterns from a mask

onto a silicon wafer.

• Process Steps:
o Surface Preparation: Wafer cleaning and oxidation.
o Photoresist Application: A light-sensitive material (photoresist) is applied.
o Mask Alignment: A mask with the desired pattern is aligned on the wafer.
o Exposure: UV light is shined through the mask, exposing parts of the
photoresist.
o Development: The exposed photoresist is removed (positive resist) or
hardened (negative resist).
o Etching: The pattern is etched into the wafer.
• Applications:
o Patterning circuits in IC fabrication.

6. Etching

Definition:

Etching removes unwanted material from the wafer surface to create patterns.

• Types:
o Wet Etching:
▪ Uses liquid chemicals to dissolve the material.
▪ Example: Hydrofluoric acid (HFHF) for silicon dioxide removal.
o Dry Etching:
▪ Uses plasma or reactive gases to etch the material.
▪ Example: Reactive Ion Etching (RIE).
• Applications:
o Pattern transfer during fabrication.
7. Chemical Vapor Deposition (CVD)

Definition:

CVD is a process that deposits a thin film of material onto a substrate through chemical
reactions of gaseous precursors.

• Process:
o Reactant gases (e.g., silane, SiH4SiH_4) are introduced.
o A chemical reaction occurs on the heated substrate, forming a solid film.
• Types of CVD:
o Thermal CVD: Uses heat to drive the reaction.
o Plasma-Enhanced CVD (PECVD): Uses plasma for lower temperature
processing.
• Applications:
o Depositing insulating layers (SiO2SiO_2) or conductive layers (polysilicon).

8. Sputtering

Definition:

Sputtering is a physical vapor deposition (PVD) process that deposits thin films by ejecting
material from a target using high-energy ions.

• Process:
o A plasma is created in a vacuum chamber.
o Ions bombard the target material, ejecting atoms.
o The ejected atoms deposit onto the substrate.
• Applications:
o Coating metals like aluminum or titanium on semiconductor wafers.
9. Twin-Tub CMOS Process

Definition:

A fabrication technique used to create CMOS (Complementary Metal-Oxide-

Semiconductor) devices with n-well and p-well regions.

• Steps:
o Twin wells (n-well and p-well) are created using doping.
o MOS transistors (nMOS and pMOS) are fabricated in their respective wells.
o Oxidation, photolithography, and etching are used for patterning.
o Metal layers are added for interconnections.
• Advantages:
o Allows for high integration density.
o Reduces power consumption.

Recommended Related Topics:

1. Planar Technology: Basics of how integrated circuits are fabricated on flat silicon
wafers.
2. Epitaxy: Growing a crystalline silicon layer over a substrate.
3. Chemical Mechanical Polishing (CMP): Used to smooth the wafer surface.
4. Metal Interconnections: Processes for creating metal connections in ICs.
5. Device Isolation: Techniques like LOCOS or STI for isolating transistors.

If you need diagrams or deeper explanations for specific steps, let me know!