Unit Ii
Unit Ii
Floating-Point
Feature Fixed-Point Representation
Representation
Represents numbers with a fixed Represents numbers using a
Definition number of bits for the integer and scientific notation format with
fractional parts. a sign, exponent, and mantissa.
Capable of representing very
Limited to a smaller range due to
large or very small numbers
Range of Values fixed allocation of bits for integers
because of the variable
and fractions.
exponent.
Fixed precision determined by the Variable precision based on
Precision
number of fractional bits. the size of the mantissa.
More complex arithmetic
Simpler arithmetic operations; operations; often requires
Complexity
requires no special hardware. specialized hardware (e.g.,
FPU).
Example: Binary number Example: −1.101×210-1.101
Representation 1101.01011101.0101 (fixed \times 2^{10} (scientific
position of the decimal point). notation in binary).
Can be implemented on simpler Requires dedicated hardware
Hardware
hardware; lower power for efficient computation (e.g.,
Requirements
consumption. floating-point units).
More storage space needed due
Storage Efficient for applications requiring
to exponent and mantissa
Efficiency consistent precision.
components.
Used in scientific
Used in embedded systems, digital computations, graphics
Use Cases signal processing (DSP), and processing, and applications
systems with real-time constraints. requiring a wide dynamic
range.
Slower compared to fixed-
Arithmetic Faster for basic arithmetic due to
point due to handling of
Speed simpler computation.
exponent and normalization.
Precision errors may occur if the Can introduce rounding errors
Error Handling
range exceeds the fixed format. due to finite mantissa size.
Ease of Easier to program when precision Requires more attention to
Programming and range are well-defined. precision and rounding issues.
It consists of a memory array and logic form words with n bits per word.
The argument register A and key register K each have n bits, one for each bit of a
word.
The match register M has m bits, one for each memory word.
Each word in memory is compared in parallel with the content of the argument
register.
The words that match the bits of the argument register set a corresponding bit in the
match register.
After the matching process, those bits in the match register that have been set indicate
the fact that their corresponding words have been matched.
Reading is accomplished by a sequential access to memory for those words whose
corresponding bits in the match register have been set.