Chapter 4 Processor Fundamentals

Chapter: 4 Processor Fundamentals

4.1 Central Processing Unit (CPU) Architecture
Von Neumann Model
The model von Neumann described has the following basic features.
• There is a processor - the central processing unit (CPU).
• The processor has direct access to memory.
• The memory contains a ‘stored program’ (which can be replaced by another at any time)
and the data required by the program.
• The stored program consists of individual instructions.
• The processor executes instructions sequentially.

Central processing Unit (C.P.U)

The main component of the computer system which performs all the functions.
The two components of the CPU that have an active role in its operation are the arithmetic and logic unit (ALU) (or
Arithmetic Logic Unit) and the control unit.
Control unit (C.U)
CU is responsible to the fetch, decode and execute program instructions. It also is controlling the flow of data
throughout the processor and the rest of the computer system. Another is ensuring that program instructions are
handled correctly.

Arithmetic and control unit (A.L.U)

ALU is responsible for the arithmetic or logic processing requirements of the instructions in a running program.

Clock
A vital part of the control unit is a clock that is used by the unit to synchronise processes.
The CPU will have a defined frequency for its clock cycle, which is usually referred to as the
clock speed. The frequency defines the minimum period of time that separates successive
There are two clocks.

Internal clock
It controls the cycles of activity within the processor.

System clock
It controls the cycles activities outside the processor. The clock cycle is the one controlled by the system clock
which will have settings that allow one data transfer from memory to take place in the time defined for one cycle.

SAHIR MASROOR KHAN 03009543074 1

Chapter 4 Processor Fundamentals

Figure 4.1 A schematic diagram of the architecture of a simple CPU

Registers
The other components of the CPU are the registers. These are storage components which, because they are placed
very close to the ALU, allow very short access times. Each register has limited storage capacity, typically 16, 32 or
64 bits.

Types of registers
A register is either general purpose or special purpose.

General-purpose register (Accumulator)

A general-purpose register that stores a value before and aft er the execution of an instruction by the ALU

The Accumulator is used to store a single value at any one time. A value is stored in the Accumulator that is to be used by the
ALU for the execution of an instruction.

The ALU can then store a different value in the Accumulator after the execution of the instruction.

Special purpose registers

Registers which are responsible for performing a specific task within the processor.

SAHIR MASROOR KHAN 03009543074 2

Chapter 4 Processor Fundamentals

Note:
The first is that the MDR must act as a buffer. This is because transfers of data inside the processor take place
much more quickly than transfers outside the processor.

For all of the special-purpose registers, except for the status register, the contents represent one value. For the
status register each individual bit is used as a logical flag. The bit is set to 1 if a condition is detected.

Examples are the carry flag, the negative flag and the overflow flag.

The system buses

A bus is a parallel transmission component with each separate wire carrying a single bit. A bus does not hold data.
It is a mechanism for data to be transferred from one system component to another.

There will be buses inside the CPU. These are not considered here. The system bus connects the CPU to the
memory and to the I/O system.

Types of system buses

The address bus is connected to the MAR; the data bus to the MDR; and the control bus to the control unit.

The system bus allows data flow between the CPU, the memory and input or output (I/O) devices.

The address bus

Address bus: a component that carries an address. This can be to the memory controller to identify

a location in memory which is to be read from or written to or it can be to the I/O system to identify the

source or destination of the data

The sole function of the address bus is to carry an address. This address is loaded on to the bus from the MAR as
and when directed by the control unit. The address specifies a location in memory or an I/O component which is
due to receive data or from which data is to be read.

SAHIR MASROOR KHAN 03009543074 3

Chapter 4 Processor Fundamentals

The address bus is a unidirectional. It can only be used to send an address to a memory controller or an I/O
controller. It cannot be used to carry an address back to the CPU.

The data bus

Data bus: a component that can carry data from the processor to the memory or to an output device or
can carry data from the memory or from an input device
The function of the data bus is to carry data. This might be an instruction, an address or a value. The data bus is
two-way (bidirectional): it might be carrying data from the CPU to the memory or carrying data to the CPU.
However, another option is to carry data to or from an I/O device.

The control bus

The control bus is another bidirectional bus which transmits a signal from the control unit to any other system
component or transmits a signal to the control unit. There is no need for extended width, so the control bus
typically has just eight wires. A major use of the control bus is to carry timing signals. The system clock in the
control unit defines the clock cycle for the computer system. The control bus carries timing signals at time intervals
dictated by the clock cycle. This ensures that the time that one component transmits data is synchronised with the
time that another component reads it.

Factors contributing to system performance

• the bus width

• clock speed

• cache memory

Clock speed
The processor clock speed could be a very important factor governing the processing speed of the system. This is
because one clock cycle defines the shortest possible time that any action can take. Actually, none of the
components outside of the processor can work anywhere near as fast as the processor can. The components that
are directly addressable by the processor, which can be referred to as the immediate access store (IAS), can only
accept data from or provide data to the processor at speeds much slower than the processor speed.

Processor type and number of cores

One example of this complexity is that the CPU chip or integrated circuit will be multi-core. Each core is a separate
processor. Performance improves with increasing number of cores.

Cache memory
Cache memory is the fastest component of the IAS. Performance improves with increased storage size for the
cache and with increased rate of access. Fastest access is obtained by having all or part of the cache on the CPU
chip.

Word
A small number of bytes that can be handled as a unit by the computer system
Typical word lengths are 16, 32 or 64 bits; that is, 2, 4 or 8 bytes, respectively. The word length will influence the
system architecture design in regard to the capacity of the components. For example, it is usual for the size of

SAHIR MASROOR KHAN 03009543074 4

Chapter 4 Processor Fundamentals

registers to match the word length. Word length also has to be considered when making decisions about bus
widths.

Address bus width

For the address bus, the bus width defines the number of bits in the address’s binary code. A bus width of 16 bits,
allowing 65 536 memory locations to be directly addressed. Such a memory size would, of course, be totally
inadequate for a modern computer system. Even doubling the address bus width to 32 bits would only allow direct
addressing of a little over four billion addresses.

Data bus Width

Bus width is also affecting the system performance. The data bus width is ideally the same as the word length. If
this is not possible, the bus width can be half the word length so that a full word can be transmitted by two
consecutive data transfers. Clearly the performance of the system is affected if the latter case applies.

I/O ports
Each I/O device is connected to an interface called a port. Each port is connected to the I/O or device controller. This controller
handles the interaction between the CPU and an I/O device. A port is described as ‘internal’ if the connected I/O device is an
integral part of the computer system. An external port allows the computer user to connect a peripheral I/O device.

Plug and play

The aim of the plug-and-play concept was to remove the need for technical knowledge so that any computer user could
connect a peripheral and start using it straight away.

The Universal Serial Bus (USB)

A universal standard most commonly used port. The standard that is used to connect peripheral devices to a computer. Used to
connect keyboard, mouse, printer, scanner, mics and cell phones

The following is some information about the USB standard.

The computer is at the root of this hierarchy and can handle 127 attached devices.

Devices can be attached while the computer is switched on and are automatically configured.

Provide fast transfer rate. (e.g., 40 Gbit / second.)

Supplies power to certain devices. (Cell phones).

Specialised multimedia ports

Video Graphics Array (VGA) port
Short for Video Graphics Adapter or Video Graphics Array, VGA is a popular display standard developed by IBM and introduced
in 1987. VGA provides 640 x 480 resolution color display screens with a refresh rate of 60 Hz and 16 colors displayed at a time.
If the resolution is lowered to 320 x 200, 256 colors are shown. VGA port has 15 pins arranged in three rows. Only carries
analog data. The VGA connector is used for display devices and is used to connect a computer to a monitor, projector, or TV.

SAHIR MASROOR KHAN 03009543074 5

Chapter 4 Processor Fundamentals

High-Definition Multimedia Interface (HDMI) port

High-Definition Multimedia Interface, HDMI is a connector and cable capable of transmitting high-quality and high-
bandwidth streams of audio and video between devices. Originally designed for transmitting uncompressed video
and audio. Newer versions have the ability to send and receive data over ethernet networks. Has ability to send
high resolution videos with a high refresh rate.

The HDMI technology is used with devices such as an HDTV, Projector, DVD player, or Blu-ray player.

The fetch–execute (F–E) cycle

The full name for this is the fetch, decode and execute cycle. This is illustrated by the flowchart.

SAHIR MASROOR KHAN 03009543074 6

Chapter 4 Processor Fundamentals

If we assume that a program is already running, then the program counter will already hold the address of the next
instruction. In the fetch stage, the following steps will now happen.

1 This address in the program counter is transferred within the CPU to the MAR.

2 During the next clock cycle two things happen simultaneously:

• the instruction held in the address pointed to by the MAR is fetched into the MDR

• the address stored in the program counter is incremented.

3 The instruction stored in the MDR is transferred within the CPU to the CIR.

There are two points to note here.

• However, the instruction just loaded might be a jump instruction. In this case, the program counter contents will
have to be updated in accordance with the jump condition. This can only happen after the instruction has been
decoded.

In the decode stage, the instruction stored in the CIR is received as input by the circuitry within the control unit.
Depending on the type of instruction, the control unit will send signals to the appropriate components so that the
execute stage can begin. At this stage, the ALU will be activated if the instruction requires arithmetic or logic
processing.

Register transfer notation

Operations involving registers can be described by register transfer notation. A simple example of this is a
representation of the fetch stage of the fetch–execute cycle:

MAR ← [PC]

PC ← [PC] + 1

MDR ← [[MAR]]

CIR ← [MDR]

Decode

Execute

Note:

Square brackets around a register abbreviation show that the content of the register is being moved. This
movement might also include an arithmetical operation. When two data operations are placed on the same line
separated by a semi-colon, this means that the two transfers take place simultaneously. The double pair of
brackets around MAR on the second line needs careful interpretation. The content of the MAR is an address; it is
the content of that address which is being transferred to the MDR.

SAHIR MASROOR KHAN 03009543074 7

Chapter 4 Processor Fundamentals

Interrupt handling
There are many different reasons for an interrupt to be generated. Some examples are:

• a fatal error in a program

• a hardware faults

• a need for I/O processing to begin

• user interaction

• a timer signals.

Different interrupts might have different priorities. Therefore, the processor must have a means of identifying the
type of interrupt. One way is to have an interrupt register.

Interrupt register

Interrupt register has bits to represent different type of interrupts, with each individual bit operating as
a flag for a specific type of interrupt. The existence of an interrupt is only detected at the end of a fetch–
execute cycle. This allows the current program to be interrupted and left in a defined state which can be
returned to later.
An interrupt is handled by the following steps.

• The contents of the program counter and any other registers are stored somewhere safe in memory (for example
Stack)

• The appropriate interrupt handler or Interrupt Service Routine (ISR) program is initiated by loading its start
address into the program counter.

• When the ISR program has been executed there is an immediate check to see if further interrupts need handling.

• Further interrupts are dealt with by repeated execution of the ISR program.

• If there are no further interrupts, the safely stored contents of the registers are restored to the CPU and the
originally running program is resumed.

4.2 Assembly language

Machine code instructions
• The only language that the CPU recognises is machine code.

• Machine code consists of a sequence of instructions. i.e. 00010101 00001111

• An instruction contains an opcode.

• An instruction may not have an operand but up to three operands are possible.

• Different processors have different instruction sets associated with them.

• Different processors will have comparable instructions for the same operations, but the

SAHIR MASROOR KHAN 03009543074 8

Chapter 4 Processor Fundamentals

coding of the instructions will be different.

For a particular processor, the following must be defined for each individual machine code

instruction:

• the total number of bits or bytes for the whole instruction

• the number of bits that define the opcode

• the number of operands that are defined in the remaining bits

• whether the opcode occupies the most significant or the least significant bits.

We will consider a simple system where there is either one or zero operands. This simple

system will be assumed to have a 16-bit address bus width. The system will have the accumulator as the only
general-purpose register.

Opcode: defines the action associated with the instruction

Operand: defines any data needed by the instruction

Machine code instruction: a binary code with a defined number of bits that comprises an opcode and, most
often, one operand

The number of bits needed for the opcode depends on the number of different opcodes in the instruction set for
the processor. The opcode can be structured with the first few bits defining the operation and the remaining bits
associated with addressing. A sensible instruction format for our simple processor is shown in Figure.

This has an eight-bit opcode consisting of four bits for the operation, two bits for the address mode and the
remaining two bits for addressing registers. This allows 16 different operations each with one of four addressing
modes. This opcode will occupy the most significant bits in the instruction. Because in some circumstances the
operand will be a memory address it is sensible to allocate 16 bits for it. This is in keeping with the 16-bit address
bus.

SAHIR MASROOR KHAN 03009543074 9

Chapter 4 Processor Fundamentals

Assembly language
Writing a substantial program as a sequence of machine code instructions would take a very long time and there
would be inevitably lots of errors along the way.

A programmer might wish to write a program where the actions taken by the processor are directly controlled. It is
argued that this is the most efficient type of program. The solution for this type of programming is to use assembly
language. As well as having a uniquely defined machine code language, each processor has its own assembly
language.

Assembly language: a low-level language related to machine code where opcodes are written as mnemonics and
there is a character representation for an operand Assembler: a program used to translate an assembly language
program into machine code

The essence of assembly language is that for each machine code instruction there is an equivalent assembly
language instruction which comprises:

• a mnemonic (a symbolic abbreviation) for the opcode

• a character representation for the operand.

Assembler (Translator)
If a program has been written in assembly language it has to be translated into machine code before it can be
executed by the processor. The translation program is called an assembler.

Using an assembly language, the programmer has the advantage of the coding being easier to write than it would
have been in machine code. In addition, the use of the assembler allows a programmer to include some special
features in an assembly language program.

Examples of some of these are:

• comments
• symbolic names for constants
• labels for addresses
• macros
• directives.

SAHIR MASROOR KHAN 03009543074 10

Chapter 4 Processor Fundamentals

DIRECTIVE
Directive: an instruction to the assembler program

A directive is an instruction to the assembler as to how it should construct the final executable machine code. This
might be to direct how memory should be used or to define files or procedures that will be used.

Label Op Code Operand

START: LDD Num1
ADD Num2
STO Num3
END
Num1: .RB1
Num2: .RB1
Num3: .RB1

.RB1 (Reserve one byte for Num1 Num2 and Num3)

MACRO
Macro: A macro is a sequence of instructions that is to be used more than once in a program.
A macro to add the contents of two locations and store the result in a third
location is defined as follows.
.MACRO ADDUP NUM1, NUM2, RES
LDA NUM1
ADD NUM2
STO RES
.ENDMACRO
In the program, if say the programmer wishes to add the contents of P and Q and store the result in R.
He/She will write
ADDUP P, Q, R
At assembly, this instruction is replaced by the three instructions.
LDA P
ADD Q
STO R
Symbolic, relative and absolute addressing
When considering how an assembler would convert an assembly language program into machine code it is
necessary to understand the difference between symbolic, relative and absolute addressing.

To explain these, we can consider a simple assembly language program which totals single numbers input at the
keyboard.

SAHIR MASROOR KHAN 03009543074 11

Chapter 4 Processor Fundamentals

Table shows the program as it would be written using symbolic addressing together with an explanation of each
instruction.

SAHIR MASROOR KHAN 03009543074 12

Chapter 4 Processor Fundamentals

The assembly process for a two-pass assembler

For any assembler there are a number of things that have to be done with the assembly language code
before any translation can be done. Some examples are:

• removal of comments or remarks from the code

• replacement of a macro name used in an instruction by the list of instructions that constitute the
macro definition

• removal and storage of directives to be acted upon later.

All symbolic addresses will be put in a symbol table, giving the name of the symbol and its memory
address (either absolute or relative to the start of the program)

On the second pass, the mnemonics code is built up, thus

Each mnemonics code is replaced with its machine code equivalent, by referring to a table of op codes in
memory.

Each symbolic address is replaced with its equivalent machine code address by referring to symbol table
created in the first pass Decimal or characters items are converted into machine code and inserted into
the instructions using them Any error reported at this stage are reported

SAHIR MASROOR KHAN 03009543074 13

Chapter 4 Processor Fundamentals

Bit manipulation
Shift operations
There are two shift instructions available:

• LSL #n

where the bits in the accumulator are shifted logically n places to the left

• LSR #n

where the bits in the accumulator are shifted to the right.

In a logical shift no consideration is given as to what the binary code in the accumulator represents.
Because a shift operation moves a bit from the accumulator into the carry bit in the status register.

If the accumulator content represents an unsigned integer, the left shift operation is a fast way

to multiply by two. However, this only gives a correct result if the most significant bit is a zero.

For an unsigned integer the right shift represents integer division by two. For example, consider:

00110001 (denary 49) gives if right shift ed 00011000 (denary 24)

Logical shift : where bits in the accumulator are shifted to the right or to the left and a zero moves into

the bit position vacated.

Cyclic shift : similar to a logical shift but bits shifted from one end reappear at the other end. All bit
values in the original code are retained.

SAHIR MASROOR KHAN 03009543074 14

Chapter 4 Processor Fundamentals

Arithmetic shift: uses the shift to carry out multiplication or division of a signed integer stored in the
accumulator. The sign bit is always retained following the shift.

SAHIR MASROOR KHAN 03009543074 15

Chapter 4 Processor Fundamentals

Monitoring systems
A monitoring system can be used to create a record of the condition of a system over a period of time. A
monitoring system is used more often to detect when a particular physical property of a system goes
outside a desired range; for example, if the CPU is too hot.

These systems require a measuring device that records a value which can be transmitted to the
computer. Such a measuring device is a called a sensor. An example of a sensor for measuring
temperature is a thermocouple, which outputs an electrical voltage that changes with temperature.

It is important to understand that in a monitoring system, a sensor does not have any built-in
intelligence, so it cannot take any action if there is a problem. If the temperature measured becomes
dangerously high it is the computer that sounds an alarm.

There are a wide variety of sensors available. For some the name indicates the property being measured
such as pressure, humidity, carbon monoxide, pH or sound. For others such as an infrared sensor there
are different methods of use. A passive infrared sensor just measures the level of infrared light received.
In other cases, there is transmission of infrared light with the sensor possibly measuring the level of the
light that is reflected back. Other sensors are given a generic name such as a motion sensor, for which
different examples will be measuring different physical properties.

Control systems
A control system has the monitoring activity plus the capability to control a system. The control element
of a monitoring and control system needs a device called an actuator. An actuator is an electric motor
that is connected to a controlling device. It might be used for switching on or off or for adjusting a
setting Note that Figure 1 includes an analogue-to-digital converter (ADC) and a digital-to-analogue
converter (DAC) as separate components. In a real system they are likely to be integral to the sensor or
actuator device. For the system shown in Figure 1 there is a continuing process where the computer at
regularly timed intervals signals the sensor to provide a measurement. If the measurement value
received by the computer is not in the desired range the computer initiates a control action. The next
timed measurement will happen after this control action has taken place. In effect this next
measurement provides feedback to the computer on the effect of the control action. Feedback is
essential in a control system.

SAHIR MASROOR KHAN 03009543074 16

Chapter 4 Processor Fundamentals

Figure 1.

A closed-loop feedback control system is a special type of monitoring and control system where the
feedback directly controls the operation. Figure 2 shows a schematic diagram of such a system. A
microprocessor functions as the controller. This compares the value for the actual output, as read by the
sensor, with the desired output. It then transmits a value to the actuator which depends on the
difference calculated.

Figure 2.

Bit manipulation

Bit manipulation is the process of applying logical operations on a sequence of bits to achieve a required
result. Computer programming tasks that require bit manipulation include low-level device control,
error detection and correction algorithms, data compression, encryption algorithms, and optimization.

Bit mask

SAHIR MASROOR KHAN 03009543074 17

Chapter 4 Processor Fundamentals

A bit mask is a predefined set of bits that is used to select which specific bits will be modified by
subsequent operations.

Consider a real-life case where you want to paint a window frame. If you’re not careful, you risk painting
not only the window frame, but also the glass itself. You might buy some masking tape and apply it to
the glass and any other parts you don’t want painted. Then when you paint, the masking tape blocks the
paint from reaching anything you don’t want painted. In the end, only the non-masked parts (the parts
you want painted) get painted.

A bit mask essentially performs the same function for bits -- the bit mask blocks the bitwise operators
from touching bits we don’t want modified, and allows access to the ones we do want modified.

SAHIR MASROOR KHAN 03009543074 18

Chapter 4 Processor Fundamentals

Question

SAHIR MASROOR KHAN 03009543074 19