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tAS RS, R/W Setup Time - - ns Figure 1
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tAS RS, R/W Setup Time - - ns Figure 2
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Timing Waveforms
Read Operation
V IH1 V IH1
RS
V IL1 V IL1
tA S tA H
V IH1
R/W
tA H
tW E M
tF E
V IH1
E V IL1
V IL1 V IL1
tR E tD H R
tR D
V IH1 V IH1
DB0~DB7 VALD DATA
V IL1 V IL1
tC Y C E
Write Operation
V IH1 V IH1
RS
V IL1 V IL1
tA S
tA H
R/W
V IL1 V IL1
tA H
tW E M
tFE
V IH1 V IH1
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V IL1 V IL1
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DB0 ~ DB7 VALD DATA
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tC Y C E
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Execution
Instruction Code Function time (max)
(fOSC =
RS RW DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
250KHz)
Clear entire display area, restore
Display Clear 0 0 0 0 0 0 0 0 0 1 display from shift, and load
address counter with DD RAM 1.64ms
address 00H.
Display/ Restore display from shift and
Cursor Home 0 0 0 0 0 0 0 0 1 * load address counter with DD 1.64ms
RAM address 00H.
Specify direction of cursor
Entry Mode movement and display shift
Set 0 0 0 0 0 0 0 1 I/D S mode. This operation takes 40Ps
place after each data transfer
(read/write).
Specify activation of display (D)
Display 0 0 0 0 0 0 1 D C B cursor (C) and blinking of 40Ps
ON/OFF character at cursor position (B).
Display/ 0 0 0 0 0 1 S/C R/L * * Shift display or move cursor. 40Ps
Cursor Shift
Set interface data length (DL),
Function Set 0 0 0 0 1 DL N F * * number of display line (N), and 40Ps
character font (F).
Load the address counter with a
RAM Address 0 0 0 1 ACG CG RAM address. Subsequent 40Ps
Set data access is for CG RAM
data.
Load the address counter with a
DD RAM 0 0 1 ADD DD RAM address. Subsequent 40Ps
Address Set data access is for DD RAM
data.
Busy Flag/ Read Busy Flag (BF) and
Address 0 1 AC contents of Address Counter 40Ps
Counter Read (AC).
CG RAM/ Write data to CG RAM or DD 40Ps
DD RAM 1 0 Write data RAM.
Data Write
CG RAM/ Read data from CG RAM or DD 40Ps
DD RAM 1 1 Read data RAM.
Data Read
I/D = 1 : Increment I/D = 0 : Decrement
S = 1 : Display Shift On DD RAM : Display Data RAM
D = 1 : Display On
C = 1 : Cursor Display On CG RAM : Character Generator
B = 1 : Cursor Blink On RAM
S/C = 1 : Shift Display S/C = 0 : Move Cursor ACG : Character Generator
R/L = 1 : Shift Right R/L = 0 : Shift Left RAM Address
DL = 1 : 8-Bit DL = 0 : 4-Bit ADD : Display Data RAM
N = 1 : Dual Line N = 0 : Signal Line Address
F = 1 : 5x10 dots F = 0 : 5x8 dots AC : Address Counter
BF = 1 : Internal Operation
BF = 1 : Ready for Instruction
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