EC1206 Electronic Devices Dept of ECE 2023-2024

UNIT 1

SEMICONDUCTOR DIODE

PN junction diode, Current equations, Energy Band diagram, Diffusion and drift
current densities, forward and reverse bias characteristics, Transition and Diffusion
Capacitances, Switching Characteristics, Breakdown in PN Junction Diodes.

1.1. INTRODUCTION

Semiconductor has small forbidden energy gap. The energy required for an electron to
move from valence band to conduction band is very low. At low temperature semiconductors
act as insulator. As temperature increases, electron move from valence band to conduction
band. At room temperature free electrons are available in the conduction band. Silicon ( E G =
1.21 eV ) and Germanium ( EG = 0.785 eV ) are semiconductors.

1.1.1. CLASSIFICATION OF SEMICONDUCTORS

Semiconductors are classified as (i) Intrinsic (pure) (ii) Extrinsic (impure) types. The
extrinsic semiconductors are of N-type and P-type.

1.1.1.1. Intrinsic Semiconductors

A pure semiconductor is called intrinsic semiconductor. At 00K there are no free

electrons in the conduction band. When the material is heated, electrons move from valence
band to conduction band that constitutes electric current. The missing electron in the valence
band leaves a vacant space, known as a hole, which is a positively charged ion. Every
electron in the conduction band leaves a hole in the valence band. This process is called
electron-hole pair generation.

As temperature increases electron in the conduction band increases, this causes

resistance of the material to decrease. As resistance decreases with increase in temperature,
semiconductor is said to have negative temperature coefficient.

Fig. 1.1 Generation of electron-hole pair in a semiconductor

1.1.1.2. Extrinsic Semiconductor

Due to poor conduction at room temperature, the intrinsic semiconductor is not useful
in electronic devices. Hence, the current conducting capability of the intrinsic semiconductor
should be increased. This can be achieved by adding a small amount of impurity to the
intrinsic semiconductor, so that it becomes impure or extrinsic semiconductor. This process
of adding impurity is known as doping.

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Types: (i) N-type Semiconductor

(ii) P-type Semiconductor

N-type Semiconductor

A small amount of pentavalent impurities such as arsenic, antimony or phosphorus is

added to the pure semiconductor ( Ge or Si ) to get N-type semiconductor.

P-type Semiconductor

A small amount of trivalent impurities such as aluminum or boron is added to the pure
semiconductor to get P-type semiconductor.

S.No Intrinsic Semiconductor Extrinsic Semiconductor

1. It is a pure form of semiconductor. An impurity or doping agent is added in the

pure semiconductor which forms extrinsic
semiconductor.

2. Number of electrons and holes are Number of electrons and holes are not
equal. equal because of doping.

3. Conductivity is poor. Conductivity is improved.

S.No N-type Semiconductor P-type Semiconductor

1. Pentavalent impurity is added in a A trivalent impurity is added to pure silicon

pure silicon or Ge to form N-type or Ge to form P-type Semiconductor
Semiconductor

2. Doping agent: Arsenic, Antimony, Doping agent: Gallium, Indium, Boron etc.
Phosphorous, etc.

3. Electrons are majority carrier; holes Holes are majority carrier; electrons are
are minority carrier. minority carrier.

1.1.2. MASS-ACTION LAW

In a semiconductor under thermal equilibrium the product of number of holes (p) and
number of electrons (n) is constant. This relation is known as mass-action law and is given by
np=n2i.

Where ni - Intrinsic charge concentration

n2i = A0 T3 e-EGo / KT
E
Where Go - magnitude of energy gap at 00k

K - 8.620 × 105 Boltzmann constant eV/ oK

T - Temperature in oK\

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1.2 PN JUNCTION DIODE

CONSTRUCTION

In a semiconductor crystal, if one side is doped with P-type impurities and the
other side with N -type impurities, a PN junction is formed.

The N - type material has high concentration of free electrons, while P- type
material has high concentration of holes. Therefore, at the junction there is a tendency for
the free electrons to diffuse over to the P-side and holes to the N-side. This process is called
diffusion.

Fig. 1.2. Formation of PN junction diode

As the free electrons move across the junction from N-type to P-type, the donar ions
become positively charged. Hence, an array of positive immobile ions is built on the N side
of the Junction.

The free electrons that across the junction ,uncover the negatively charged acceptor ions by
filling in the holes.Therfore , an array of negative immobile ions is built on the P side of the
junction.

The region near the junction, which consists of immobile ions is called the space charge
region.

The existence of these immobile ions develops the potential difference across the junction ,
this potential act as a barrier .Thus , this potential is named as Barrier Potential

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Circuit Symbol of DIODE:

OPERATION OF A PN DIODE:

FORWARD BIAS CONDITION

When positive terminal of the battery is connected to the P-type and negative terminal
to N-type of the PN junction diode that is known as forward bias condition.

Operation

The applied potential in external battery acts in opposition to the internal potential barrier
which disturbs the equilibrium

As soon as equilibrium is disturbed by the application of an external voltage, the

Fermi level is no longer continuous across the junction.

Under the forward bias condition the applied positive potential repels the holes in P
type region so that the holes move towards the junction and the applied positive potential
repels the electrons in N type region so that the electrons move towards the junction.

When the applied potential is more than the internal barrier potential the depletion
region and internal potential barrier disappear.

V-I Characteristics

As the forward voltage increased for VF < Vo, the forward current IF almost zero
because the potential barrier prevents the holes from P region and electrons from N region to
flow across the depletion region in opposite direction.

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For VF > Vo, the potential barrier at the junction completely disappears and hence,
the holes cross the junction from P to N type and electrons cross the junction to opposite
direction, resulting large current flow in external circuit.

A feature noted here is the cut in voltage or threshold voltage VF below which the
current is very small.

At this voltage the potential barrier is overcome and the current through the junction
starts to increase rapidly.

Cut in voltage is 0.3V for germanium and 0.7 for silicon.

UNDER REVERSE BIAS CONDITION

When the negative terminal of the battery is connected to the P-type and positive
terminal to N-type of the PN junction diode that is known as forward bias condition.

Operation
The holes from the majority carriers of the P side move towards the negative terminal
of the battery and electrons which from the majority carrier of the N side are attracted
towards the positive terminal of the battery.Hence, the width of the depletion region which is
depleted of mobile charge carriers increases. Thus, the electric field produced by applied
reverse bias, is in the same direction as the electric field of the potential barrier.Hence the
resultant potential barrier is increased which prevents the flow of majority carriers in both
directions. The depletion width W is proportional to under reverse bias.

V-I characteristics
Theoretically no current flow in the external circuit. But in practice a very small
amount of current of the order of few microamperes flows under reverse bias.

Electrons forming covalent bonds of semiconductor atoms in the P and N type regions
may absorb sufficient energy from heat and light to cause breaking covalent bonds. So
electron hole pairs continuously produced.

Consequently the minority carriers electrons in the P region and holes in the N region,
wander over to the junction and flow towards their majority carrier side giving rise a small
reverse current. This current is known as reverse saturation current Io.

The magnitude of this current is depends on the temperature because minority carrier
is thermally broken covalent bonds

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PN Diode Current Equation

Consider a forward biases PN junction diode, holes are injected into N side from P side.
Holes are minority carriers in N side. The minority carrier hole concentration in N side
deceases exponentially from the junction.

Similarly, electrons are injected into P side from N side.

In diode, the current conduction is by both the charge carriers and so it is called bipolar
device.

In N side, let

- Thermal equilibrium hole concentration.

(0) - Total hole concentration at the junction

(x)- Hole concentration at any distance x from the junction

(0) - Excess hole concentration at the junction

When the junction is at x=0, the hole concentration at any point in the N side which is at
distance x from the junction

(x) = + (0) e-x/LP --------------------------------- (1)

where, Lp - diffusion length of holes in N material

The excess hole concentration at x=0,

(0) = (0) - ------------------------------ (2)

The diffusion hole current in N side is

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Ipn(x) Aq --------------------------- (3)

Where, A- area of cross section, q = Charge of hole.

Differentiating equation (1) we get ,

--------------------------------------------------------- (4)

Substituting equation (4) in equation (3)

Ipn

Ipn ------------- (5)

Where, Dp - Diffusion constant of hole

At the Junction x=0, equation (5) becomes

Ipn (6)

Substituting the equation for in equation (6), we get,

Ipn (

Using Boltzmann, kinectic theory of gases the total holes at the junction, for the applied
voltage V is given by,

Substituting equation (8) in equation (7), we get,

Ipn (

Ipn

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Total current in a diode is the sum of hole and electron current. The electron current at the
junction in P region is given by,

Inp

Total diode current is

I = Ipn + InP

Adding 9 and 10, we get

I=

I=

DIODE CURRENT EQUATION

The diode current equation relating the voltage V and current I is given by

I=

where

I – diode current

Io – diode reverse saturation current at room

temperature V – external voltage applied to the
diode
VT = kT/q = T/11600, thermal voltage
K – Boltzmann‘s constant (1.38066x10^-23

J/K) q – charge of electron (1.6x10^-19 C)

T – temperature of the diode junction

At room temperature (T=300 K), VT = 26mV. Substituting this value in current equation,

I=

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For germanium diode,

I= Since Ƞ =1 for Ge

For silicon diode,

I= Since Ƞ =2 for Si.

If the value of applied voltage is greater than unity, then the equation of diode current
for germanium,

I=

and for silicon,

I=
When the diode is reverse biased, its current equation may be obtained by changing
the sign of voltage V. Thus diode current with reverse bias is

I=

DRIFT AND DIFFUSION CURRENTS

The flow of charge (ie) current through a semiconductor material are of two types namely
drift & diffusion.

The net current that flows through a (PN junction diode) semiconductor material has two
components

1. Drift current
1. Diffusion current
DRIFT CURRENT
When an electric field is applied across the semiconductor material, the charge carriers attain
a certain drift velocity Vd , which is equal to the product of the mobility of the charge carriers
and the applied Electric Field intensity E ;

Drift velocity Vd = mobility of the charge carriers × Applied Electric field intensity.

Holes move towards the negative terminal of the battery and electrons move towards the
positive terminal of the battery. This combined effect of movement of the charge carriers
constitutes a current known as the drift current

Thus the drift current is defined as the flow of electric current due to the motion of the charge
carriers under the influence of an external electric field.

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Drift current due to the charge carriers such as free electrons and holes are the current
passing through a square centimeter perpendicular to the direction of flow.

Drift current density Jn , due to free electrons is given by Jn = q n μn E A / cm2

Drift current density JP, due to holes is given by JP = q p μp E A / cm2

Where, n - Number of free electrons per cubic centimeter.

P - Number of holes per cubic centimeter

n– Mobility of electrons in cm2 / Vs

p – Mobility of holes in cm2 / Vs

E – Applied Electric filed Intensity in V /cm

q – Charge of an electron = 1.6 x 10-19 coulomb

DIFFUSION CURRENT
It is possible for an electric current to flow in a semiconductor even in the absence of the
applied voltage provided a concentration gradient exists in the material.

A concentration gradient exists if the number of either elements or holes is greater in one
region of a semiconductor as compared to the rest of the Region

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(a) Excess hole concentration varying along the axis in an N-type semiconductor bar

(b) The resulting diffusion current

In a semiconductor material the change carriers have the tendency to move from the
region of higher concentration to that of lower concentration of the same type of
charge carriers.Thus the movement of charge carriers takes place resulting in a current
called diffusion current.
As indicated in fig a, the hole concentration p(x) in semiconductor bar varies from a
high value to a low value along the x-axis and is constant in the y and z directions.

Diffusion current density due to holes Jp is given by

Since the hole density p(x) decreases with increasing x as shown in fig b, dp/dx is
negative and the minus sign in equation is needed in order that J p has positive sign in the
positive x direction.
Diffusion current density due to the free electrons is given by

Where dn/dx – concentration gradient for electrons

Dp/dx - concentration gradient for holes

Dn and Dp – diffusion coefficient for electrons and holes

Total Current
The total current in a semiconductor is the sum of both drift and diffusion currents
that is given by

Similarly the total current density for an N type semiconductor is given by

SWITCHING CHARACTERISTICS
Diodes are often used in switching mode. When the applied bias voltage to the PN
diode is suddenly reversed in opposite direction and it reaches a steady state at a interval of
time that is called the recovery time.

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In fig. b the applied voltage Vi = VF for the time up to t1 is in the direction to forward
bias the diode. The resistance RL is large so that the drop across RL is large when compared
to the drop across diode. Then the current is I= VF / RL = IF.

At time t=t1 the input voltage is reversed to the value of –VR current does not become
zero and the value is I= VR / RL = IR shown in fig d..

During the time interval from t1 to t2 the injected minority carriers have remained
stored and hence this interval is called the storage time (t1).

After the instant t=t2, the diode gradually recovers and ultimately reaches the steady
state. The time interval between t2 and instant t3 when the diode has recovered nominally is
called the transition time tt.

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The recovery said to have completed (i) when even the minority carriers remote from
the junction have difference to the junction and crossed it. (ii) when the junction transition
capacitance C across the reverse biased junction has got charged through the external resistor
RL to the voltage –VR.

For commercial switching type diodes the reverse recovery time trr ranges from less
than 1ns up to as high as 1us.

In order to minimize the effect of reverse current the time period of the operating
frequency should be a minimum of approximately 10 times trr. For example if diode has trr of
2ns its operating frequency is

The reverse recovery time can be reduced b shortening the length of the P region in a
PN junction diode.

The stored storage and switching time can be reduced by introduction of gold
impurities into junction diode by diffusion. The gold dopant also called a life time killer,
increases the recombination rate and removes the stored minority carriers.

This technique is used to produce diodes and other active devices for high speed
applications.

APPLICATION OF PN DIODE

  Can be used as rectifier in DC Power Supplies.

 In Demodulation or Detector Circuits.



ENERGY BAND STRUTURE OF DIODE IN OPEN CIRCUIT CONDITION

The P type and N type of a diode is formed in a single semicondcutor crystal .As the
diode is a single crystal the fermi level must be constant through out the specimen at
equilbrium.
In open circuit condition the charges will be transferred between P type and N type
material to make the fermi energy level constant.
E0 is the shift in energy level to make fermi energy level constant in open circuit condition.
E0 = ECP-ECN = EVP-EVN=E1+E2
E0 is the energy required for an electron to cross the junction
To obtain the expression for E0 :

From the Figure

EF - EVP= 1/2 EG-E1

E1=1/2 EG-EF+EVP ------------------------------- (1)

From the figure

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ECN -EF=1/2 EG-E2

E2= 1/2 EG + EF -ECN

E0= E1 + E2------------------------- (2)

E0= 1/2 EG-EF + EVP+ 1/2 EG +EF -ECN

= EG- (ECN-EF) - (EF-EVP) ------------------------- (3)


Fig: Energy band diagram of open circuit diode

To find EG:

Electron and Hole concentration

n  NC e ( EcEF )/ KT        (4)
P  NV e ( EF  EV )/ KT
       (5)

From mass action law is, n.p= ni2

Substituting Equ.4 & 5 in the Mass Action law equ.

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E
NC NV G

 e KT

ni 2
EG N N 
 ln  c 2 V 
KT  ni 
N N 
EG  KT ln  c 2 V 
 ni 

EG N N 
Taking logarthim on the both sides,  ln  c 2 V 
KT  ni 

N N 
EG  KT ln  c 2 V 
 ni 
To find ECN-EF

N 
ECN  EF  KT ln  c 
 ND 
To find EF-EVP

N 
EF  EVP  KT ln  V 
 NA 
Substituting EG , ECN-EF and EF-EVP in E0 we get,

N N 
EO  KT ln  A 2 D 
 ni 
This energy E0 (in eV) is in potential energy of the electrons at the PN junction, and is equal
to qVO

KT  N A N D 
VO  ln  
Q  ni 2 

EO is numerically equal to the barrier potential Vo

DIODE CAPACITANCE

Diode with depletion layer can be considered as a parallel plate capacitor. The depletion layer act as
dielectric material. The P and N type material on either side of the depletion layer act as two parallel
plates. The diode capacitances given by

Q  qNDWA

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 - Permittivity of the depletion layer

A- Area of the cross section of the junction

W- Width of the depletion layer

Two types of capacitances

1. Transistion Capacitance or Space charge Capacitance

2. Diffusion Capacitance

TRANSITION CAPACITANCE OR SPACE CHARGE CAPACITANCE

When the diode is reverse biased, the junction capacitance is called space charge capacitance. When
the applied reverse voltage increases, the width of the deletion layer increases and the transition
capacitance will become low.

With Poisson's equation,

d 2V qN D
         (1)
dx 2 
To Find potential, V

Integrating equation (1) we get,

dV qN
  D x  C      (2)
dx 
Integrating again we get,

qN D x 2
V  Cx  D            (3) -
 2
To find Constants C and D

At x=0, V=0, equation (3) becomes

D=0

dV
For x=WN = W, voltage remains constant i,e., 0
dx
Equation 3 becomes,

qN DW
0  Cx              (4)

qN DW
C                  (5)

Substituting the value of D=0, nnd Equ.(5) in Equ.(3)

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qN D x qN D 2

V  Wx            (6)
 2 

qN D  x2 
V   Wx             (7)
 2 
At x=W, V is the barrier potential,

qN D  W 2 
V   W 2             (8)
  2 
qN D 1 
V W 2   1            (9)
 2 
qN D
V W 2                (10)

Total charge in the equation layer is

Q  qNDWA

dQ
Transition Capacitance , CT 
dv

dW
CT  qN D A            (11)
dV
Equation 10 becomes,

dW qN D
 (2W )            (12)
dV 2

dW 

dV qNDW

dW 

dV qNDW
Equation 11 becomes

qN D A
CT             (13)
qN DW
A
CT 
W

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DIFFUSION CAPACITANCE

When the diode is forward biased, the junction capacitance is called storage capacitance (CD).

In the forward bias depletion layer is thin therefore diffusion capacitance will be larger than
the transition capacitance.

Consider a forward biased PN junction diode, where holes are injected into N side from P
side.

The hole density at the junction is given by,

  AqPn  0 e x/ Lp
Total charge in the N region is given by,

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Q  AqLpPn  0
Diffusion capacitance

dQ
CD 
dv
Differentiating Q with respect to V,

dQ dPn  0
 AqLp
dv dv
By solving above equation

We get

I
CD 
VT
By solving above equation

We get

I
CD 
VT

PN Junction Breakdown

Electrical break down of any material (say metal, conductor, semiconductor or even
insulator) can occur due to two different phenomena.
Those two phenomena are 1) Zener breakdown and 2) Avalanche breakdown

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Zener Breakdown

When we increase the reverse voltage across the pn junction diode, what really
happens is that the electric field across the diode junction increases (both internal & external).
This results in a force of attraction on the negatively charged electrons at junction. This force
frees electrons from its covalent bond and moves those free electrons to conduction band.
When the electric field increases (with applied voltage), more and more electrons are freed
from its covalent bonds. This results in drifting of electrons across the junction and electron
hole recombination occurs. So a net current is developed and it increases rapidly with
increase in electric field.
Zener breakdown phenomena occurs in a pn junction diode with heavy doping & thin
junction (means depletion layer width is very small). Zener breakdown does not result in
damage of diode. Since current is only due to drifting of electrons, there is a limit to the
increase in current as well.

Avalanche Breakdown

Avalanche breakdown occurs in a pn junction diode which is moderately doped and

has a thick junction (means its depletion layer width is high). Avalanche breakdown usually
occurs when we apply a high reverse voltage across the diode (obviously higher than the
zener breakdown voltage,say Vz). So as we increase the applied reverse voltage, the electric
field across junction will keep increasing.
If applied reverse voltage is Va and the depletion layer width is d; then the generated
electric field can be calculated as Ea =Va/d
This generated electric field exerts a force on the electrons at junction and it frees
them from covalent bonds. These free electrons will gain acceleration and it will start moving
across the junction with high velocity. This results in collision with other neighboring atoms.
These collisions in high velocity will generate further free electrons. These electrons will start
drifting and electron-hole pair recombination occurs across the junction. This results in net
current that rapidly increases.
We learned that avalanche breakdown occurs at a voltage (Va) which is higher than
zener breakdown voltage (Vz). The reason behind this is simple. We know, avalanche
phenomena occurs in a diode which is moderately doped and junction width (say d) is high.
A zener break down occurs in a diode with heavy doping and thin junction (here d is small).
The electric field that occur due to applied reverse voltage (say V) can be calculated as E =
V/d.
So in a Zener breakdown, the electric field necessary to break electrons from covalent
bond is achieved with lesser voltage than in avalanche breakdown. The reason is thin
depletion layer width. In avalanche breakdown, the depletion layer width is higher and hence
much more reverse voltage has to be applied to develop the same electric field strength
(necessary enough to break electrons free).

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UNIT 2

BIPOLAR JUNCTION TRANSISTORS

NPN -PNP -Operations-Early effect-Current equations – Input and Output

characteristics of CE, CB, CC – Hybrid -π model – h-parameter model, Ebers Moll
Model- Gummel Poon-model, Multi Emitter Transistor.

INTRODUCTION:

After having a good knowledge on the working of the diode, which is a single PN junction,
let us try to connect two PN junctions which make a new component called Transistor.
A Transistor is a three terminal semiconductor device that regulates current or voltage flow
and acts as a switch or gate for signals.

Why Do We Need Transistors?

Suppose that you have a FM receiver which grabs the signal you want. The received signal
will obviously be weak due to the disturbances it would face during its journey. Now if this
signal is read as it is, you cannot get a fair output. Hence we need to amplify the
signal. Amplification means increasing the signal strength.

This is just an instance. Amplification is needed wherever the signal strength has to be
increased. This is done by a transistor. A transistor also acts as a switch to choose between
available options. It also regulates the incoming current and voltage of the signals.

CONSTRUCTIONAL DETAILS OF A TRANSISTOR

The Transistor is a three terminal solid state device which is formed by connecting two
diodes back to back. Hence it has got two PN junctions. Three terminals are drawn out of
the three semiconductor materials present in it. This type of connection offers two types of
transistors. They are PNP and NPN which means an N-type material between two P types
and the other is a P-type material between two N-types respectively.

The construction of transistors is as shown in the following figure which explains the idea
discussed above.

The three terminals drawn from the transistor indicate Emitter, Base and Collector terminals.
They have their functionality as discussed below.

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Emitter
 The left hand side of the above shown structure can be understood as Emitter.

 This has a moderate size and is heavily doped as its main function is to supply a
number of majority carriers, i.e. either electrons or holes.

 As this emits electrons, it is called as an Emitter.

 This is simply indicated with the letter E.

Base
 The middle material in the above figure is the Base.

 This is thin and lightly doped.

 Its main function is to pass the majority carriers from the emitter to the collector.

 This is indicated by the letter B.

Collector
 The right side material in the above figure can be understood as a Collector.

 Its name implies its function of collecting the carriers.

 This is a bit larger in size than emitter and base. It is moderately doped.

 This is indicated by the letter C.

The symbols of PNP and NPN transistors are as shown below.

The arrow-head in the above figures indicated the emitter of a transistor. As the collector
of a transistor has to dissipate much greater power, it is made large. Due to the specific
functions of emitter and collector, they are not interchangeable. Hence the terminals are
always to be kept in mind while using a transistor.

TRANSISTOR BIASING
As we know that a transistor is a combination of two diodes, we have two junctions here. As
one junction is between the emitter and base, that is called as Emitter-Base junction and
likewise, the other is Collector-Base junction.
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Biasing is controlling the operation of the circuit by providing power supply. The function
of both the PN junctions is controlled by providing bias to the circuit through some dc
supply. The figure below shows how a transistor is biased.

By having a look at the above figure, it is understood that

 The N-type material is provided negative supply and P-type material is given positive supply to
make the circuit Forward bias.

 The N-type material is provided positive supply and P-type material is given negative supply to
make the circuit Reverse bias.

By applying the power, the emitter base junction is always forward biasedas the emitter
resistance is very small. The collector base junction is reverse biased and its resistance is a
bit higher. A small forward bias is sufficient at the emitter junction whereas a high reverse
bias has to be applied at the collector junction.

The direction of current indicated in the circuits above, also called as the Conventional
Current, is the movement of hole current which is opposite to the electron current.

OPERATION PNP TRANSISTOR

The operation of a PNP transistor can be explained by having a look at the following figure,
in which emitter-base junction is forward biased and collector-base junction is reverse
biased.

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The voltage VEE provides a positive potential at the emitter which repels the holes in the P-
type material and these holes cross the emitter-base junction, to reach the base region. There
a very low percent of holes recombine with free electrons of N-region. This provides very
low current which constitutes the base current IB. The remaining holes cross the collector-
base junction, to constitute collector current IC, which is the hole current.

As a hole reaches the collector terminal, an electron from the battery negative terminal fills
the space in the collector. This flow slowly increases and the electron minority current flows
through the emitter, where each electron entering the positive terminal of VEE, is replaced by
a hole by moving towards the emitter junction. This constitutes emitter current IE.

Hence we can understand that −

 The conduction in a PNP transistor takes place through holes.

 The collector current is slightly less than the emitter current.

 The increase or decrease in the emitter current affects the collector current.

OPERATION NPN TRANSISTOR

The operation of an NPN transistor can be explained by having a look at the following
figure, in which emitter-base junction is forward biased and collector-base junction is
reverse biased.

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The voltage VEE provides a negative potential at the emitter which repels the electrons in the
N-type material and these electrons cross the emitter-base junction, to reach the base region.
There a very low percent of electrons recombine with free holes of P-region. This provides
very low current which constitutes the base current IB. The remaining holes cross the
collector-base junction, to constitute the collector current IC.

As an electron reaches out of the collector terminal, and enters the positive terminal of the
battery, an electron from the negative terminal of the battery VEE enters the emitter region.
This flow slowly increases and the electron current flows through the transistor.

Hence we can understand that −

 The conduction in a NPN transistor takes place through electrons.

 The collector current is higher than the emitter current.
 The increase or decrease in the emitter current affects the collector current.
ADVANTAGES
There are many advantages of a transistor such as −

 High voltage gain.

 Lower supply voltage is sufficient.
 Most suitable for low power applications.
 Smaller and lighter in weight.
 Mechanically stronger than vacuum tubes.
 No external heating required like vacuum tubes.
 Very suitable to integrate with resistors and diodes to produce ICs.
EARLY EFFECT
The Early effect is the variation in the width of the base in a BJT due to a variation in the
applied base-to-collector voltage, named after its discoverer James M. Early. A
greater reverse bias across the collector–base junction, for example, increases the collector–
base depletion width, decreasing the width of the charge neutral portion of the base.

Figure 1. Top: pnp base width for low collector–base reverse bias; Bottom: narrower
pnp base width for large collector–base reverse bias. Light colors are depleted regions.
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In Figure 1 the neutral base width is dark blue, and the depleted base regions are light blue.
The neutral emitter and collector regions are dark red and the depleted regions pink. Under
increased collector–base reverse bias, the lower panel of Figure 1 shows a widening of the
depletion region in the base and the associated narrowing of the neutral base region.

The collector depletion region also increases under reverse bias, more than does that of the
base, because the collector is less heavily doped. The principle governing these two widths is
charge neutrality. The emitter–base junction is unchanged because the emitter–base voltage is
the same.

Figure 2. The Early voltage as seen in the output-characteristic plot of a BJT

Base-narrowing has two consequences that affect the current:

There is a lesser chance for recombination within the "smaller" base region.
The charge gradient is increased across the base, and consequently, the current of minority
carriers injected across the emitter junction increases.
Both these factors increase the collector or "output" current of the transistor with an increase
in the collector voltage. This increased current is shown in Figure 2. Tangents to the
characteristics at large voltages extrapolate backward to intercept the voltage axis at a voltage
called the Early voltage, often denoted by the symbol VA.
LARGE-SIGNAL MODEL
In the forward active region the Early effect modifies the collector current (IC) and the
forward common-emittercurrent gain (βF), as typically described by the following
equations:[1][2]

Where
VCE is the collector–emitter voltage
VT is the thermal voltage kT / q; see thermal voltage: role in semiconductor physics
VA is the Early voltage (typically 15 V to 150 V; smaller for smaller devices)
βF0 is forward common-emitter current gain at zero bias.
Some models base the collector current correction factor on the collector–base
voltage VCB (as described inbase-width modulation) instead of the collector–emitter
voltage VCE.[3] Using VCB may be more physically plausible, in agreement with the physical
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origin of the effect, which is a widening of the collector–base depletion layer that depends
on VCB. Computer models such as those used in PSPICE use the collector–base voltageVCB.[4]
SMALL-SIGNAL MODEL
The Early effect can be accounted for in small-signal circuit models (such as the hybrid-pi
model) as a resistor defined as (see [5]

in parallel with the collector–emitter junction of the transistor. This resistor can thus account
for the finite output resistance of a simple current mirror or an actively loaded common-
emitter amplifier.
In keeping with the model used in SPICE and as discussed above using VCB the resistance
becomes:

,
which almost agrees with the textbook result. In either formulation, rO varies with DC reverse
bias VCB, as is observed in practice.[citation needed]
In the MOSFET the output resistance is given in Shichman–Hodges model[6] (accurate for
very old technology) as:

,
where VDS = drain-to-source voltage, ID = drain current and λ = channel-length
modulation parameter, usually taken as inversely proportional to channel length L. Because
of the resemblance to the bipolar result, the terminology "Early effect" often is applied to the
MOSFET as well.

TRANSISTOR CONFIGURATION

A Transistor has 3 terminals, the emitter, the base and the collector. Using these 3 terminals
the transistor can be connected in a circuit with one terminal common to both input and
output in a 3 different possible configurations.

The three types of configurations are Common Base, Common Emitter and Common
Collector configurations. In every configuration, the emitter junction is forward biased and
the collector junction is reverse biased.

COMMON EMITTER CONNECTION (OR CE CONFIGURATION)

Definition: The configuration in which the emitter is connected between the collector and
base is known as a common emitter configuration. The input circuit is connected between
emitter and base, and the output circuit is taken from the collector and emitter. Thus, the
emitter is common to both the input and the output circuit, and hence the name is the
common emitter configuration. The common emitter arrangement for NPN and PNP
transistor is shown in the figure below.

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NPN TRANSISTOR PNP TRANSISTOR

BASE CURRENT AMPLIFICATION FACTOR (Β)

The base current amplification factor is defined as the ratio of the output and input current in
a common emitter configuration. In common emitter amplification, the output current is the
collector current IC, and the input current is the base current IB.

In other words, the ratio of change in collector current with respect to base current is known
as the base amplification factor. It is represented by β (beta).

Relation Between Current Amplification Factor (α) & Base Amplification Factor (β)

The relation between Β and α can be derived as

We Known,

Now,

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Substituting the value of ΔIE in equation (1), we get,

The above equation shows that the when the α reaches to unity, then the β reaches to infinity.
In other words, the current gain in a common emitter configuration is very high, and because
of this reason, the common emitter arrangement circuit is used in all the transistor
applications.

COLLECTOR CURRENT

In CE configuration, the input current IB and the output current IC are related by the equation
shown below.

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If the base current is open (i.e., IB = 0). The collector current is current to the emitter, and this
current is abbreviated as ICEO that means collector- emitter current with the base open.

Substitute the value ΔIB in equations (1), we get,

CHARACTERISTICS OF COMMON EMITTER (CE) CONFIGURATION

The characteristic of the common emitter transistor circuit is shown in the figure below. The
base to emitter voltage varies by adjusting the potentiometer R1. And the collector to emitter
voltage varied by adjusting the potentiometer R2. For the various setting, the current and
voltage are taken from the milliammeters and voltmeter. On the basis of these readings, the
input and output curve plotted on the curve.

INPUT CHARACTERISTIC CURVE

The curve plotted between base current IB and the base-emitter voltage VEB is called Input
characteristics curve. For drawing the input characteristic the reading of base currents is taken
through the ammeter on emitter voltage VBEat constant collector-emitter current. The curve for
different value of collector-base current is shown in the figure below.

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The curve for common base configuration is similar to a forward diode characteristic. The base
current IB increases with the increases in the emitter-base voltage VBE. Thus the input resistance of
the CE configuration is comparatively higher that of CB configuration.

The effect of CE does not cause large deviation on the curves, and hence the effect of a change in
VCE on the input characteristic is ignored.

Input Resistance: The ratio of change in base-emitter voltage VBE to the change in base current
∆IB at constant collector-emitter voltage VCE is known as input resistance, i.e.,

OUTPUT CHARACTERISTIC

In CE configuration the curve draws between collector current IC and collector-emitter voltage
VCE at a constant base current IB is called output characteristic. The characteristic curve for the
typical NPN transistor in CE configuration is shown in the figure below.

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In the active region, the collector current increases slightly as collector-emitter VCE current
increases. The slope of the curve is quite more than the output characteristic of CB configuration.
The output resistance of the common base connection is more than that of CE connection.

The value of the collector current IC increases with the increase in VCE at constant voltage IB, the
value β of also increases.

When the VCE falls, the IC also decreases rapidly. The collector-base junction of the transistor
always in forward bias and work saturate. In the saturation region, the collector current becomes
independent and free from the input current IB

In the active region IC = βIB, a small current IC is not zero, and it is equal to reverse leakage
current ICEO.

Output Resistance: The ratio of the variation in collector-emitter voltage to the collector-emitter
current is known at collector currents at a constant base current IB is called output resistance ro.

The value of output resistance of CE configuration is more than that of CB

COMMON BASE CONNECTION (CB CONFIGURATION)

Definition: The configuration in which the base of the transistor is common between emitter
and collector circuit is called a common base configuration. The common base circuit
arrangement for NPN and PNP transistor is shown in the figure below. In common base-
emitter connection, the input is connected between emitter and base while the output is taken
across collector and base.

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CURRENT AMPLIFICATION FACTOR (Α)

The ratio of output current to input current is known as a current amplification factor. In
the common base configuration, the collector current IC is the output current, and the emitter
current IE is the input current. Thus, the ratio of change in emitter current to the collector at
constant collector-base voltage is known as a current amplification factor of a transistor in
common base configuration. It is represented by α (alpha).

Where ΔIC is the change in the collector and ΔIE is changed in emitter current at constant
VCB. Now,

The value of current amplification factor is less than unity. The value of the amplification
factor (α) reaches to unity when the base current reduces to zero. The base current becomes
zero only when it is thin and lightly doped. The practical value of the amplification factor
varies from 0.95 to 0.99 in the commercial transistor.

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COLLECTOR CURRENT
The base current is because of the recombination of the electrons and holes in the base
region. The whole emitter current will not flow through the current. The collector current
increase slightly because of the leakage current flows due to the minority charge carrier. The
total collector current consists;

The large percentage of emitter current that reaches the collector terminal, i.e., αIE.

The leakage current Ileakage. The minority charge carrier is because of the flow of minority
charge carrier across the collector-base junction as the junction is heavily reversed. Its value
is much smaller than αIE.

Total collector current,

The above expression shows that if IE = 0 (when the emitter circuit is open) then still a small
current flow in the collector circuit called leakage current. This leakage current is represented
by as ICBO, i.e., collector-base current with emitter circuit is open.

The leakage current is also abbreviated as ICO i.e., the collector current with emitter circuit
open.

CHARACTERISTICS OF COMMON BASE (CB) CONFIGURATION

The characteristic diagram of determining the common base characteristic is shown in the
figure below.

The emitter to base voltage VEB can be varied by adjusting the potentiometer R1. A series
resistor RS is inserted in the emitter circuit to limit the emitter current IE. The value of the
emitter change to a large value even the value of a potentiometer slightly change. The value
of collector voltage changes slightly by changing the value of the potentiometer R2. The input
and output characteristic curve of the potentiometer explains below in details.
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INPUT CHARACTERISTIC
The curve plotted between emitter current IE and the emitter-base voltage VEBat constant
collector base voltage VCB is called input characteristic curve. The input characteristic curve
is shown in the figure below.

The following points are taken into consideration from the characteristic curve. For a specific
value of VCB, the curve is a diode characteristic in the forward region. The PN emitter
junction is forward biased. When the value of the voltage base current increases the value of
emitter current increases slightly. The junction behaves like a better diode. The emitter and
collector current is independent of the collector base voltage VCB. The emitter current
IE increases with the small increase in emitter-base voltage VEB. It shows that input resistance
is small.

INPUT RESISTANCE

The ratio of change in emitter-base voltage to the resulting change in emitter current at
constant collector base voltage VCB is known as input resistance. The input resistance is
expressed by the formula

The value of collector base voltage VCB increases with the increases in the collector-base
current. The value of input resistance is very low, and their value may vary from a few ohms
to 10 ohms.

OUTPUT CHARACTERISTIC CURVE

In common base configuration, the curve plotted between the collector current and collector
base voltage VCB at constant emitter current IE is called output characteristic. The CB
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configuration of PNP transistor is shown in the figure below. The following points from the
characteristic curve are taken into consideration.

The active region of the collector-base junction is reverse biased, the collector current IC is
almost equal to the emitter current IE. The transistor is always operated in this region.

The curve of the active regions is almost flat. The large charges in VCBproduce only a tiny
change in IC The circuit has very high output resistance ro.

When VCB is positive, the collector-base junction is forward bias and the collector current
decrease suddenly. This is the saturation state in which the collector current does not
depend on the emitter current.

When the emitter current is zero, the collector current is not zero. The current which flows
through the circuit is the reverse leakage current, i.e., ICBO. The current is temperature
depends and its value range from 0.1 to 1.0 μA for silicon transistor and 2 to 5 μA for
germanium transistor.

OUTPUT RESISTANCE

The ratio of change in collector-base voltage to the change in collector current at constant
emitter current IE is known as output resistance.

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The output characteristic of the change in collector current is very little with the change in
VCB. With the change in collector-base voltage. The output resistance is very high of the
order of several kilometres.

COMMON COLLECTOR CONNECTION (OR CC CONFIGURATION)

Definition: The configuration in which the collector is common between emitter and base is
known as CC configuration. In CC configuration, the input circuit is connected between
emitter and base and the output is taken from the collector and emitter.
The collector is common to both the input and output circuit and hence the name common
collector connection or common collector configuration.

CURRENT AMPLIFIER FACTOR (Y)

The current amplification factor is defined as the ratio of the output current to the input
current. In common emitter configuration, the output current is emitter current IE, whereas the
input current is base current IB.

Thus, the ratio of change in emitter current to the change in base current is known as the
current amplification factor. It is expressed by the Y.

RELATION BETWEEN Υ and α

The Y is the current amplification factor of common collector configuration and the α is
current amplification factor of common base connection.

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and,

Substituting the value of ΔIB in above first equation, we get,

The above relation shows that the value of Y is nearly equal to β. This circuit is mainly used
for amplification because of this arrangement input resistance is high, and output resistance is
very low. The voltage gain of the resistance is very low. This circuit arrangement is mainly
used for impedance matching.

COLLECTOR CURRENT
We know that,

INPUT CHARACTERISTIC CURVE

The input characteristic of the common collector configuration is drawn between collector
base voltage VCE and base current IB at constant emitter current voltage VCE. The value of the
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output voltage VCE changes with respect to the input voltage VBC and IB With the help of
these values, input characteristic curve is drawn. The input characteristic curve is shown
below.

OUTPUT CHARACTERISTIC CURVE

The output characteristic of the common emitter circuit is drawn between the emitter-
collector voltage VEC and output current IE at constant input current IB. If the input current
IB is zero, then the collector current also becomes zero, and no current flows through
the transistor.

The transistor operates in active region when the base current increases and reaches to
saturation region. The graph is plotted by keeping the base current IB constant and varying the

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emitter-collector voltage VCE, the values of output current IE are noticed with respect to VCE.
By using the VCE and IE at constant IB the output characteristic curve is drawn.

COMPARISON OF TRANSISTOR CONFIGURATION

SMALL SIGNAL – LOW FREQUENCY H – PARAMETER MODEL

Let us consider transistor amplifier as a block box as shown in the Fig. 12.1.

Here, Ii : is the input current to the amplifier

Vi : is the input voltage to the amplifier
Io : is the output current to the amplifier and
Vo : is the output voltage to the amplifier
As we know transistor is a current operated device, input current is an independent variable.
The input current, Ii and output voltage Vodevices the input voltage Vi as well as the output
current Io. Hence input voltage Vi and outpur current Io are the dependent variables, whereas
input current Ii and output voltage Vo are independent variables. Thus we can write
Vi = f1 (Ii, Vo) ... (1)
Io = f2 (Ii, Vo) … (2)
This can be written in the equation form as follows
Vi = h11 Ii + h12 Vo ... (3)
Io = h21 Ii + h22 Vo ... (4)
The above equations can also be written using alphabetic notations,
Vi = hi . Ii + hr . Vo ... (5)
Io = hf . Ii + ho . Vo ... (6)
Definitions of h – parameter
The parameters in the above equation are defined as follows:

h11 = = input resistance with output short – circuited, in ohms..

h12 = = Fraction of output voltage at input with input open circuited.

This parameter is ratio of similar quantities, hence unitless

h21 = = Forward current transfer ratio or current gain with output

short circuited.
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This parameter is a ratio of similar quantities, hence unitless.

h22 = = Output admittance with input open-circuited, in mhos.

From the above discussion we can say that, these four parameters are not same. They have
different units. In other words, they are mixture of different units and hence referred to as
hybrid parameters. As we use small letter for ac analysis, these are commonly known as h-
parameters. The standard notations can be given as
i = 11= input o = 22 = output
f = 21 = forward transfer r = 12 = reverse transfer
Thus we can write h-parameters as follows.
a) With output short circuited :
h11 = hi : Input resistance
h21 = hf : Short circuit current gain
b) With input open circuited :
h12 = hr : Reverse voltage transfer ratio
h22 = ho : output admittance.
H- parameter equivalent circuit for transistor is shown in the following figure

In order to analyze transistorized amplifier circuit and calculate its input impedance, output
impedance, current gain and voltage gain, it is necessary to replace transistor circuit with its
equivalent. The equivalent circuit can be drawn with the help of two equations, as shown in
Fig. 1.10.
Vi = hi Ii + hr Vo Io = hf Ii + ho Vo
Many transistor models have been proposed, each one having its advantages and
disadvantages. The transistor model used in this text is in terms of h-parameters.

Benefits of h-parameters
Real numbers at audio frequencies.
Easy to measure.
Can be obtained from the transistor static characteristics curves.
Convenient to use in circuit analysis and design.
Most of the transistor manufacturers specify the h-parameters.

H – parameters equivalent circuit for CE configuration in the following figure

Simple common emitter configuration

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To see how we can derive a hybrid model for a transistor, let us consider the common emitter
configuration as shown in the above figure.. The variables Ib, Ic, Vb and Vc represent total
instantaneous currents and voltages.
Ib = input current
Ic = output current
Vbe = input voltage
Vce = output voltage.
The following figure shows the h-parameter equivalent circuit for the common emitter
configuration.
h-parameter equivalent circuit for the common emitter configuration

From the h-parameter equivalent circuit of the common emitter configuration we can
write,
Vbe = hie Ib + hre Vce …(7)
Ic = hfe Ib + hoe Vce …(8)

The quantities ∆VBE (Vbe), ∆VCE (Vce), ∆IB (Ib) and ∆IC (Ic) represent the small change in base
and collector voltages and currents.

H-PARAMETERS FOR ALL THREE CONFIGURATIONS

As mentioned earlier, transistor can be represented as a two port network by making any one
terminal common between input and output. Since there are three possible configurations in
which a transistor can be used, there is a change in terminal voltage and current for different
transistor configurations. For different configurations the relation between input parameters
and output parameters also differs. Therefore, one needs to define different set of h-
parameters for different configurations. To designate the type of configuration another
subscript is added to the h-parameters.
For example :
hie = h11e = input resistance in common emitter configuration.
hfb = h21b = short-circuit current gain in common base configuration.

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The following table summarizes the h-parameters for all the three configurations.
parameter CB CE CC

Input resistance hib hie hic

Reverse voltage gain hrb hre hrc

Forward transfer current gain hfb hfe hfc

Output admittance hob hoe hoc

The Bipolar Transistor (Ebers Moll Model)

The bipolar transistor is an electronic device that originates a big evolution in the electronics
field. The basic features of the bipolar transistor are introduced on this topic. We’ll study the
basic models of these devices and their use in the analysis of circuits biasing.

Biasing a bipolar transistor is necesary for many linear and non linear applications, because it
establishes the voltage ranges and the direct current that is going to circulate on the transistor.

A bipolar transistor has two back to back PN junctions. Physically, the transistor consists of
three regions: emitter, base and collector. The base region is very thin (<1 µ m).

When the transistor operates in active mode, The emitter-base junction is forward biased and
the base-collector junction is reverse biased. In this case the directions of the currents and the
voltages are shown in the above pictures.

The relation between the currents is: IE = IB + IC, and …

VCE = VCB + VBE for an NPN transistor.

VCE = VEB + VBC for an PNP transistor.

Ebers Moll Model of a Bipolar Transistor

Ebers and Moll created a model between the current and voltages in the transistor terminals .
This model, known as the Ebers Moll model sets the following general equations, for
an NPN transistor:

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IES and ICS represent saturation current for emitter and collector junctions, respectively. αaF
is the common base forward short circuit current gain (0.98 to 0.998) αR is the injection of
minority carriers fraction. In a PNP bipolar transistor, the Ebers Moll model equations are:

For the ideal transistor, the previous four parameters are related by the Reciprocity
Theorem. αFIES = αRICS. Tipical values of these parameters are: αF = 0.99, αR= 0.66, IES = 10-
15
A, ICS = 10-15A.

MULTIPLE-EMITTER TRANSISTOR

A multiple-emitter transistor is a specialized bipolar transistor mostly used at the

inputs of TTL NAND logic gates. Input signals are applied to the emitters. Collector current
stops flowing only if all emitters are driven by the logical low voltage, thus performing
a NAND logical operation using a single transistor. Multiple-emitter transistors
replace diodes of DTL and allow reduction of switching time and power dissipation.

cross section and symbol of a simple NPN bipolar

transistor

cross section and symbol of a multiple emitter NPN bipolar transistor

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UNIT-3

FIELD EFFECT TRANSISTORS

JFETs – Drain and Transfer characteristics,-Current equations-Pinch off voltage and

its significance- MOSFET- Characteristics- Threshold voltage -Channel length
modulation, D-MOSFET, E-MOSFET- Characteristics – Comparison of MOSFET with
JFET

INTRODUCTION:

The JFET is abbreviated as Junction Field Effect Transistor. JFET is just like a normal
FET. The types of JFET are n-channel FET and P-channel FET. A p-type material is added
to the n-type substrate in n-channel FET, whereas an n-type material is added to the ptype
substrate in p-channel FET. Hence it is enough to discuss one type of FET to understand
both.

N-Channel FET
The N-channel FET is the mostly used Field Effect Transistor. For the fabrication of
Nchannel FET, a narrow bar of N-type semiconductor is taken on which P-type material is
formed by diffusion on the opposite sides. These two sides are joined to draw a single
connection for gate terminal. This can be understood from the following figure.

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These two gate depositions (p-type materials) form two PN diodes. The area between gates is
called as a channel. The majority carriers pass through this channel. Hence the cross
sectional form of the FET is understood as the above figure.

Ohmic contacts are made at the two ends of the n-type semiconductor bar, which form the
source and the drain. The source and the drain terminals may be interchanged.

OPERATION OF N-CHANNEL FET

Before going into the operation of the FET one should understand how the depletion layers
are formed. For this, let us suppose that the voltage at gate terminal say VGG is reverse
biased while the voltage at drain terminal say VDDis not applied. Let this be the case 1.

 In case 1, When VGG is reverse biased and VDD is not applied, the depletion regions
between P and N layers tend to expand. This happens as the negative voltage applied,
attracts the holes from the p-type layer towards the gate terminal.

 In case 2, When VDD is applied (positive terminal to drain and negative terminal to
source) and VGG is not applied, the electrons flow from source to drain which
constitute the drain current ID.

Let us now consider the following figure, to understand what happens when both the
supplies are given.

The supply at gate terminal makes the depletion layer grow and the voltage at drain terminal
allows the drain current from source to drain terminal. Suppose the point at source terminal
is B and the point at drain terminal is A, then the resistance of the channel will be such that
the voltage drop at the terminal A is greater than the voltage drop at the terminal B. Which
means,

VA>VB

Hence the voltage drop is being progressive through the length of the channel. So, the
reverse biasing effect is stronger at drain terminal than at the source terminal. This is why

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the depletion layer tends to penetrate more into the channel at point A than at point B, when
both VGG and VDD are applied. The following figure explains this.

Now that we have understood the behavior of FET, let us go through the real operation of
FET.

DEPLETION MODE OF OPERATION

As the width of depletion layer plays an important role in the operation of FET, the name
depletion mode of operation implies. We have another mode called enhancement mode of
operation, which will be discussed in the operation of MOSFETs. But JFETs have only
depletion mode of operation.

Let us consider that there is no potential applied between gate and source terminals and a
potential VDD is applied between drain and source. Now, a current ID flows from drain to
source terminal, at its maximum as the channel width is more. Let the voltage applied
between gate and source terminal VGGis reverse biased. This increases the depletion width,
as discussed above. As the layers grow, the cross-section of the channel decreases and hence
the drain current ID also decreases.

When this drain current is further increased, a stage occurs where both the depletion layers
touch each other, and prevent the current ID flow. This is clearly shown in the following
figure.

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The voltage at which both these depletion layers literally “touch” is called as “Pinch off
voltage”. It is indicated as VP. The drain current is literally nil at this point. Hence the drain
current is a function of reverse bias voltage at gate.

Since gate voltage controls the drain current, FET is called as the voltage controlled device.

CHARACTERISTICS OF JFETS

There are two types of static characteristics viz

(1) Output or drain characteristic and

(2) Transfer characteristic.

OUTPUT OR DRAIN CHARACTERISTIC.

The curve drawn between drain current Ip and drain-source voltage VDS with gate-to source
voltage VGS as the parameter is called the drain or output characteristic. This characteristic is
analogous to collector characteristic of a BJT:

(a) Drain Characteristic with Shorted-Gate

The circuit diagram for determining the drain characteristic with shorted-gate for an N-
channel JFET is given in figure. And the drain characteristic with shorted-gate is shown in
another figure.

Drain-Characteristics-of-JFET

Initially when drain-source voltage Vns is zero, there is no attracting potential at the drain, so
no current flows inspite of the fact that the channel is fully open. This gives drain current Ip =
0. For small applied voltage Vna, the N-type bar acts as a simple semiconductor resistor, and
the drain current increases linearly with_the increase in Vds, up to the knee point. This
region, (to the left of the knee point) of the curve is called the channel ohmic region, because
in this region the FET behaves like an ordinary resistor.
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With the increase in drain current ID, the ohmic voltage drop between the source and channel
region reverse-biases the gate junction. The reverse-biasing of the gate junction is not
uniform throughout.

The reverse bias is more at the drain end than that at the source end of the channel, so with
the increase in Vds, the conducting portion of the channel begins to constrict more at the
drain end. Eventually, a voltage Vds is reached at which the channel is pinched off. The drain
current ID no longer increases with the increase in Vds.

It approaches a constant saturation value. The value of voltage VDS at which the channel is
pinched off (i.e. all the free charges from the channel get removed), is called the pinch-off
voltage Vp. The pinch-off voltage Vp, not too sharply defined on the curve, where the drain
current ID begins to level off and attains a constant value.

From point A (knee point) to the point B (pinch-off point) the drain current ID increases with
the increase In voltage Vdsfollowing a reverse square law. The region of the characteristic in
which drain current IDremains fairly constant is called the pinch-off region. It is also
sometimes called the saturation region or amplifier region.

In this region the JFET operates as a constant current device sincedrain current (or output
current) remains almost constant. It is the normal operating region of the JFET when used as
an amplifier. The drain current in the pinch-off region with VGS = 0 is referred to the drain-
source saturation current, Idss).

It is to be noted that in the pinch-off (or saturation) region the channel resistance increases in
proportion to increase in VDS and so keeps the drain current almost constant and the reverse
bias required by the gate-channel junction is supplied entirely by the voltage drop across the
channel resistance due to flow of IDsg and not by the external bias because VGS = 0

Drain current in the pinch-of region is given by Shockley’s equation

where ID is the drain current at a given gate-source voltage VGS, IDSS is the drain-current with
gate shorted to source and VGS (0FF) is the gate-source cut-off voltage.

If the drain-source voltage, Vds is continuously increased, a stage comes when the gate-
channel junction breaks down. At this point current increases very rapidly. and the JFET may
be destroyed. This happens because the charge carriers making up the saturation current at
the gate channel junction accelerate to a high velocity and produce an avalanche effect.

DRAIN CHARACTERISTICS WITH EXTERNAL BIAS

The circuit diagram for determining the drain characteristics with different values of external
bias is shown in figure. and a family of drain characteristics for different values of gate-
source voltage VGS is given in next figure

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External-Bias-Characteristic-of-JFET

(2) Pinch-off voltage is reached at a lower value of drain current ID than when VGS = 0.
When an external bias of, say – 1 V is applied between the gate and the source, the gate-
channel junctions are reverse-biased even when drain current, ID is zero. Hence the depletion
regions are already penetrating the channel to a certain extent when drain-| source voltage,
VDS is zero. Due to this reason, a smaller voltage drop along the channel (i.e. smaller than
that for VGS = 0) will increase the depletion regions to the point where 1 they pinch-off the
current. Consequently, the pinch-off voltage VP is reached at a lower 1 drain current, ID when
VGS = 0.

(3) The ohmic region portion decreases.

(4) Value of drain-source voltage VDS for the avalanche breakdown of the gate junction is
reduced.

Value of drain-source voltage, VDS for breakdown with the increase in negative bias voltage
is reduced simply due to the fact that gate-source voltage, VGS keeps adding to the I reverse
bias at the junction produced by current flow. Thus the maximum value of VDS I that can be
applied to a FET is the lowest voltage which causes avalanche breakdown. It is also observed
that with VGS = 0, ID saturates at IDSS and the characteristic shows VP = 4 V. When an
external bias of – 1 V is applied, the gate-channel junctions still require -4 V to achieve
pinch-off. It means that a 3 V drop is now required along the channel instead of the previous
4.0 V. Obviously, this drop of 3 V can be achieved with a lowervalue of drain current,
Similarly when VGS = – 2 V and – 3 V, pinch-off is achieved with 2 V and 1 V respectively,
along the channel. These drops of 2 V and 1 V are, of course, achieved with further reduced
values of drain current, ID. It is further observed that when the gate-source bias is
numerically equal to pinch-off voltage, VP (-4 V in this case), no channel drop is required
and, therefore, drain current, ID is zero. The gate-source bias voltage required to reduce drain
current, ID to zero is designated the gate-source cut-off voltage, VGS /0FF) and, as
explained,Hence for working of JFET in the pinch-off or active region it is necessary that the
following conditions be fulfilled.

VP < VDS < VDS (max)

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VGS (OFF)< VGS < 0

0 < ID < IDSS

2. Transfer Characteristic of JFET

The transfer characteristic for a JFET can be determined experimentally, keeping drain-
source voltage, VDS constant and determining drain current, ID for various values of gate-
source voltage, VGS. The circuit diagram is shown in fig. 9.7 (a). The curve is plotted between
gate-source voltage, VGS and drain current, ID, as illustrated in fig. 9.8. It is similar to the
transconductance characteristic of a vacuum tube or a transistor. It is observed that

(i) Drain current decreases with the increase in negative gate-source bias

(ii) Drain current, ID = IDSS when VGS = 0

(iii) Drain current, ID = 0 when VGS = VD The transfer characteristic follows equation (9.1)

The transfer characteristic can also be derived from the drain characteristic by noting values
of drain current, IDcorresponding to various values of gate-source voltage, VGS for a constant
drain-source voltage and plotting them.

It may be noted that a P-channel JFET operates in the same way and have the similar
characteristics as an N-channel JFET except that channel carriers are holes instead of
electrons and the polarities of VGS and VDS are reversed.

Transfer-Characteristics-of-JFET
ADVANTAGES OF JFET
A JFET is a voltage controlled, constant current device in which variation in input voltage
control the output current. Some of the advantages of JFET are:

1. It has a very high input impedance. This permits high degree of isolation between the
input and output circuits.

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2. The operation of a JFET depends upon the bulk material current carriers that do not
cross junctions. Therefore, the inherent noise of tubes and those of transistors are not
present in a JFET.
3. A JFET has a negative temperature co-efficient of resistance. This avoids the risk of
thermal runaway.
4. A JFET has a very high power gain. This eliminates the necessity of using driver
stages.
5. A JFET has a smaller size, longer life and high efficiency.

MOSFET (Metal oxide semiconductor Field effect Transistor)

 The Metal Oxide Semiconductor Field Effect Transistor also Known as Insulated
Gate Field Effect Transistor (IGFET) is another type of FET.
 The main advantage of this type of FET is that it has very large input impedance
tending to infinity, compared to that of JFET.
 This is due to the fact that the gate of the device is insulated from the channel between
the source and drain.
 The metal contact of the gate is separated from the semiconductor channel by an
insulating layer of SiO2. Thus total electrical isolation of the gate is achieved.
 MOSFET are very small and hence can be used to design high density VLSI circuits.
Three terminals of MOSFETs are gate, drain and source.
 Gate is insulated from the channel by a SiO2 layer. Due to this input resistance of
MOSFET is greater than JFET.Based on the construction, MOSFET are two types

1. Depletion type( D-MOSFET)

2. Enchancement type (E-MOSFET)

Depletion MOSFET (D-MOSFET)

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 On the application of drain to source voltage VDS and keeping VGS =0 by directly
connecting gate terminal to the source terminal, free electrons from the N-channel are
attracted towards positive potential of drain terminal. This establishes current IDSS (at
VGS=0v) through the channel.
 If negative gate voltage is applied, the negative charges on gate repel conduction
electrons from channel and attract holes from p-type substrate. This initiates
recombination of repelled electrons and attracted holes.
 The level of recombination between electrons and holes depends on the magnitude of
negative voltage applied at gate. This recombination reduces number of free electrons
in N-channel for conduction reducing drain current.
 For positive values of VGS positive gate will draw additional electrons from P-type
substrate due to reverse leakage current and establish new carrier through collision
between accelerating particles. Due to this gate to source voltage increases in positive
direction drain current increases.
 Thus application of a positive gate to source voltage has enhanced the level of free
carriers in the channel compared to that when VGS=0v.So region of positive gate
voltages on drain or transfer characteristics between cut off and saturation levels of
IDSS is referred to as depletion region.

i) ID=0 VGS (off); VGS (off) = -VP

ii) VGS = 0 IDSS

iii) Both positive and negative values of VGS can be used to bias D-MOSFET

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ENHANCEMENT MOSFET (E-MOSFET)

 In E-MOSFET the channel between the two N-regions is absent.

 On application of VDS, keeping VGS=0 no current flows. If VGS is increased positively,
the concentration of electrons near SiO2 surface increases.
 At a particular value of VGS there is sufficient current flow between drain and source.
This value of is VGS called threshold voltage, denoted by VT.
 Any voltage VGS ≥ VT, induces a channel and hence the drain current by creating a
thin layer of negative charges in substrate region adjacent to SiO2 layers.
 The conductivity of channel is enchanced by increasing the gate to source voltage and
thus pulling more electrons into channel.
 For any voltage below VT there is no channel.

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MOSFET Threshold Voltage

 The threshold voltageVth of a MOSFET is the value of gate source voltage when
conducting channel just begins to connect the source and drain contacts of transistor
allowing significant current to flow.
 Threshold voltage is affected by substrate doping, oxide thickness, source to substrate
voltage bias, gate material and surface charge density.
 When VGS ≥ VTH (nMOSFET) the semiconductor /oxide interface is inverted, i.e., the
inversion layer is formed.The associated depletion region thickness is described by

where

The charge attracted under the MOS gate is described by

In accumulation mode

When increasing VGS (positively) results in , the semiconductor surface at oxide

interface becomes depleted.

Continuing to increase VGS till results in the formation of inversion channel

The value of VGS till is VTHN.In this situation negative charge in the depletion
region is described by

Between strong inversion and depletion changed a total of

Threshold voltage expression :

Where

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and

The value of is obtained by adding the contact potentials

Metal Metal
1 1
Bulk (substrate connection

Polysilicon øG

SiO2 øox
p-substrate øF

Fig.Contact potential between Poly and Substrate

CHANNEL LENGTH MODULATION

 Channel length Modulation is one of the several short-channel effects in MOFSET

scaling, Channel Length Modulation (CLM) is a shortening of the length of the
inverted channel region with increase, in drain bias for large drain biases.
 The result of CLM is an increase in current with drain bias and a reduction of output
resistance. Channel length modulation occurs in all field effect transistors, not just
MOFSETs.
 To understand the effect, first the phenomenon of pinch-off of the channel is
introduced.
 The channel formed by attraction of carriers to the gate, and the current drawn
through the channel is nearly a constant independent of drain voltage in saturation
mode .
 However, near the drain, the gate and drain jointly determine the electric field pattern.
Instead of flowing in a channel, beyond the pinch-off point the carrier flow in a
subsurface pattern made possible because the drain and gate both control the current.
 In the figure, the channel is indicated by a dashed line and becomes weaker as a drain
is approached, leaving a gap of uninverted silicon between the end of the formed
inversion layer and the drain (pinch-off region).
 As the drain voltage increases its control over the current extends further toward the
source ,so the uninverted region expands toward the source, shortening the length of
the channel region , the effect called channel-length modulation.

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Above pinch –off (when VDS > VDSsat = VGS –VT) the channel length reduces by a value ΔL.

 Since resistance is proportional to length shortening the channel decreases its

resistance, causing an increase in current with increase in drain bias for a MOSFET
operating in saturation. The effect is more pronounced the shorter source to drain
separation the deeper drain junction and thicker the oxide insulator.
 In weak inversion region, influence of drain analogous to channel length modulation
leads to poorer device turn off behavior known as drain- induced barrier lowering
drain induced lowering of threshold voltage.
 In bipolar devices a similar increase in current is seen with increased collector voltage
due to base narrowing known as early effect. The similarly in effect upon current has
led to use the term Early Effect for MOSFET as well as an alternative name for
channel length modulation.

COMPARISION BETWEEN MOSFET AND JFET

JFET MOSFET

1. The input resistance is of the order of 109 1. The input resistance is very high in the
Ωsince there is no insulating layer between order of 1013 Ω due to the presence of
gate and the conducting channel. insulating layer between gate and conducting
channel.
2The gate leakage current is in the order of
0.1 to 10mA. 2. The gate leakage current is in the order of
0.1 to 10PA.
3.The drain resistance is in the order of 0.1 to
1MΩ 3.The drain resistance is in the order of 1 to
50KΩ
4. Electric field across the reverse biased pn
junction controls the conductivity of the 4. Electric field across the insulating layer
channel. controls the conductivity of the channel.

5. Operates only in depletion mode. 5. The depletion mode MOSFET operates

both in enhancement and depletion modes.
6. VGS for an n-channel JFET cannot be
allowed to go positive since that would 6. Gate source voltage of a depletion mode
forward bias the gate source p-n junction and MOSFET can be negative or positive.
cause a large gate current to flow.

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UNIT IV
SPECIAL SEMICONDUCTOR DEVICES

Metal-Semiconductor Junction- MESFET, FINFET, PINFET, CNTFET, DUAL GATE

MOSFET, Schottky barrier diode-Zener diode-Varactor diode –Tunnel diode- Gallium
Arsenide device, LASER diode, LDR.

METAL-SEMICONDUCTOR JUNCTION – SCHOTTKY BARRIER

Consider what happens when metal is brought into contact with an n-type semiconductor.

Band Diagram before contact

Metal n-type Semiconductor

m - work function of metal

s - work function of semiconductor

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Fermi levels of metal and semiconductor at different energies - unstable
energetically

 upon contact, electron flow between materials until Fermi levels equilibriate
If m > s (as drawn), electrons flow from semiconductor to metal.

Band diagram after

Metal Semiconductor

Electron density in semiconductor is much less than in metal

 electron flow from semiconductor to metal depletes a substantial volume of

the semiconductor of charge carriers leaving positively ionised donors

 depletion layer.

Energy barrier - m –s

This arises due to an electrostatic dipole layer between electrons transferred to metal and the
positively ionised donors in depletion layer
How wide is barrier? Can get this using Poisson’s equation in depletion region (between x =
0 and x = x0).

WIDTH OF DEPLETION REGION

Poisson’s equation in 1-D
2
dV 

dx 2
 0

[Relates potential V to charge density ]

     = dielectric constant

In depletion region:  = Nde

[Nd – density of ionised donors]

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Electron energy,  = - eV

d Ne
2 2

 d

dx  2
0

Solving subject to the boundary conditions

 = (d/dx) = 0 at x =0

 = m – s at x = x0

find that
2 2
N xe
   d 0 0

2
m s
0

1

So: Width of depletion layer (x0)  N 2

d

Typically 100 Å < x0 < 1000 Å

CURRENT-VOLTAGE (I-V) BEHAVIOUR

So previous result tells us:

For heavy doping (large Nd)

 barrier becomes thin compared to electron mean free path (x0 very small)
 Can effectively consider junction as 2 thermionic emitter facing one another across
barrier.

In zero applied bias (voltage) – currents equal and opposite

Ism = current from semiconductor to metal

Ims = current from metal to semiconductor

Equilibrium current I0 for thermionic emitter (at temp’ T) can be written as

    
I0 = A exp
 kT 
m s

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(c.f. Dushman-Richardson eq’n)
Consider applying forward bias (voltage) V to junction.

Fermi level of semiconductor is raised relative to that in metal  current from

semiconductor to metal Ism is increased

       eV 
Ism = A exp
m s

 kT 

 eV 
= I exp 
 kT 
0

Work function effectively lowered.

Current from metal to semiconductor Ims remains constant and is therefore I0.

So net current I in forward bias is given by

I = Ism - Ims

 eV 
I = I [exp   1]
 kT 
0

Similarly, in reverse bias –V, can show

  eV 
I  I [1  exp ]
 
0
kT
Fermi level in semiconductor is lowered relative to Fermi level in metal.

Rectifying action  diode behaviour

FinFET

In 1989,Hisamato fabricated a double-gate SOI structure which they called a fully-depleted

lean channel transistor (DELTA). This was the first reported fabrication of a FinFET-like
structure. FinFETs have attracted increasing attention over the past decade because of the

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degrading short-channel behavior of planar MOSFETs. While the planarMOSFET channel is
horizontal, the FinFET channel (also known as the fin) is vertical.

Fig: FinFET

Hence, the height of the channel (𝐻FIN) determines the width (𝑊) of the FinFET. This leads
to a special property of FinFETs known as width quantization. This property says that the
FinFET width must be a multiple of 𝐻FIN, that is, widths can be increased by using multiple
fins. Thus, arbitrary FinFET widths are not possible. Although smaller fin heights offer more
flexibility, they lead to multiple fins, which in turn leads to more silicon area. On the other
hand, taller fins lead to less silicon footprint, but may also result in structural instability.
Typically, the fin height is determined by the process engineers and is kept below four times
the fin thickness.

Although FinFETs implemented on SOI wafers are very popular, FinFETs have also been
implemented on conventional bulk wafers extensively. Trigate FETs, referred to
interchangeably as FinFETs, so far, are a variant of FinFETs, with a third gate on top of the
fin. Intel introduced Trigate FETs at the 22nm node in the Ivy-Bridge processor in 2012
Due to the presence of the third gate, the thickness of the fin also adds to the channel width.
Hence, Trigate FETs enjoy a slight width advantage over FinFETs. Trigate FETs also have
less gate-source capacitance compared to FinFETs due to additional current conduction at the
top surface, but this advantage is diminished by increased parasitic resistance.

FINFET CHARACTERISTICS:
Carrier mobility: Lightly doped or undoped fin body increases carrier mobility. Short
channel length enables velocity overshoot, which increases mobility. Low Vth decreases the
vertical electric field, which increases carrier mobility.
Tunneling effects: Gate to channel tunneling, Band to band tunneling at PN junction
Parasitic resistance: a raised source/drain structure can be used to reduce the parasitic
resistance. However, the overlap capacitance is increased. Prasitic resistance is the main
adverse factor which prevents finfets’ application, which leads to lower speed and high noise.

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Advantages:
1. Having excellent control of short channel effects in submicron regime and making
transistors still scalable. Due to this reason, the small- length transistor can have a
larger intrinsic gain compared to the bulk counterpart.
2. Much Lower off-state current compared to bulk counterpart.
3. Promising matching behavior.
Applications:
1. Low power design in digital circuit, such as RAM, because of its low off-state
current.
2. Power amplifier or other application in analog area which requires good linearity.

CNTFETs
The miniaturization has always a key role in electronic evolution: at each generation the
miniaturization allows to obtain higher speed, lower power dissipation, lower costs and higher number
of gates on chip.

Nowadays the known devices are very smaller, and a further reduction in size would give rise to
tunnel effects thus degrading the whole performances. Therefore, the scientific community is looking
for a new kind of devices, able to work better at nanometer scale, which is the ultimate limit in
miniaturization.Along with these new devices, molecular electronics will change the equation in our
tool box, we will drop out well known partial differential equation for charge diffusion and we will
use quantum mechanic to describe electrons, holes, atoms, molecules and photons. In coming years
we will gain new tools from chemistry and physics, new sophisticated mathematical tool to include
probability amplitude waves.
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Carbon NanoTube Field Effect Transistors (CNTFET) are a new kind of molecular device. They are
field effect transistors using a carbon nanotube as channel, and are regarded as an important
contending device to replace conventional silicon transistors . There are basically three types of
CNTFETs:

 Schottky Barrier (SB) CNTFET

 Partially-Gated (PG) CNTFET

 MOS-like CNTFET (also known as C-CNTFET).

Early SB-CNTFETs have been typically p-type devices: the current carriers are holes and the devices
are considered ON for negative gate bias. N-type CNTFETs can be obtained by direct doping of the
tube with an electropositive element or by a simple annealing process of p-type CNTFETs.

To understand the operation of a SB-CNTFET, it is necessary to examine the energy band diagram
for the structure. At the intersection between the metal contacts and the semiconducting carbon
nanotube, Schottky barriers are created. The energy band diagrams are shown in Fig.

The current in CNTFETs is from the tunneling of carriers through the Schottky barriers. The type of
metal for the contacts is chosen so that its work function forces the metal Fermi Level to lie between
the valance and conduction band of the CNT.

For short channels, the CNT channel can become ballistic and hence, the metal contact resistance and
the Schottky barriers at the source and drain ends limit the current drive through the nanotube. Thus, a
low contact resistance, such as that of Titanium, is desirable. Presently, the control of the metal
contacts to carbon nanotubes is not consistent and the tunneling current levels between transistors can
vary greatly.
When a negative voltage is applied between the drain and source, the band structure, of the CNT, is
modulated to account for the drain to source voltage (Vds), as shown in Fig. 5.

Band diagrams for a SB-CNTFETs in the ’off’ and ’on’ states respectively.

When a small negative gate to source voltage is applied, CNTFET is in the subthreshold
condition. With a negative gate voltage applied, the Schottky barrier width at the source is
modulated, allowing for holes or electrons to tunnel through the valence band and pass to the
drain. This condition is shown in Fig. The thickness of the source Schottky barrier at the
metal Fermi level decreases exponentially with an increasing gate to source voltage. Thus,
the tunnel current through the Schottky barrier increases exponentially, inversely to the
barrier thickness.

In Fig the exponential current-voltage characteristics of the subthreshold condition is shown.

Moreover Id-Vgs characteristic does not differ greatly changing Vds because the drain voltage
does not significantly control the source Schottky barrier.
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Figure . a) Subthreshold band diagrams for SB-transistors; b) I-V characteristics in subthreshold

condition.

This exponential current relation can be seen in Fig, in which it is easy to see that the
subthreshold characteristics do not vary largely with Vds and the subthreshold slope remains
relatively constant with temperature.

Experimental Id versus Vgs subthreshold characteristics for a p-type transistor, with a channel
length of 300 nm and a gate oxide thickness of 20 nm (from [18]).

The transistor threshold voltage, where the device acts similarly to an ’on’ MOSFET, is
reached when the metal source Fermi level is approximately even with the valence or
conduction band of the CNT, in a p-channel or n-channel respectively. If the gate voltage
continues to increase above this threshold, the Schottky barrier thickness at the source will
remain constant and the current will not continue to increase exponentially. Above the
threshold voltage, the current will only increase linearly with Vds.

Above the CNTFET threshold voltage, the I-V characteristics are very similar to a MOSFET
I-V characteristics: the current increases linearly with Vds; and, when the barrier at the drain
is completely eliminated, the FET current saturates.

The Id-Vds characteristics for a saturated SB-CNTFETs have a very little slope, unlike short
channel MOSFETs.

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PG-CNTFETs are uniformly doped (or uniformly intrinsic) with ohmic contacts at their
ends. PG-CNTFETs can be of n-type or ptype when respectively n-doped or p-doped.
These devices work in a depletion mode (uniformly n/p doped): the gate locally depletes the
carriers in the nanotube and turns OFF the p-type device with an efficiently positive threshold
voltage (efficiently negative for n-type) that approaches the theoretical limit for room-
temperature operation. The ON current of such devices is limited by a “source exhaustion”
phenomenon.

When the CNT is intrinsic, CNTFETs operate in enhancement mode and exhibit n- or p-type
unipolar behaviour.

In case of MOS-like CNTFETs the source and drain are basically semiconductors p-type or
n-type which are heavily doped [2-3]. These devices, also denoted as conventional CNTFETs
or C-CNTFETs, show the best performances in terms of “on-off” ratio currents and
subthreshold swing.

Fig. shows a 3D representation of a C-CNTFET, whose conduction behaviour is similar to a

common MOSFET.

Figure: 3D representation of a C-CNTFET.

When a positive voltage is applied between drain and source (VDS> 0 V), the hypothesis of
ballistic transport allows to assert that the current is constant along the CNT and therefore can
be calculated at the beginning of the channel, near the source, at the maximum of conduction
band, where electrons from the source take up energy levels related to states with positive
wave number, while the electrons from the drain take up energy levels related to states with
negative wave number. C-CNTFETs, with reference to SB-CNTFETs, show the following
Advantages:

1. unipolar characteristics and, therefore, faster;

2. reduction of the leakage current in the off state, due to absence of the Schottky barrier;
3. greater scalability;
4. A switch-on current of the source-channel junction significantly higher.
However, the control of the doping with ion implantation techniques are very difficult
because the ions can replace the carbon atoms and destroy the desired properties of
nanotubes.

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DUAL GATE MOSFET:The circuit symbol from the dual gate MOSFET expands the basic
single gate MOSFET and adds a second gate into the input. Enhancement and depletion mode
as well as N channel and P channel devices can be described, although P channel devices
tend not to be used much for RF applications because hole mobility is much less than electron
mobility.

The basic dual gate MOSFET circuit symbols are shown below:

Dual gate MOSFET structure

The dual gate MOSFET has what may be referred to as a tetrode construction where the two
grids control the current through the channel.

The different gates control different sections of the channel which are in series with each
other.

Dual gate MOSFET applications

Dual gate MOSFETs are used in many applications. Their attributes and characteristics mean
that they can provide some distinct advantages for some forms of circuit.

 RF amplifier: Dual gate MOSFETs are able to operate with improved performance
as amplifiers over single gated FETs. The dual gate MOSFET enables a cascode two
stage amplifier to be constructed using a single device.

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The cascade amplifier helps overcome the Miller effect where capacitance is present
between the input and output stages. Although the Miller effect can relate to any
impedance between the input and output, normally the most critical is capacitance.
This capacitance can lead to an increase in the level of input capacitance experienced
and in high frequency (e.g. VHF & UHF) amplifiers it can also lead to instability.

The effect is overcome by using a cascade amplifier using a single dual gate FET. In
this configuration, biasing the drain-side gate at constant potential reduces the gain
loss caused by Miller effect. The effects of capacitive coupling between the input and
output are virtually eliminated.

In this circuit the lower or input FET section is in a self-biased, common-source

configuration. The upper or output FET section is configured in a in a voltage-divider biased,
common-gate configuration.

Effectively a cascade amplifier is a two-stage amplifier formed from a trans-conductance

amplifier which is followed by a current buffer. This provides a high level of input-output
isolation, high input impedance, high output impedance, higher gain or higher bandwidth
when compared to a single stage amplifier.

A cascode amplifier using a dual gate MOSFET is commonly used in radio receiver front
ends. In these applications, the dual-gate MOSFET is operated as a common source amplifier
with the primary gate, i.e. gate 1, G1 connected to the input and the second gate, G2
grounded to RF via the capacitor.

 RF mixer / multiplier: The dual gate MOSFET is able to provide a basis for an RF mixer.
The dual gate MOSFET operation enables both the local oscillator and RF signal inputs to be
accommodated. As shown in the circuit below, the RF signal is normally applied to gate 1and

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the local oscillator to gate 2.

 The operation of this dual gate MOSFET circuit is relatively easy to understand. The
RF signal appears at gate 1 and controls the channel current in the normal way.
However the much higher level local oscillator signal is applied to gate 2 and
superimposes its effect on the channel current.
 Level / gain control: The output from the dual gate MOSFET is proportional to the
input at both of the gates. With a constant level at gate 1, for example, varying the
voltage on gate 2 will alter the output level. Accordingly the dual gate MOSFET can
be used to provide linear gain control.

The dual gate MOSFET is a useful component to be able to incorporate into circuit designs
when appropriate. Although single gate FETs are by far the most widely used, the
characteristics of the dual gate MOSFET can provide some very useful improvements in
performance in some applications.

Metal-Semiconductor Field Effect Transistor (MESFETs)

MESFET stands for metal–semiconductor field effect transistor. It is quite similar to a

JFET in construction and term inology. The difference is that instead of using a p-n junction
for a gate, a Schottky (metal-semiconductor) junction is used. MESFETs are usually
constructed in compound semiconductor technologies lacking high quality surface
passivation such as GaAs, InP, or SiC, and are faster but m ore expensive than silicon-based
JFETs or MOSFETs. Production MESFETs are operated up to approximately 45 GHz, and
are commonly used for microwave frequency communications an d radar. From a digital
circuit design perspe ctive, it is increasingly difficult to use MESFETs as th e basis for digital
integrated circuits as the s cale of integration goes up, compared to CMOS silicon based
fabrication.

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The Metal-Semiconductor-Field-Effect-Transistor (MESFET) consists of a conducting
channel positioned between a source and drain contact region as shown in the Figure 4.1. The
carrier flow from source to drain is controlled by a Schottky metal gate. The control of the
channel is obtained by varying the deplletion layer width underneath the metal conta ct which
modulates the thickness of the conducting ch annel and thereby the current between source
and drain.

Figure 4.2 MESFETcharacteristics

Application

Numerous MESFET fabrication possibilities have been explored for a wide variety of
semiconductor systems. Some of the main application areas are:

· military communications: As front end low noise amplifier of microwave receivers in

both military radar devices and communication

commercial optoelectronics

satellite communications

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As power amplifier for output stage of microwave links.

As a power oscillator.

Advantage of the MESFET

· The higher transit frequency of the MESFET makes it particularly of interest for
microwave circuits. While the advantage of the MESFET provides a superior microwave
amplifier or circuit, the limitation by the diode turn-on is easily tolerated.

· Typically depletion-mode devices are used since they provide a larger current and
larger transconductance and the circuits contain only a few transistors, so that threshold
control is not a limiting factor.

· The buried channel also yields a better noise performance as trapping and release of
carriers into and from surface states and defects is eliminated.

· The use of GaAs rather than silicon MESFETs provides two more significant
advantages: first, the electron mobility at room temperature is more than 5 times larger, while
the peak electron velocity is about twice that of silicon.

· Second, it is possible to fabricate semi-insulating (SI) GaAs substrates, which

eliminates the problem of absorbing microwave power in the substrate due to free carrier
absorption.

Disadvantage of the MESFET

· The disadvantage of the MESFET structure is the presence of the Schottky metal gate.
It limits the forward bias voltage on the gate to the turn-on voltage of the Schottky diode.
This turn-on voltage is typically 0.7 V for GaAs Schottky diodes.

· The threshold voltage therefore must be lower than this turn-on voltage. As a result it
is more difficult to fabricate circuits containing a large number of enhancement-mode.

SCHOTTKY BARRIER (HOT-CARRIER) DIODES

A Schottky diode, also known as a hot carrier diode, is a semiconductor diode which
has a low forward voltage drop and a very fast switching action. There is a small voltage
drop across the diode terminals when current flows through a diode.

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A normal diode will have a voltage drop between 0.6 to 1.7 volts, while a Schottky diode
voltage drop is usually between 0.15 and 0.45 volts. This lower voltage drop provides better
system efficiency and higher switching speed.

In a Schottky diode, a semiconductor–metal junction is formed b etween a

semiconductor and a metal, thus creating a Schottky barrier. The N-type semiconductor acts
as the c\athode and the metal side acts as the ano de of the diode. This Schottky barrier result
s in both a low forward voltage drop and very fast swiitching.

Symbol and Construction

It can be seen from the circuit symbol that it is based on the nor mal diode one, but with
additional elements to the bar a cross the triangle shape.

Its construction is quite different from the conventional p-n junction in that a
metalsemiconductor j u n c t i o n is created such as shown in Figure 4.3 . The semiconductor
is normally n-type silicon (although p-type silicon is sometimes used), whiles a host of
different metals, such as molybdenum, platinum, chrome, or tungsten, are used.

Different construction techniques will result in a different set of characteristics for the
device, such as increased frequency range, lower forward bias, and so on. Priorities do not
permit an examination of each technique here, but information will usually be provided by
the manufacturer. In general, how ever, Schottky diode construction results in a more uniform
junction region and a high level of ruggedness.

In both materials, the electron is the majority carrier. In the met al, the level of minority
carriers (holes) is insignificant. When the materials are joined, the electrons in the n-type
silicon semiconductor material immediately flow into the adjoining metal, establishing a

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heavy flow of majority carriers. Since the injected carriers have a very high kinetic energy
level compared to the electrons of the metal, the y are commonly called ―hot carriers.

The additional carriers in the metal establish a ―negative wall in the metal at the boundary
between the two materials. The net result is a ―surface barrier between the two materials,
preventing any further current. That is, any electrons (negatively charged) in the silicon
material face a carrier-free region and a ―negative wall at the surface of the metal.

The application of a forward bias as shown in the first quadrant o f Figure 4.2 will reduce the
strength of the negative barrier through the attraction of the applied positive potential for
electrons from this region. The result is a return to the heavy f low of electrons across the
boundary, the magnitude of which is controlled by the level of the app lied bias potential.

The barrier at the junction for a Schottky diode is less than that of the p-n junction device in
both the forward- and re verse-bias regions. The result is therefore a higher current at the
same applied bias in the forward- and reverse-bias regions. This is a desirable effect in the
forward-bias region but highl y undesirable in the reverse-bias region.

Figure 4.4 Comparison of characteristics of hot carrier and PN

diode

Advantages

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Schottky diodes are used in many applications where other types of diode will not perform as
well. They offer a number of advantages:

· Low turn on voltage: The turn on voltage for the diode is between 0.2 and 0.3 volts for
a silicon diode against 0.6 to 0.7 volts for a standard silicon diode. This makes it have very
much the same turn on voltage as a germanium diode.

· Fast recovery time: The fast recovery time because of the small amount of stored
charge means that it can be used for high speed switching applications.

· Low junction capacitance: In view of the very small active area, often as a result of
using a wire point contact onto the silicon, the capacitance levels are very small.

The advantages of the Schottky diode, mean that its performance can far exceed that of other
diodes in many areas.

Applications

The Schottky barrier diodes are widely used in the electronics industry finding many uses as
diode rectifier. Its unique properties enable it to be used in a number of applications where
other diodes would not be able to provide the same level of performance. In particular it is
used in areas including:

· RF mixer and detector diode: The Schottky diode has come into its own for radio
frequency applications because of its high switching speed and high frequency capability. In
view of this Schottky barrier diodes are used in many high performance diode ring mixers. In
addition to this their low turn on voltage and high frequency capability and low capacitance
make them ideal as RF detectors.

Power rectifier: Schottky barrier diodes are also used in high power applications, as
rectifiers. Their high current density and low forward voltage drop mean that less power is
wasted than if ordinary PN junction diodes were used. This increase in efficiency means that
less heat has to be dissipated, and smaller heat sinks may be able to be incorporated in the
design.

· Power OR circuits: Schottky diodes can be used in applications where a load is driven
by two separate power supplies. One example may be a mains power supply and a battery
supply. In these instances it is necessary that the power from one supply does not enter the
other. This can be achieved using diodes. However it is important that any voltage drop
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across the diodes is minimised to ensure maximum efficiency. As in many other applications,
this diode is ideal for this in view of its low forward voltage drop. Schottky diodes tend to
have a high reverse leakage current. This can lead to problems with any sensing circuits that
may be in use. Leakage paths into high impedance circuits can give rise to false readings.
This must therefore be accommodated in the circuit design.

· Solar cell applications: Solar cells are typically connected to rechargeable batteries,
often lead acid batteries because power may be required 24 hours a day and the Sun is not
always available. Solar cells do not like the reverse charge applied and therefore a diode is
required in series with the solar cells. Any voltage drop will result in a reduction in efficiency
and therefore a low voltage drop diode is needed. As in other applications, the low voltage
drop of the Schottky diode is particularly useful, and as a result they are the favoured form of
diode in this application.

· Clamp diode - especially with its use in LS TTL: Schottky barrier diodes may also be
used as a clamp diode in a transistor circuit to speed the operation when used as a switch.
They were used in this role in the 74LS (low power Schottky) and 74S (Schottky) families of
logic circuits. In these chips the diodes are inserted between the collector and base of the
driver transistor to act as a clamp. To produce a low or logic "0" output the transistor is
driven hard on, and in this situation the base collector junction in the diode is forward biased.
When the Schottky diode is present this takes most of the current and allows the turn off time
of the transistor to be greatly reduced, thereby improving the speed of the circuit.

Figure 4.5 An NPN transistors with Schottky diode clamp

In view of its properties, the Schottky diode finds uses in applications right through from
power rectification to uses in clamp diodes in high speed logic devices and then on to high
frequency RF applications as signal rectifiers and in mixers.

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Their properties span many different types of circuit making them almost unique in the
variety of areas and circuits in which they can be used.

ZENER DIODE

A Zener diode is a t ype of diode that permits current not only in the forward direction like a
normal diode, but also in the reverse direction if the voltage is lar ger than the breakdown
voltage known as "Zener knee voltage" or "Zener voltage". The device was named after
Clarence Zener, who discovered this el ectrical property.

Figure 4.6 Diode symbol

However, the Zener Diode or "Breakdown Diode" as they are sometimes called, are basically
the same as the standard PN junction diode but are specially designed to have a low pre-
determined Reverse Brea kdown Voltage that takes advantage of this high reverse voltage.
The point at which a zener diode breaks down or conducts is called the "Ze ner Voltage"
(Vz).

The Zener diode is like a general-purpose signal diode consisting of a silicon PN junction.
When biased in the forward direction it behaves just like a nor mal signal diode passing the
rated current, but when a reverse voltage is applied to it the reverse saturation current remains
fairly constant over a wide range of voltages. The reverse voltage increases until the diodes
breakdown voltage V B is reached at which point a process called Avalanche Breakdown
occurs in the depletion lay er and the current flowing through the zener diode increases
dramatically to the maximum circuit value (which is usually limited by a series resistor). This
breakdown voltage point is called the "zener voltage" for zener diodes.

Avalanche Breakdown: There is a limit for the reverse voltage. Reverse voltage can increase
until the diode breakdown voltage reaches. This point is called Avalanche Breakdown region.
At this stage maximum current will flow through the zener diode. This breakdown point is
referred as “Zener voltage”.

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The point at which current flows can be very accurately cont rolled (to less than 1%
tolerance) in the doping st age of the diodes construction giving the diode a specific zener
breakdown voltage, (Vz) ranging from a few volts up to a few hundred volts. This zener
breakdown voltage on the I-V curve is almost a vertical straight line.

Zener diode characteristics

The Zener Diode is used in its "reverse bias" or reverse breakdo wn mode, i.e. the diodes
anode connects to the negativ e supply. From the I-V characteristics curv e above, we can see
that the zener diode has a regio n in its reverse bias characteristics of almost a constant
negative voltage regardless of the value of the current flowing through the di ode and remains
nearly constant even with large cha nges in current as long as the zener diodes current
remains between the breakdown current IZ(min) and the maximum current rating IZ(max).

Figure 4.7 Zener diode characteristics

Applications of zener diode

1.The Zener Diode Regulator

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Figu re 4.8 Zener diode act as voltage regulator

The constant reverse voltage of the zener diode makes it a valua ble component for the
regulation of the output voltagge against both variations in the input volta ge from an
unregulated power supply or variations in t he load resistance. The current through the ze ner
will change to keep the voltage at within the limit s of the threshold of zener action and the
maximum power it can dissipate.

2. Zener-Controlled Output Switching

This comparator application makes use of the properties of the zener diode to cause the
output to switch between voltages determined by the zener diodes when the input voltage
difference changes sign. The output circuit amounts to a zener regulator which switches
from one zener voltage to the other on a transition.

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3. Zener Limiter

A single Zener diode can limit one side of a sinusoidal waveform to the zener voltage while
clamping the other side to near zero. With two opposing zeners, the waveform can be limited
to the zener voltage on both polarities.

Figure 4.9 Zener limiter

4. Zener Role in Power Supplies

The zener diode is widely used as a voltage regulator because of its capacity to maintain a
constant voltage over a sizeable range of currents. It can be used as a single component
across the output of a rectifier or incorporated into one of the variety of one-chip regulators
Basically there are two type of regulations such as:

a) Line Regulation

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In this type of regulation, series resistance and load resistance are fixed, only input voltage is
changing. Output voltage remains the same as long as the input voltage is maintained above a

minimum value.

Where V0 is the output voltage and VIN is the input voltage and ΔV0 is the change in output
voltage for a particular change in input voltage ΔVIN.

b) Load Regulation

In this type of regulation, input voltage is fixed and the load resistance is varying. Output
volt remains same, as long as the load resistance is maintained above a minimum value.

Difference between Zener breakdown from avalanche breakdown

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VARACTOR DIODE

Varactors are operated in a reverse-biased state. No current flows, but since the thickness of
the depletion zone varies with the applied bias voltage, the capacitance of the diode can be
made to vary. Generally, the depletion region thickness is proportional to the square root of
the applied voltage; capacitance is inversely proportional to the depletion region thickness.
Thus, the capacitance is inversely proportional to the square root of applied voltage.

All diodes exhibit this phenomenon to some degree, but varactor diodes are manufactured
specifically to exploit this effect and increase the capacitance (and thus the range of
variability), whereas most ordinary diode fabrication strives to minimize the capacitance.

A varactor diode is best explained as a variable capacitor. Think of the depletion region as a
variable dielectric. The diode is placed in reverse bias. Junction capacitance is present in all
reverse biased diodes because of the depletion region.

Figure 4.10 Depletion region in a reverse biased PN junction a) circuit symbol b)

characteristics of varactor diode

They are also called voltage-variable capacitance diodes. A Junction diode which acts as a
variable capacitor under changing reverse bias is known as VARACTOR DIODE.A varactor
diode is specially constructed to have high resistance under reverse bias. Capacitance for
varactor dide are Pico farad. (10-12 ) range.

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Curve between Reverse bias voltage Vr across varactor diode and total junction capacitance
CT and CT can be changed by changing Vr.

Applications

· Junction capacitance is optimized in a varactor diode and is used fo r high

frequencies and switching applications.

Varactor diodes are often used for electronic tuning applications in FM radio s and
televisions.

Varactors are used as voltage-controlled capacitors. They are commmonly used in voltage-
controlled oscillators, parametric amplifiers, and frequency multipliers.

Tunnel diode(Esaki diode)

A tunnel diode or Esaki diode is a type of semiconductor that is capable of very fast
operation, well into the microwave frequency region, made pos sible by the use of the
quantum mechanical effect called tunneling.

TUNNEL DIODE (ESA KI DIODE)

A tunnel diode or Esaki diode is a type of semiconductor that is capable of very fast
operation, well into the microwave frequency region, made pos sible by the use of the
quantum mechanical effect called tunneling. It was introduced by Leo Esaki in 1958.Heavily-
doped p-n junction. Impurity concentration is 1 part in 10^3 as compared to 1 part in 10^8 in
p-n junction diode. Width of the depletion layer is very small (about 10 0 A). It is generally
made up of Ge and GaAs.

Circuit symbol of tunnel diode

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Figure 4.11 symbol of tunnel diode

Tunneling Phenomenon:

According to classical mechanics theory, a particle must have an en ergy at least equal
to the the height of a potential-energ y barrier if it has to move from one side of the barrier to
the other. In other words, energy has to be s upplied from some external source so that th e
electrons on N side of junction climb over the junction barrier to reach the P-side. However if
the barrier is thin such as in tunnel diode ,the Schrodinge r equation(Quantum Mechanics)
indicates that there is a large probability that an electron wil l penetrate through the barrier.
This will hap pen without any loss of energy on the part of electron . This quantum
mechanical behavior is refer red to as tunneling and the high-impurity P-N junctio n devices
are called tunnel-diodes. The tun neling phenomenon is a majority carrier effect.

1Forward bias operation

Under normal forward bias operation, as voltage begins to increase, electrons at first tunnel
through the very narrow p–n junction barrier because filled electron states in the conduction
band on the n-side become aligned with empty valence band hole states on the p-side of the
p-n junction. As voltage increases further t hese states become more misaligned and th e
current drops – this is called negative resistance beca use current decreases with increasing
voltag e. As voltage increases yet further, the diode begins to operate as a normal diode,
where electro ns travel by conduction across the p–n junction, and no longer by tunneling
through the p–n junction barrier. The most important operating region for a tunnel diode is
the negative resistance region.

2Reverse bias operation

When used in the reverse direction, tunnel diodes are called back diodes (or backward
diodes) and can act as fast rectifiers with zero offset voltage and extreme linearity for power
signals (they have an accurate square law characteristic in the reverse direction). Under
reverse bias, filled states on the p-side become increasingly aligned with empty states on the
n-side and electrons now tunnel through the pn junction barrier in reverse direction.
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Figure 4.12 V-I characteristics of tunnel diode

Energy Band Diagram

Energy-band diagram of pn junction in thermal equilibrium in which both the n and p region
are degenerately doped.

At Zero Bias

Simplified energy-band diagram and I-V characteristics of the tunnel diode at zero bias.

- Zero current on the I-V diagram;

- All energy states are filled below EF on both sides of the junction;

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Figure 4.13 Energy Band Diagram at zero bias

At Small Forward Voltage

Simplified energy-band diagram and I-V characteristics of the tunnel dio de at a slight
forward bias

Figure 4.1 4 Energy Band Diagram at small forward bias

- Electrons in the conduction band of the n region are directly opposite t o the empty states in
the valence band of the p region.So a finite probability that some electrons tunnel directly
into the empty states resulting in for ward-bias tunnelling current.

At Maximum Tunnelling Current

Simplified energy-band diag ram and I-V characteristics of the tunnel diode at a forward bias
producing maximum tunnelli ng current.The maximum number of electr ons in the n region
are opposite to the maximum number of empty states in the p region.Hence tunneling current
is maximum.
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Figure 4.15 Energy Band Diagram at Maximum Tunnelling Current

Tunnel Diode Equivalent Circuit

Figure 4.16 Equivalent circuit of tunnel diode

This is the equivalent circuit of tunnel diode when biased in negative resistance region.

· At higher frequency the series R and L can be ignored.

GALLIUM ARSENIDE DEVICE:

Gallium arsenide (GaAs) is a compound of the elements gallium and arsenic. It is a III/V
semiconductor, and is used in the manufacture of devices such as microwave frequency
integrated circuits, monolithic microwave integrated circuits, infrared light-emitting diodes,
laser diodes, solar cells and optical windows. GaAs is often used as a substrate material for
the epitaxial growth of other III-V semiconductors including: InGaAs and GaInNAs.

Some electronic properties of gallium arsenide are superior to those of silicon. It has a
higher saturated electron velocity and higher electron mobility, allowing gallium arsenide
transistors to function at frequencies in excess of 250 GHz. Unlike silicon junctions, GaAs
devices are relatively insensitive to heat owing to their wider bandgap. Also, GaAs devices
tend to have less noise than silicon devices, especially at high frequencies. This is a result of
higher carrier mobilities and lower resistive device parasitics. These properties recommend
GaAs circuitry in mobile phones, satellite communications, microwave point-to-point links
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and higher frequency radar systems. It is used in the manufacture of Gunn diodes for
generation of microwaves.

Another advantage of GaAs is that it has a direct band gap, which means that it can be used
to emit light efficiently. Silicon has an indirect bandgap and so is very poor at emitting light.
Nonetheless, recent advances may make silicon LEDs and lasers possible.

As a wide direct band gap material with resulting resistance to radiation damage, GaAs is an
excellent material for space electronics and optical windows in high power applications.

Because of its wide band gap, pure GaAs is highly resistive. Combined with the high
dielectric constant, this property makes GaAs a very good electrical substrate and unlike Si
provides natural isolation between devices and circuits. This has made it an ideal material for
microwave and millimetre wave integrated circuits, MMICs, where active and essential
passive components can readily be produced on a single slice of GaAs.

LASER DIODE

Laser action (with the resultant monochromatic and coherent light output) can be achieved in
a p-n junction formed by two doped gallium arsenide layers. The two ends of the structure
need to be optically flat and parallel with one end mirrored and one partially reflective. The
length of the junction must be precisely related to the wavelength of the light to be emitted.
The junction is forward biased and the recombination process produces light as in the LED
(incoherent). Above a certain current threshold the photons moving parallel to the junction
can stimulate emission and initiate laser action. Laser diodes and light emitting diodes have a
number of elements in common with respect to their theory of operation. However the laser
diode theory of operation incorporates more elements, taking in additional processes to
provide the coherent light it produces.

Symbol

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Figure 4.17 Symbol of laser diode

Structure and characteristic curve

Figure 4.18 (a) Struct ure and (b) characteristic curve of laser di ode

A laser diode, or LD, is an electrically pumped semiconductor l aser in which the active
medium is formed by a p-n j unction of a semiconductor diode similar to that found in a
emitting diode. The laser diode is the most common type of laser produced. Laser diodes
have a very wide range of uses that include, but are not limited to, fibre optic communic
ations, barcode readers, laser pointers, CD/DVD/Blu-ray reading, laser printing, scanning and
increasingly directional lighting sources.

Laser diode theory basics

There are three main processes in semiconductors that are associated with light:

Light absorption: Absorption occurs when light enters a semiconductor and its energy is
transferred to the semiconductor to generate additional free electron s and holes. This effect is
widely used and enables devices like to photo-detectors and solar cells to operate.

Spontaneous emission : The second effect known as spontaneous emission occurs in LEDs.
The light produced in this manner is what is termed incoherent. In other words the frequency
and phase are random, although the light is situated in a given part of the spectrum.

St.Joseph’s College of Engineering

EC1206 Electronic Devices Dept of ECE 2023-2024
Stimulated emission: Stimulated emission is different. A light photon entering the
semiconductor lattice w ill strike an electron and release energy in t he form of another light
photon. The way in which this occurs releases this new photon of i dentical wavelength and
phase. In this way the liight that is generated is said to be coherent.

The key to the laser diode operation occurs at the junction of the highly doped p and n type
regions. In a normal p-n junction curre nt flows across the p-n junction. This action can occur
because the holes from the p-type region and the electrons from the n-type region combine.
With an electromagnetic wave (in this instance light) in passing through the las er diode
junction diode junction it is found that the photo-emission process occurs. Here the photons
release further photons of light occurs when they strike electrons during the recombination of
holes and electrons occurs.

Naturally there is some absorpttion of the light, resulting in the generation o f holes and
electrons but there is an overall gain in level.

The structure of the laser diode creates an optical cavity in which the light photons have
multiple reflections. When the photons are generated only a small number are abl e to leave
the cavity. In this way when one photon strikes an electron and enables another photon to be
generated the process repeats itself and the photon density or light level starts to build u p. It
is in the design of better optical cavities that much of the current work on lasers is being
undertaken. Ensuring the light is properly reflected is the key to the operation of the device.

LDR (LIGHT DEPEND ENT RESISTOR):

A Light Dependent Resistor (LDR) or a photo resistor is a device whose resistivity is a

function of the incident electromagnetic radiation. Hence, they are light sensitive devices.
They are also called as photo conductors, photo conductive cells or simply photocells. They
are made up of semiconductor materials havi ng high resistance. There are many different
symbols used to indicate a LDR, one of the most comm only used symbol is shown in the
figure bel ow. The arrow indicates light falling on it.

A photoresistor or light -dependent resistor (LDR) or photocell is a resistor whose resistance

decreases with increasing incident light intensity; in other words, it exhibits
photoconductivity. A photoresistor is made of a high resistance semiconductor. If light falling
on the device is of high enough frequency, photons absorbed by the emiconductor give bound
electrons enough energy to jump into the conduction band.

St.Joseph’s College of Engineering

EC1206 Electronic Devices Dept of ECE 2023-2024

Figure 4.19 symbol of Photo-resistor

Working principle of LDR

A light dependent resistor works on the principle of photo conductivity. Photo conductivity
is an optical phenomenon in which the materials conductivity (Hence re sistivity) reduces
when light is absorbed by the material. When light falls i.e. when the photons fall on the
device, the electrons in the valence band of the semiconductor material are excited to the
conduction band. These photons in the incident light should have energy greater than the
band gap of the semiconductor material to make the electrons jump from the valence band to
the conduction band.

Hence when light having enough energy is incident on the device more & more electrons are
excited to the conduction band which results in large number of charge carriers. The result of
this process is more and more current starts flowing and hence it is said that the resistance of
the device has decreased. This is the most common working principle of LDR

Characteristics of LDR

LDR’s are light dependent devices whose resistance decreases when light falls on them and
increases in the dark. When a light dependent resistor is kept in dark, its resistance is very
high. This resistance is called as dark resistance. It can be as high as 1012 Ω.

If the device is allowed to absorb light, its resistance will decrease drastically. If a constant
voltage is applied to it and intensity of light is increased the current starts increasing. Figure
below shows resistance vs. illumination curve for a particular LDR.

St.Joseph’s College of Engineering

EC1206 Electronic Devices Dept of ECE 2023-2024

Figure 4.20 Characteristics of LDR

Applications of LDR

· LDR’s have low cost and simple structure. They are often used as light sensors.

· They are used when there is a need to detect absences or presences of light like in a
camera light meter.

· Used in street lamps, alarm clock, burglar alarm circuits, light intensity meters, for
counting the packages moving on a conveyor belt, etc.

Advantages

LDR’s are cheap and are readily available in many sizes and shapes. Practical LDRs are
available in a variety of sizes and package styles, the most popular size having a face
diameter of roughly 10 mm. They need very small power and voltage for its operation.

Disadvantages

Highly in-accurate with a response time of about tens or hundreds of milliseconds.

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