UNIT-I

Computer
• A computer is a device that can perform calculations and operations based on
instructions from a software or hardware program. It can accept data, process it, and
then produce outputs. Modern computers can be divided roughly into four general
categories:
• Embedded computers are integrated into a larger device or system in order to
automatically monitor and control a physical process or environment. They are used for a
specific purpose rather than for general processing tasks. Typical applications include
industrial and home automation, appliances, telecommunication products, and vehicles.
• Personal computers have achieved widespread use in homes, educational institutions,
and business and engineering office settings, primarily for dedicated individual use. They
support a variety of applications such as general computation, document preparation,
computer-aided design, audiovisual entertainment, interpersonal communication, and
Internet browsing.
• Servers and Enterprise systems are large computers that are meant to be shared by a
potentially large number of users who access them from some form of personal
computer over a public or private network. Such computers may host large databases
and provide information processing for a government agency or a commercial
organization.
• Supercomputers normally offer the highest performance. They are the most expensive
and physically the largest category of computers. Supercomputers are used for the highly
demanding computations needed in weather forecasting, engineering design and
simulation, and scientific work. They have a high cost.
Introduction to Digital Computer
• A computer consists of five functionally independent main parts:
input, memory, arithmetic and logic, output, and control unit, as
shown in Figure 1.
Memory

Arithmetic
Input and logic

Interconnection
network
Output Control

I/O Processor

Figure 1
Input Unit
• Computers accept coded information
through input units. The most common
input device is the keyboard. Whenever
a key is pressed, the corresponding
letter or digit is automatically
translated into its corresponding binary
code and transmitted to the processor.
• Many other kinds of input devices for
human-computer interaction are
available, including the touchpad,
mouse, joystick, and trackball.
Microphones can be used to capture
audio input which is then sampled and
converted into digital codes for storage
and processing. Similarly, cameras can
be used to capture video input.
Memory Unit
• The function of the memory unit is to store programs and data. There are
two classes of storage, called primary and secondary.
• Primary Memory
• Primary memory, also called main memory, is a fast memory that operates at
electronic speeds. Programs must be stored in this memory while they are being
executed.
• The memory consists of a large number of semiconductor storage cells, each capable
of storing one bit of information.
• Instructions and data can be written into or read from the memory under the control
of the processor.
• A memory in which any location can be accessed in a short and fixed amount of time
after specifying its address is called a random-access memory (RAM). The time
required to access one word (2 bytes) is called the memory access time. This time is
independent of the location of the word being accessed. It typically ranges from a
few nanoseconds (ns) to about 100 ns for current RAM units.
Memory Unit Contd…
• Cache Memory
• As an adjunct to the main memory, a smaller, faster RAM unit, called a cache,
is used to hold sections of a program that are currently being executed, along
with any associated data. The cache is tightly coupled with the processor and
is usually contained on the same integrated-circuit chip. The purpose of the
cache is to facilitate high instruction execution rates.
• At the start of program execution, the cache is empty. All program
instructions and any required data are stored in the main memory. As
execution proceeds, instructions are fetched into the processor chip, and a
copy of each is placed in the cache. When the execution of an instruction
requires data located in the main memory, the data are fetched and copies
are also placed in the cache.
Memory Unit Contd…
• Secondary Storage
• Although primary memory is essential, it tends to be expensive and does not
retain information when power is turned off. Thus additional, less expensive,
permanent secondary storage is used when large amounts of data and many
programs have to be stored, particularly for information that is accessed
infrequently.
• Access times for secondary storage are longer than for primary memory. A
wide selection of secondary storage devices is available, including magnetic
disks, optical disks (DVD and CD), and flash memory devices.
Arithmetic and Logic Unit
• Computer operations are executed in the arithmetic and logic unit
(ALU) of the processor. Any arithmetic or logic operation, such as
addition, subtraction, multiplication, division, or comparison of
numbers, is initiated by bringing the required operands (quantity on
which an operation is to be done) into the processor, where the
operation is performed by the ALU. For example, if two numbers
located in the memory are to be added, they are brought into the
processor, and the addition is carried out by the ALU.
• When operands are brought into the processor, they are stored in
high-speed storage elements called registers. Each register can store
one word of data. Access times to registers are even shorter than
access times to the cache unit on the processor chip.
Output Unit
• The output unit is the counterpart of the input unit. Its function is to
send processed results to the outside world. A familiar example of
such a device is a printer.
Control Unit
• The memory, arithmetic and logic, and I/O units store and process
information and perform input and output operations. The operation
of these units must be coordinated in some way. This is the
responsibility of the control unit. The control unit is effectively the
nerve center that sends control signals to other units and senses their
states.
• Data transfers between the processor and the memory are also
managed by the control unit through timing signals.
Bus Structure
• A bus is a collection of electrical pathways or conductors that carry data,
addresses, and control signals between different hardware components.
• The bus shown in Figure 2 is a simple structure that implements the
interconnection network. Only one source/destination pair of units can use this
bus to transfer data at any one time.

Processor Memory

Bus

I/O device 1 I/O device n

Figure 2
 I/O Interface for an input device
• The bus consists of three sets of lines used
to carry address, data, and control signals.
I/O device interfaces are connected to
these lines, as shown in Figure 3 for an
input device.
• Each I/O device is assigned a unique set of
addresses for the registers in its interface.
• When the processor places a particular
address on the address lines, it is examined
by the address decoder.
• The (input) device that recognizes this
address responds to the commands issued
on the control lines. The processor uses the
control lines to request either a Read or a Figure 3
Write operation, and the requested data
are transferred over the data lines.
Computer Organization and Architecture
 Von Neumann Architecture Harvard Architecture
It was developed at Princeton University It was developed at Harvard University
Same physical memory address is used for instructions and Separate physical memory address is used for instructions
data. and data.
There is common bus for data and instruction transfer. Separate buses are used for transferring data and
instruction. There are in all four buses:
(a) Data bus for carrying data in and out of CPU
(b) Address bus for accessing the data
(c) Data bus for carrying code into the CPU
(d) Address bus for accessing the code.
Since same buses are used to access data and code which Have good speed of program execution.
cause them to get in each other’s way thus slow down the
processing speed of CPU because each have to wait for the
other to finish fetching.
It is cheaper in cost It is costly than von Neumann Architecture
It is used in personal computers and small computers It is used in micro controllers and signal processing
There are four types of number systems. They are
1. Decimal number system

2. Binary number system

3. Octal number system

4. Hexadecimal number system

1. Decimal number system
❑The decimal number system contain ten unique
digits: 0,1,2,3,4,5,6,7,8 and 9.

❑In decimal system 10 symbols (0-9) are involved, so

the base or radix is 10. e.g. (1245)10

❑The value attached to the symbol depends on its

location with respect to the decimal point.
Example: Place value of Decimal Number
In general,
(MSB) dn dn-1 dn-2 …………… d0 . d -1 d -2 …………d – m (LSB)
is given by
(dn x 10n) + (dn-1 x 10n-1) + (dn-2 x 10n-2) + … + ( d0 x 100) + ( d-1 x
10 -1) + (d-2 x 10 -2) +…+(d -m x 10 –m)
For example:-1 Decimal number- 9256.26
9256.26 = 9 x 1000 + 2 x 100 + 5 x 10 + 6 x 1 + 2 x (1/10) + 6 x ( 1/100)

= 9 x 103 + 2 x 102 + 5 x 101 + 6 x 100 + 2 x 10-1 + 6 x 10-2

2. Binary number system
❑The binary number system is a positional weighted
system.

❑The base or radix of this number system is 2.

e.g. (10101)2

❑The symbols used are 0 and 1.

❑A single binary digit is called a bit.

3. Octal number system
❑It is also a positional weighted system.
❑Its base or radix is 8.
❑It has 8 independent symbols- 0,1,2,3,4,5,6
and 7.
❑Its base 8 = 2 3 (2 to the power 3) , every 3-
bit group of binary can be represented by an
octal digit. e.g.- (14623)8 and (277.13)8
4. Hexa-Decimal number system
❑It is also a positional weighted system.
❑Its base or radix is 16.
❑It has 15 independent symbols-
0,1,2,3,4,5,6,7,9 and 10(A),
11(B),12(C),13(D),14(E),15(F).
0r 0,1,2,3,4,5,6,7,8,9 and 10- A, 11- B,
12- C, 13-D, 14- E and 15-F
❑e.g.- (14ABF)16 and (12.CD)16
CONVERSION FROM ONE NUMBER SYSTEM TO
ANOTHER
• Binary number • OCTAL number
conversion to- conversion to-
1. Octal 1. Binary
2. Decimal 2. Decimal
3. Hexa-Decimal 3. Hexa-Decimal
CONVERSION FROM ONE NUMBER SYSTEM TO
ANOTHER
• Decimal number • Hexa decimal
conversion to- number
conversion to-
1. Binary
1. Binary
2. Octal
2. Octal
3. Hexa-Decimal
3. Decimal
Total 12 types to convert the number system into
each other
BINARY NUMBER SYSTEM: Binary to Decimal
• In this method, each binary digit of the number is multiplied by its
positional weight and the product terms are added to obtain decimal
number
Example: 1
Example-2

Example-3
Decimal to Binary Number
Example-1
Example-2
Example-3
Example-1
Example-2
Example-1
Example-2
Example-1
Example-1
Example-1
Example-1
Example-1
Example-1
Example-1
Example-1
Complements
• Complements are used in digital computers for simplifying the
subtraction operation and for logical manipulation.
• There are two types of complements for each base r system: the r ’s
complement and the (r — l)’s complement.
• When the value of the base r is substituted in the name, the two
types are referred to as the 2’s and l’s complement for binary
numbers and the 10’s and 9’s complement for decimal numbers.
(r — l)’s Complement
• Given a number N in base r having n digits, the (r — l)’s complement
of N is defined as (rn — 1) — N.
• 9’s Complement
• For decimal numbers r = 10 and r — 1 = 9, so the 9’s complement of N is (10n
— 1) — N. Now, 10n represents a number that consists of a single 1 followed
by n 0’s. 10n — 1 is a number represented by n 9’s.
• For example, with n = 4 we have 104 = 10000 and 104 — 1 = 9999. It follows
that the 9’s complement of a decimal number is obtained by subtracting each
digit from 9.
• For example, the 9’s complement of 546700 is 999999 — 546700 = 453299
and the 9’s complement of 12389 is 99999 — 12389 = 87610.
1’s Complement
• For binary numbers, r = 2 and r — 1 = 1, so the 1’s complement of N is (2n
—1) — N. Again, 2n is represented by a binary number that consists of a 1
followed by n 0’s. 2n — 1 is a binary number represented by n 1’s. For
example, with n = 4, we have 24 = (10000)2 and 24 — 1 = (1111)2. Thus the
1’s complement of a binary number is obtained by subtracting each digit
from 1.
• However, the subtraction of a binary digit from 1 causes the bit to change
from 0 to 1 or from 1 to 0. Therefore, the 1’s complement of a binary
number is formed by changing 1’s into 0’s and 0’s into 1’s. For example, the
1’s complement of 1011001 is 0100110 and the 1’s complement of
0001111 is 1110000.
• The (r — l)’s complement of octal or hexadecimal numbers are obtained by
subtracting each digit from 7 or F (decimal 15) respectively.
(r ’s) Complement
• 10’s Complement
• The r’s complement of an n -digit number N in base r is defined as rn - N for N
≠ 0 and 0 for N = 0. Comparing with the (r - 1)’s complement, we note that the
r’s complement is obtained by adding 1 to the (r - 1)’s complement since rn - N
= [(rn - 1) - N ] + 1. Thus the 10’s complement of the decimal 2389 is 7610 + 1
= 7611 and is obtained by adding 1 to the 9’s complement value.
• The 2’s complement of binary 101100 is 010011 + 1 = 010100 and is obtained
by adding 1 to the l’s complement value.
2’s Complement
• Since 10n is a number represented by a 1 followed by n 0’s, then 10n - N,
which is the 10’s complement of N, can be formed also be leaving all least
significant 0’s unchanged, subtracting the first nonzero least significant
digit from 10, and then subtracting all higher significant digits from 9. The
10’s complement of 246700 is 753300 and is obtained by leaving the two
zeros unchanged, subtracting 7 from 10, and subtracting the other three
digits from 9. Similarly, the 2’s complement can be formed by leaving all
least significant 0’s and the first 1 unchanged, and then replacing 1’s by 0’s
and 0’s by 1’s in all other higher, significant bits.
• The 2’s complement of 1101100 is 0010100 and is obtained by leaving the
two low-order 0’s and the first 1 unchanged, and then replacing 1’s by 0’s
and 0’s by 1’s in the other four most significant bits.
Subtraction of Unsigned Numbers
• The subtraction of two n -digit unsigned numbers M N(N 0) in base r
can be done as follows:
1. Add the minuend M to the r’s complement of the subtrahend N. This
performs M + (rn - N) = M - N + rn.
2. If M ≥ N, the sum will produce an end carry rn which is discarded,
and what is left is the result M - N.
3. If M < N, the sum does not produce an end carry and is equal to rn -
(N - M), which is the r’s complement of (N - M). To obtain the answer in
a familiar form, take the r’s complement of the sum and place a
negative sign in front.
Example
• Consider, for example, the subtraction 72532 - 13250 = 59282. The
10’s complement of 13250 is 86750. Therefore:

• Now consider an example with M < N. The subtraction 13250 – 72532

produces negative 59282. Using the procedure with complements, we
have

• There is no end carry Answer is negative 59282 = 10’s complement of

40718
Integer Representation
• When an integer binary number is positive, the sign is represented by
0 and the magnitude by a positive binary number. When the number
is negative, the sign is represented by 1 but the rest of the number
may be represented in one of three possible ways:
1. Signed-magnitude representation
2. Signed-1’s complement representation
3. Signed 2’s complement representation
• The signed-magnitude representation of a negative number consists
of the magnitude and a negative sign. In the other two
representations, the negative number is represented in either the 1’s
or 2’s complement of its positive value.
Example
• Consider the signed number 14 stored in an 8-bit register. +14 is
represented by a sign bit of 0 in the leftmost position followed by the
binary equivalent of 14: 00001110. Note that each of the eight bits of
the register must have a value and therefore 0’s must be inserted in
the most significant positions following the sign bit. Although there is
only one way to represent +14, there are three different ways to
represent -14 with eight bits.
• In signed-magnitude representation 1 0001110
• In signed-1’s complement representation 1 1110001
• In signed-2’s complement representation 1 1110010
Arithmetic Addition
• The addition of two numbers in the signed-magnitude system follows
the rules of ordinary arithmetic. If the signs are the same, we add the
two magnitudes and give the sum the common sign. If the signs are
different, we subtract the smaller magnitude from the larger and give
the result the sign of the larger magnitude.
• For example, (+25) + (-37) = -(37 - 25) = 112 and is done by
subtracting the smaller magnitude 25 from the larger magnitude 37
and using the sign of 37 for the sign of the result.
The Booth Algorithm Multiplication
• The Booth algorithm generates a 2n-bit product and treats both
positive and negative 2’scomplement n-bit operands uniformly.
• Consider a multiplication operation in which the multiplier is positive
and has a single block of 1s, for example, 0011110. To derive the
product, we could add four appropriately shifted versions of the
multiplicand, as in the standard procedure. However, we can reduce
the number of required operations by regarding this multiplier as the
difference between two numbers:
Normal and Booth Multiplication Schemes
Booth Recoding of a Multiplier

Booth Multiplication with a Negative Multiplier

 Circuit arrangement for binary division
• An n-bit positive divisor is loaded
into register M and an n-bit
positive dividend is loaded into
register Q at the start of the
operation.
• Register A is set to 0.
• After the division is complete, the
n-bit quotient is in register Q and
the remainder is in register A.
• The required subtractions are
facilitated by using 2’s-
complement arithmetic.
• The extra bit position at the left
end of both A and M
accommodates the sign bit
during subtractions.
Steps of Restoring Division Algorithm
• The following algorithm performs restoring division.
Do the following three steps n times:
1. Shift A and Q left one bit position.
2. Subtract M from A, and place the answer back in A.
3. If the sign of A is 1, set q0 to 0 and add M back to A (that is, restore
A); otherwise, set q0 to 1.
Example
Fixed-point and floating-point representations
of numbers
• A fixed-point representation of a number may be thought to consist
of 3 parts: the sign field, integer field, and fractional field. One way to
store a number using a 32-bit format is to reserve 1 bit for the sign,
15 bits for the integer part and 16 bits for the fractional part.
• A number whose representation exceeds 32 bits would have to be
stored inexactly.
Fractions: Two Representations

• Fixed-point: binary point is fixed

1101101.0001001
• Floating-point: binary point floats to the right of the most significant 1
and an exponent is used
1.1011010001001 x 26
• Fixed-point representation using 4 integer bits and 3 fraction bits:
Fixed-Point Numbers
• The binary point is not a part of the representation but is implied
• The number of integer and fraction bits must be agreed upon by
those generating and those reading the number
Signed Fixed-Point Numbers
• Negative fractional numbers can be represented two ways:
• Sign/magnitude notation
• Two’s complement notation
• Represent -7.510 using an 8-bit binary representation with 4 integer
bits and 4 fraction bits in Two’s complement:
• +7.5: 01111000
• Invert bits: 10000111
• Add 1 to lsb: 10001000
Floating-Point Numbers
• The binary point floats to the right of the most significant digit
• Similar to decimal scientific notation:
• For example, 27310 in scientific notation is
273 = 2.73 ×102
• In general, a number is written in scientific notation as:
±M ×BE
where:
M= mantissa
B= base
E= exponent
• In the example, M = 2.73, B = 10, and E = 2
Floating-Point Numbers

• Convert the decimal number to binary: 22810= 111001002= 1.11001

×27
• Fill in each field of the 32-bit number:
• The sign bit is positive (0)
• The 8 exponent bits represent the value 7
• The remaining 23 bits are the mantissa
 BIG ENDIAN vs LITTLE ENDIAN
• In a big-endian computer, the two bytes required for the hexadecimal
number 4F52 would be stored as 4F52 in storage.
• For example, if 4F is stored at storage address 1000, 52 will be at
address 1001.
• In a little-endian system, it would be stored as 524F, with 52 at
address 1000 and 4F at 1001.
Register Transfer Language
• Digital system design invariably uses a modular approach. The modules are
constructed from such digital components as registers, decoders,
arithmetic elements, and control logic.
• The various modules are interconnected with common data and control
paths to form a digital computer system.
• Digital modules are best defined by the registers they contain and the
operations that are performed on the data stored in them. The operations
executed on data stored in registers are called microoperations.
• A microoperation is an elementary operation performed on the
information stored in one or more registers. The result of the operation
may replace the previous binary information of a register or may be
transferred to another register.
• Examples of microoperations are shift, count, clear, and load.
Register Transfer Language Contd…
• The internal hardware organization of a digital computer is best
defined by specifying:
1. The set of registers it contains and their function.
2. The sequence of microoperations performed on the binary
information stored in the registers.
3. The control that initiates the sequence of microoperations.
• The symbolic notation used to describe the microoperation transfers
among registers is called a register transfer language.
Introduction to Register
• Computer registers are designated by capital letters (sometimes
followed by numerals) to denote the function of the register. For
example, the register that holds an address for the memory unit is
usually called a memory address register and is designated by the
name MAR. Other designations for registers are PC (for program
counter), IR (for instruction register, and R1 (for processor register).
Register Representation
• The most common way to represent a register is by a rectangular box
with the name of the register inside, as in Figure 4 (a).
• The individual bits can be distinguished as in Figure 4(b).
• The numbering of bits in a 16-bit register can be marked on top of the
box as shown in Figure 4(c).
• A 16-bit register is partitioned into two parts is shown in Figure 4(d).
• Bits 0 through 7 are assigned the symbol L (for low byte) and bits 8
through 15 are assigned the symbol H (for high byte). The name of
the 16-bit register is PC. The symbol PC(0–7) or PC(L) refers to the
low-order byte and PC(8–15) or PC(H ) to the high-order byte.
Register Representation Contd…

Figure 4
Register Transfer
• Information transfer from one register to another is designated in
symbolic form by means of a replacement operator.

• The above statement denotes a transfer of the content of register R1

into register R2. It designates a replacement of the content of R2 by
the content of R1. By definition, the content of the source register R1
does not change after the transfer.
Arithmetic Microoperations
• A microoperation is an elementary operation performed with the data
stored in registers. The microoperations most often encountered in digital
computers are classified into four categories:
1. Register transfer microoperations transfer binary information from one
register to another.
2. Arithmetic microoperations perform arithmetic operation on numeric data
stored in registers.
3. Logic microoperations perform bit manipulation operations on
nonnumeric data stored in registers.
4. Shift microoperations perform shift operations on data stored in registers.
ADD Microoperation
• The basic arithmetic microoperations are addition, subtraction,
increment, decrement, and shift. Arithmetic shifts are explained later
in conjunction with the shift microoperations.

• The arithmetic microoperation defined by the above statement

specifies an add microoperation. It states that the contents of register
R1 are added to the contents of register R2 and the sum transferred
to register R3.
SUBTRACT Microoperation
• Subtraction is most often implemented through complementation
and addition.

• is the symbol for the 1’s complement of R2. Adding 1 to the 1’s
complement produces the 2’s complement. Adding the contents of R1
to the 2’s complement of R2 is equivalent to R1 - R2.
Summary of Arithmetic Microoperations
Logic Microoperations
• Logic microoperations specify binary operations for strings of bits
stored in registers. These operations consider each bit of the register
separately and treat them as binary variables. For example, the
exclusive-OR microoperation with the contents of two registers R1
and R2 is symbolized by the statement
Summary of Logic Operations
Shift Microoperations
• Shift microoperations are used for serial transfer of data.
• The contents of a register can be shifted to the left or the right.
• During a shift-left operation the serial input transfers a bit into the
rightmost position. During a shift-right operation the serial input
transfers a bit into the leftmost position.
• There are three types of shifts: logical, circular, and arithmetic.
logical shift
• A logical shift is one that transfers 0 through the serial input.
• For Example:

• are two microoperations that specify a 1-bit shift to the left of the
content of register R1 and a 1-bit shift to the right of the content of
register R2. The register symbol must be the same on both sides of
the arrow. The bit transferred to the end position through the serial
input is assumed to be 0 during a logical shift.
circular shift
• The circular shift (also known as a rotate operation) circulates the bits
of the register around the two ends without loss of information. This
is accomplished by connecting the serial output of the shift register to
its serial input.
arithmetic shift
• An arithmetic shift is a microoperation that shifts a signed binary
number to the left or right. An arithmetic shift-left multiplies a signed
binary number by 2. An arithmetic shift-right divides the number by
2.
• The leftmost bit in a register holds the sign bit, and the remaining bits
hold the number. The sign bit is 0 for positive and 1 for negative.
Negative numbers are in 2’s complement form.
Summary of Shift Microoperations
Arithmetic Logic Shift Unit
Memory
• Memory is an essential component of a microcomputer system. It
stores binary instructions and data for the microprocessor. There are
various types of memory, and they can be classified into two groups:
primary (or main) memory and storage memory.
Classification of Memory
ROM (Read Only Memory)
The first classification of memory is ROM. The data in this memory can
only be read, no writing is allowed. It is used to store permanent
programs. It is a nonvolatile type of memory.
The classification of ROM memory is as follows:

1. Masked ROM: In this ROM, the program or data are permanently

installed at the time of manufacturing as per requirement. The data
cannot be altered. The process of permanent recording is expensive
but economical for large quantities.
2. PROM (Programmable Read Only Memory): The basic function is
the same as that of masked ROM, but in PROM, we have fuse links.
Depending upon the bit pattern, the fuse can be burnt or kept
intact. This job is performed by a PROM programmer. To do this, it
uses a high current pulse between two lines. Because of high
current, the fuse will get burnt; effectively making two lines open.
Once a PROM is programmed we cannot change connections, only
a facility provided over masked ROM is, the user can load his
program in it. The disadvantage is a chance of re-growing of the
fuse and changing the programmed data because of aging.
3. EPROM (Erasable Programmable Read Only Memory): the EPROM is
programmable by the user. It uses MOS circuitry to store data. They store 1’s
and 0’s in the form of charge. The information stored can be erased by
exposing the memory to ultraviolet light which erases the data stored in all
memory locations. For ultraviolet light, a quartz window is provided which is
covered during normal operation. Upon erasing it can be reprogrammed by
using an EPROM programmer. This type of memory is used in a project
developed and for experiment use. The advantage is it can be programmed,
erased and reprogrammed. The disadvantage is all the data gets erased even if
you want to change a single data bit.
4. EEPROM: EEPROM stands for electrically erasable programmable read only
memory. This is similar to EPROM except that the erasing is done by electrical
signals instead of ultraviolet light. The main advantage is the memory location
can be selectively erased and reprogrammed. But the manufacturing process is
complex and expensive so it is not commonly used.
R/W Memory (Read/Write Memory)
The RAM is also called reading/writing memory. The RAM is a volatile type of
memory. It allows the programmer to read or write data. If the user wants to
check the execution of any program, the user feeds the program in RAM
memory and executes it. The result of execution is then checked by either
reading memory location contents or by registering contents.
Following is the classification of RAM memory. It is available in two types:
• SRAM (Static RAM): SRAM consists of the flip-flop; using either transistor or
MOS. For each bit we require one flip-flop. Bit status will remain as it is;
unless and until you perform the next write operation or power supply is
switched off.
Advantages of SRAM:
● Fast memory (less access time)
● Refreshing circuit is not required.
Disadvantages of SRAM:
● Low package density
● Costly
• DRAM (Dynamic RAM): In this type of memory a data is stored in the form
of charge in capacitors. When data is 1, the capacitor will be charged and if
data is 0, the capacitor will not be charged. Because of capacitor leakage
currents, the data will not be held by these cells. So the DRAMs require
refreshing of memory cells. It is a process in which the same data is read
and written after a fixed interval.
Advantages of DRAM:
● High package density
● Low Cost
Disadvantages of DRAM:
● Required refreshing circuit to maintain or refresh charge on the capacitor,
every after few milliseconds.
Secondary Memory
• Magnetic Disk
The Magnetic Disk is a Flat, circular platter with a metallic coating that
is rotated beneath reading/write heads. It is a Random access device;
the read/write head can be moved to any location on the platter.
• Floppy Disk
These are small removable disks that are plastic coated with magnetic
recording material. Floppy disks are typically 3.5″ in size (diameter) and
can hold 1.44 MB of data. This portable storage device is a rewritable
media and can be reused a number of times. Floppy disks are
commonly used to move files between different computers. The main
disadvantage of floppy disks is that they can be damaged easily and,
therefore, are not very reliable.
• Hard Disk
Another form of auxiliary storage is a hard disk. A hard disk consists of
one or more rigid metal plates coated with a metal oxide material that
allows data to be magnetically recorded on the surface of the platters.
The hard disk platters spin at a high rate of speed, typically 5400 to
7200 revolutions per minute (RPM). Storage capacities of hard disks for
personal computers range from 10 GB to 120 GB (one billion bytes are
called a gigabyte).
• Optical Disks
Optical Mass Storage Devices Store bit values as variations in light
reflection. They have higher area density & longer data life than
magnetic storage. They are also standardized and relatively
inexpensive. Their Uses: read-only storage with low-performance
requirements, applications with high capacity requirements & where
portability in a standardized format is needed.
Difference between Primary and Secondary
Storage
Primary Memory Secondary Memory
It is also known as temporary It is also known as a permanent
memory. memory.
Data can be accessed directly by Data cannot be accessed directly
the processor or CPU. by the I/O processor or CPU.
Stored data can be a volatile or The nature of secondary memory
non-volatile memory. is always non-volatile.
It is more costly than secondary It is less costly than primary
memory. memory.
It is a faster memory. It is a slower memory.
It has limited storage capacity. It has a large storage capacity.

It required the power to retain the It does not require power to retain
data in primary memory. the data in secondary memory.

Examples of primary memory are Examples of secondary memory

RAM, ROM, Registers, EPROM, are CD, DVD, HDD, magnetic
PROM, and cache memory. tapes, flash disks, pen drive, etc.
Difference Between RAM vs ROM
AM ROM
It is a Random-Access Memory. It is a Read-Only Memory.
Read and write operations can be Only a Read operation can be
performed. performed.

Data cannot be lost in non-volatile

Data can be lost in volatile memory
memory when the power supply is
when the power supply is turned off.
turned off.

It is a faster and more expensive It is a slower and less expensive

memory. memory.

Storage data requires to be refreshed Storage data does not need to be

in RAM. refreshed in ROM.

The size of the chip is smaller than the

The size of the chip is bigger than the
RAM chip to store the same amount of
ROM chip to store the data.
data.

Types of ROM: MROM, PROM, EPROM,

Types of RAM: DRAM and SRAM
EEPROM
Difference Between SRAM vs DRAM

SRAM DRAM
It is a Static Random-Access Memory. It is a Dynamic Random Access Memory.
The access time of SRAM is slow. The access time of DRAM is high.
It uses flip-flops to store each bit of information. It uses a capacitor to store each bit of information.
It does not require periodic refreshing to preserve It requires periodically refreshing to preserve the
the information. information.
It uses in cache memory. It is used in the main memory.
The cost of SRAM is expensive. The cost of DRAM is less expensive.
It has a complex structure. Its structure is simple.
It requires low power consumption. It requires more power consumption.
DDR RAM
• DDR stands for double data rate
• It means the RAM can transfer data two times per clock cycle.
• DDR RAM ran two data transfers per clock cycle, DDR2 RAM can
produce four transfers per cycle instead. DDR3 takes this even further,
as it can produce eight transfers for every clock cycle.
• DDR4 runs at an even lower voltage than DDR3, at just 1.2V. It's also
capable of more operations per second, ranging from 1,600MT/s to
3,200MT/s.
What is Flash Memory?
• Flash memory is a non-volatile memory storage device that can be
electrically erased and reprogrammed.
• Non-volatile memory means that the memory device will retain the
stored data even when the system is powered off.
• Because Flash memory needs to be erased before it can be
programmed, this helps expedite the process and allows for faster
programming.
• There are several different types of Flash memory, but the most
commonly used include NOR and NAND Flash.
NOR Flash vs NAND Flash
 Unit II:
Control Unit
Design
Stored Program Organization

• Memory unit with 4096 words require 12 bits to specify an address since 212 = 4096.
• To store each instruction code in one 16-bit memory word, four bits are allotted for the operation code
(abbreviated opcode) to specify one out of 16 possible operations, and 12 bits to specify the address of an
operand.
Direct and Indirect Address

• Consider the instruction code format shown in Fig. (a). It consists of

a 3-bit operation code, a 12-bit address, and an address mode bit
designated by I. The mode bit is 0 for a direct address and 1 for an
indirect address.
• A direct address instruction is shown in Fig. (b). It is placed in
address 22 in memory. The I bit is 0, so the instruction is recognized
as a direct address instruction. The opcode specifies an ADD
instruction, and the address part is the binary equivalent of 457. The
control finds the operand in memory at address 457 and adds it to the
content of AC.
• The instruction in address 35 is shown in Fig. (c) has a mode bit I =
1. Therefore, it is recognized as an indirect address instruction. The
address part is the binary equivalent of 300. The control goes to
address 300 to find the address of the operand. The address of the
operand in this case is 1350. The operand found in address 1350 is
then added to the content of AC.
Computer Registers
• The data register (DR) holds the operand read from memory.
• The accumulator (AC) register is a general purpose processing register.
• The instruction read from memory is placed in the instruction register (IR).
• The temporary register (TR) is used for holding temporary data during the processing.
• The memory address register (AR) has 12 bits since this is the width of a memory address.
• The program counter (PC) also has 12 bits and it holds the address of the next instruction to be read from
memory after the current instruction is executed.
• Two registers are used for input and output. The input register (INPR) receives an 8-bit character from an
input device. The output register (OUTR) holds an 8-bit character for an output device.
 Computer Instructions

• The basic computer has three instruction code formats.

• Each format has 16 bits. The operation code (opcode) part of the
instruction contains three bits and the meaning of the remaining 13
bits depends on the operation code encountered.
• A memory-reference instruction uses 12 bits to specify an address
and one bit to specify the addressing mode I. I is equal to 0 for
direct address and to 1 for indirect address.
• The register reference instructions are recognized by the operation
code 111 with a 0 in the leftmost bit (bit 15) of the instruction. A
register-reference instruction specifies an operation on the AC
register. An operand from memory is not needed; therefore, the
other 12 bits are used to specify the operation or test to be
executed.
• Similarly, an input–output instruction does not need a reference to
memory and is recognized by the operation code 111 with a 1 in
the leftmost bit of the instruction. The remaining 12 bits are used
to specify the type of input–output operation or test performed.
Computer Instructions
• The symbol designation is a three-letter word
and represents an abbreviation intended for
programmers and users.
• The hexadecimal code is equal to the equivalent
hexadecimal number of the binary code used for
the instruction.
• By using the hexadecimal equivalent we
reduced the 16 bits of an instruction code to
four digits with each hexadecimal digit being
equivalent to four bits.
Control Unit Design

• There are two major types of control organization:

1. Hardwired control
• In the hardwired organization, the control logic is implemented with gates, flip-flops, decoders,
and other digital circuits.
• It has the advantage that it can be optimized to produce a fast mode of operation.
• It requires changes in the wiring among the various components if the design has to be modified
or changed.
2. Microprogrammed control
• In the microprogrammed organization, the control information is stored in a control memory.
• The control memory is programmed to initiate the required sequence of microoperations.
• In the microprogrammed control, any required changes or modifications can be done by updating
the microprogram in control memory.
Control Unit Design

Block Diagram of Control Unit

Figure: Control unit of Basic Computer

Control Unit Design

Instruction Cycle
• A program consists of a sequence of instructions.
• The program is executed in the computer by going through a cycle for each instruction.
• Each instruction cycle consists of the following phases:
1. Fetch an instruction from memory.
2. Decode the instruction.
3. Read the effective address from memory if the instruction has an indirect address.
4. Execute the instruction.
• Upon the completion of step 4, the control goes back to step 1 to fetch, decode, and execute the
next instruction. This process continues indefinitely unless a HALT instruction is encountered.
Control Unit Design
Instruction Cycle
• Fetch and decode
• Initially,the program counter PC is loaded with the address of the firstinstruction
in the program. The sequence counter SC is cleared to 0, providing a decoded timing signal
To.
• After each clock pulse, SC is incremented by one, so that the timing signals go through a
sequence T0, T1, T2, and so on.
• The microoperations for the fetch and decode phases can be specified by the following register
transfer statements.
 Control Unit Design

• InstructionFetch, decodeand
execution.

Figure: Flowchart for Instruction Cycle.

Control Unit Design
Microprogrammed Control
Unit:

• The control memory is a

ROM, within which control
word is permanently stored.
• Each word in control memory
contains a microinstruction.
• Control memory address register specifies the address of the microinstruction.
• Control data register holds the microinstruction read from memory.
Control Unit Design

Microprogrammed Control Unit:

• A microinstruction contains bits for initiating microoperations in the data processor part
and bits that determine the address sequence for the control memory.
• The location of the next microinstruction may be the one next in sequence, or it may be
located somewhere else in control memory.
• For this reason, it is necessary to use some bits of the present microinstruction to control the generation
of the address of the next microinstruction.
• While the microoperations are being executed, the next address is computed in the next
address generator circuit and then transferred into the control address register to read the
next microinstruction.
Control Unit Design

Microprogrammed Control Unit:

• The address of the next microinstruction can be specified in several ways, depending on the
sequencer inputs. Typical functions of a microprogram sequencer are:
• Incrementing the control address register by one,
• Loading into the control address register an address from control memory, and
• transferring an external address or loading an initial address to start the control operations.
Control Unit Design

Microprogrammed Control Unit:

Advantage:
• The main advantage of the microprogrammed control is the fact that once the hardware
configuration is established, there should be no need for further hardware or wiring
changes.
• If we want to establish a different control sequence for the system, all we need to do is
specify a different set of microinstructions for control memory.
• The hardware configuration should not be changed for different operations; the only
thing that must be changed is the microprogram residing in control memory.
Control Unit Design

Microprogrammed Control Unit:

Disadvantage:
• Slower than a hardwired control unit.
• Despite this, microprogramming is the dominant technique for implementing control
units in pure CISC architectures, due to its ease of implementation.
 What is RISC?

■RISC stands for Reduced Instruction Set

Computers.
■RISC is a microprocessor and as the name
indicates, it performs a smaller number of
computer instructions.
■Thus, it has a high speed to operate.
 What is CISC?

■CICS stands for Complex Instruction Set

Computer.
■CISC is the kind of chip that can be easily
programmed and makes the best and efficient
use of memory.
■The main motive of CISC is to make compiler
development easy and simple.
 CISC ARCHITECTURE

■The primary goal of CISC architecture is to complete a task

in as few lines of assembly as possible.
■This is achieved by building processor hardware that is
capable of understanding and executing a series of
operations.
■For example say ”MULT” a CISC processor will have one
instruction only.
■This instruction
►loads the two values into separate registers
►multiplies the operands in the execution unit
 CISC Architecture Advantages

■The primary advantages: the compiler has to do very little

work to translate a high-level language statement into
assembly.
■Very little RAM is required to store instructions.
■The emphasis is put on building complex instructions directly
into the hardware.
 RISC Architecture

■RISC processors only use simple instructions that can be executed

within one clock cycle.
■Thus, the ”MULT” command described above could be divided into
three separate commands:
► ”LOAD,” which moves data from the memory bank to a register
► ”PROD,” which finds the product of two operands located within the registers
► and ”STORE,” which moves data from a register to the
memory banks
 RISC Architecture

■In order to perform the exact series of steps described in the

CISC approach, a programmer would need to code four lines
of assembly:
LOAD A, 2
LOAD B, 5
PROD A, B
STORE 10, A
 RISC Architecture

■This may seem like a much less efficient:

► more lines of code
► more RAM is needed
► compiler must also perform more work to convert a high-level language
■Separating the ”LOAD” and ”STORE” instructions actually reduces the amount of
work that the computer must perform.
■After a CISC-style ”MULT” command is executed, the processor automatically
erases the registers.
■If one of the operands needs to be used for another computation, the processor
must re-load the data from the memory bank into a register.
■In RISC, the operand will remain in the register until another value is loaded in
its place.
 CISC Vs RISC

CISC RISC
Emphasis on hardware Emphasis on software
Includes multi-clock Single-clock,
complex instructions reduced instruction only
Memory-to-memory: Register to register:
”LOAD” and ”STORE” ”LOAD” and ”STORE”
incorporated in instructions are independent instructions

Small code sizes, Low cycles per second,

high cycles per second large code sizes
Transistors used for storing Spends more transistors
complex instructions on memory registers
 Reference

https://cs.stanford.edu/people/eroberts/courses/soco/projects/risc/risccisc/
Control Unit Design

Computer Instructions
• The computer instruction format consists of three fields:
• a 1-bit field for indirect addressing symbolized by I,
• a 4-bit operation code (opcode), and
• an 11-bit address field.

• In the next slide four of the 16 possible memory-reference instructions is listed.

Control Unit Design

Computer Instructions
• The ADD instruction adds the content of the operand found in the effective address to the content
of AC.
• The BRANCH instruction causes a branch to the effective address if the operand in AC is
negative. The program proceeds with the next consecutive instruction if AC is not negative. The
AC is negative if its sign bit (the bit in the leftmost position of the register) is a 1.
• The STORE instruction transfers the content of AC into the memory word specified by the
effective address.
• The EXCHANGE instruction swaps the data between AC and the memory word specified by the
effective address.

❖ Each computer instruction must be microprogrammed.

Control Unit Design

Nano programming (or microprogramming)

• The processof generating the microcode for the control memory is known as
microprogramming.
• Microinstruction Format:
• The 20 bits of the microinstruction are divided into four functional parts.
Control Unit Design

Microprogramming

• F1, F2, and F3 specify microoperations for the computer.

• CD selects status bit conditions.
• BR specifies the type of branch to be used.
• AD contains a branch address. It is of 7 bits because control memory has 128 words.
Control Unit Design
Microprogramming
• Symbols and Binary Code for Microinstruction Fields

• No more than three microoperations can be chosen for a microinstruction, one from each field.
• If fewer than three microoperations are used, one or more of the fields will use the binary code 000 for no operation.
• All transfer-type microoperations symbols use five letters. The first two letters designate the source register, the third
letter is always a T, and the last two letters designate the destination register. For example, the microoperation that
specifies the transfer AC ← DR (F1=100) has the symbol DRTAC, which stands for a transfer from DR to AC.
Control Unit Design

Microprogramming
• Symbols and Binary Code for Microinstruction Fields:
• A microinstruction can specify two simultaneous microoperations. For example,

• Microoperation fields: 000 100 101.

• Two or more conflicting microoperations cannot be specified simultaneously.
• For example, 010 001 000 has no meaning because it specifies the operations to clear
AC to 0 and subtract DR from AC at the same time.
Control Unit Design
Microprogramming
• Symbols and Binary Code for Microinstruction Fields

• We will use the symbols U, I, S, and Z for the four status bits when we write microprograms in symbolic
form.
• The BR (branch) field consists of two bits. It is used, in conjunction with the address field AD, to choose the
address of the next microinstruction.
Control Unit Design
Microprogramming
• When BR=00, the control performs a jump (JMP) operation (which is similar to a branch), and when
BR=01, it performs a call to subroutine (CALL) operation. The two operations are identical except that
a call microinstruction stores the return address in the subroutine register SBR.
• The jump and call operations depend on the value of the CD field. If the status bit condition specified in
the CD field is equal to 1, the next address in the AD field is transferred to the control address register
CAR. Otherwise, CAR is incremented by 1.
• The return from subroutine is accomplished with a BR field equal to 10. This causes the transfer of the
return address from SBR to CAR.
• The mapping from opcode bits (4-bits) to the address for CAR is done when BR field is equal to 11.
Control Unit Design
Nano programming (or microprogramming)
0000000
Routines are relatively independent of the
remaining code. They are often used to execute
Opcode routines
repetitive tasks, such as saving a file. Routines
make programs shorter and easier to write and read.
Subroutines are programs that are used by other
routines to accomplish a particular task. A 128 words in
subroutine can be called from any point within the the control
main body of the micro-program. memory
Total 32 routines.
Each routine is equal to 4 words.
16->opcode routines Sub-routines
16->sub-routines
1111111
Control Unit Design

Microprogramming
• Fetch Routine
• The microinstructions needed for the fetch routine are:
Control Unit Design

Microprogramming
• Fetch Routine
• The address of the instruction is transferred from PC to AR.
• The instruction is read from memory into DR.
• The address part is transferred to AR and then control is transferred to one of 16 routines by
mapping the operation code part of the instruction from DR into CAR.
Control Unit Design
Microprogramming
• Fetch Routine
• The symbolic microprogram for the fetch routine:

• The translation of the symbolic microgram to binary produces the following

microprogram:
Addressing Sequencing

• The diagram shows four different paths from which the

control address register (CAR) receives the address.
• 1) The address sequencing selects the conditional or
unconditional branch based on the status bit conditions.
• 2) Addressing sequence can increment the Control Address
Register (CAR).
• 3) It provides the facility for subroutine calls and returns.
• 4) The addressing sequence provides a mapping from the
instructions bits to a control memory address.
 Unit-3
Basic Computer Organization and Design
 Instruction Set
• An instruction is a command given to the computer to perform a specified operation on a
given data.
• Instruction have two parts:
• Opcode (Operation code)- It specifies the task to be performed.
• Operand – It specifies the data to be operated on and is defined in various forms such as:
a. 8 bit or 16 bit data
b. 8 bit or 16 bit address
c. Internal register or a memory location
• The instruction set is the collection of instructions which the microprocessor is designed
to execute.
• The assembly language program comprises of the collection of instructions to perform a
certain operation.
• Different companies such as Intel, Motorola, etc. have different instruction set.
 Instruction

Type of operation size of Address

Data transfer/ Copy Instruction Zero-address instructions
Arithmetic Instruction One-address instructions
Logical Instruction
Two-address instructions
Branching Instruction
Three-address instructions
Machine control Instruction
instructions
• Zero-address instructions
They are simple and can be executed quickly since they do not require any operand fetching or
addressing. They also take up less memory space.
• One-address instructions
They allow for a wide range of addressing modes, making them more flexible than zero-address
instructions. They also require less memory space than two or three-address instructions.
• Two-address instructions
• They allow for more complex operations and can be more efficient than one-address instructions
since they allow for two operands to be processed in a single instruction. They also allow for a wide
range of addressing modes.
• Three-address instructions
They allow for even more complex operations and can be more efficient than two-address instructions
since they allow for three operands to be processed in a single instruction. They also allow for a wide
range of addressing modes.
INSTRUCTION FORMATS
• The most common fields found in instruction format are:-
• (1) An operation code field that specified the operation to be
performed
• (2) An address field that designates a memory address or a processor
registers.
• (3) A mode field that specifies the way the operand or the effective
address is determined. Computers may have instructions of several
different lengths containing varying number of addresses.
INSTRUCTION FORMATS
The number of address field in the instruction format of a computer
depends on the internal organization of its registers.

Most computers fall into one of three types of CPU organization.

(1) Single Accumulator organization ADD X AC (AC + M [×])

(2) General Register Organization ADD R1, R2, R3 (R1 @ R2 + R3)
(3) Stack Organization PUSH X
Zero – Address Instruction
• These instructions do not specify any operands or addresses. Instead, they operate
on data stored in registers or memory locations implicitly defined by the
instruction.
PUSH A TOP = A
• A stack organized computer
PUSH B TOP = B
does not use an address field
ADD TOP = A+B
for the instruction ADD and
PUSH C TOP = C
MUL.
PUSH D TOP = D
Expression: X = (A+B)*(C+D)
Postfixed : X = AB+CD+* ADD TOP = C+D
TOP means top of stack
M[X] is any memory location MUL TOP = (C+D)*(A+B)

POP X M[X] = TOP

One Address Instructions

• These instructions specify one operand or address, which typically

refers to a memory location or register. The instruction operates on the
contents of that operand, and the result may be stored in the same or a
different location. For example, a one-address instruction might load
the contents of a memory location into a register.
• This uses an implied ACCUMULATOR register for data manipulation.
One operand is in the accumulator and the other is in the register or
memory location. Implied means that the CPU already knows that one
operand is in the accumulator so there is no need to specify it.
 •Expression: X = (A+B)*(C+D)
One Address Instructions AC is accumulator
M[] is any memory location
M[T] is temporary location

LOAD A AC = M[A]

ADD B AC = AC + M[B]

STORE T M[T] = AC

LOAD C AC = M[C]

ADD D AC = AC + M[D]

MUL T AC = AC * M[T]

STORE X M[X] = AC
Two Address Instructions

• These instructions specify two operands or addresses, which may be

memory locations or registers. The instruction operates on the contents of
both operands, and the result may be stored in the same or a different
location. For example, a two-address instruction might add the contents of
two registers together and store the result in one of the registers.
• This is common in commercial computers. Here two addresses can be
specified in the instruction. Unlike earlier in one address instruction, the
result was stored in the accumulator, here the result can be stored at different
locations rather than just accumulators, but require more number of bit to
represent the address.
 •Here destination address can also contain an operand.
Two Address •Expression: X = (A+B)*(C+D)
Instructions R1, R2 are registers
M[] is any memory location

MOV R1, A R1 = M[A]

ADD R1, B R1 = R1 + M[B]

MOV R2, C R2 = M[C]

ADD R2, D R2 = R2 + M[D]

MUL R1, R2 R1 = R1 * R2

MOV X, R1 M[X] = R1
Three Address Instructions

• These instructions specify three operands or addresses, which may be memory

locations or registers. The instruction operates on the contents of all three operands,
and the result may be stored in the same or a different location. For example, a
three-address instruction might multiply the contents of two registers together and
add the contents of a third register, storing the result in a fourth register.
• This has three address fields to specify a register or a memory location. Programs
created are much short in size but number of bits per instruction increases. These
instructions make the creation of the program much easier but it does not mean that
program will run much faster because now instructions only contain more
information but each micro-operation (changing the content of the register, loading
address in the address bus etc.) will be performed in one cycle only.
Three Address •Expression: X = (A+B)*(C+D)
Instructions R1, R2 are registers
M[] is any memory location

ADD R1, A, B R1 = M[A] + M[B]

ADD R2, C, D R2 = M[C] + M[D]

MUL X, R1, R2 M[X] = R1 * R2

Advantages of Zero, One, Two Three-Address
Instructions
• Zero-address instructions
• Simple and can be executed quickly since they do not require any operand fetching or addressing.
• Occupy less memory space.
• One-address instructions
• Allows a wide range of addressing modes, making them more flexible than zero-address instructions.
• Require less memory space than two or three-address instructions.
• Two-address instructions
• Allow for more complex operations and is more efficient than one-address instructions since they
allow for two operands to be processed in a single instruction.
• They also allow for a wide range of addressing modes.
• Three-address instructions
• Allows more complex operations and is more efficient than two-address instructions since they
allow for three operands to be processed in a single instruction.
• They also allow for a wide range of addressing modes.
Disadvantages
• Zero-address instructions
• They can be limited in their functionality and do not allow for much flexibility in terms of addressing
modes or operand types.
• One-address instructions
• They can be slower to execute since they require operand fetching and addressing.
• Two-address instructions
• They require more memory space than one-address instructions and can be slower to execute since
they require operand fetching and addressing.
• Three-address instructions
• They require even more memory space than two-address instructions and can be slower to execute
since they require operand fetching and addressing.
• Overall, the choice of instruction format depends on the specific requirements of the computer
architecture and the trade-offs between code size, execution time, and flexibility
Communication inside a computer..
• A computer program consists of both instructions and
data. The program is fed into the computer through
the input unit and stored in the memory.
• In order to execute the program, the instructions have
to be fetched from memory one by one.
• This fetching of instructions is done by the control
unit.
• After an instruction is fetched, the control unit
decodes the instruction.
• According to the instruction, the control unit issues
control signals to other units.
Communication inside a computer..
o After an instruction is executed, the result of the
instruction is stored in memory or stored
temporarily in the control unit or ALU, so that
this can be used by the next instruction.
o The results of a program are taken out of the
computer through the output unit.
o The control unit, ALU and registers are
collectively known as Central Processing Unit
(CPU)
Instruction cycle
• Instructions are fetched and executed by the
control unit one by one. The sequences involved
for the fetch of one instruction and its execution
are known as instruction cycle.
 Microprocessor Communication and Bus timings
• A program constitutes a set of Instructions. The
processor fetches one instruction from the memory at
a time and executes it.
• The necessary steps that a processor carries out to
fetch an instruction and data from memory and I/O
devices, constitutes an instruction cycle.
Fetch cycle Processor fetches opcode from memory

Execute cycle Processor gets data from memory or I/O devices and
perform specific operation

Instruction cycle Fetch cycle + Execution cycle

•
 Memory
Instruction MDR Data Bus
Register
Memory
Instruction Address
Program Bus
Decoder MAR
Counter
Control

Flow of Instruction code

Send address Memory gets opcode Transfer opcode to

to memory from memory location processor
Clock

Time
A Typical Fetch Cycle
• Execute Operation
• After the instruction is being decoded, execution
begins.
• If the operand is in the GPR (one byte instruction),
then execution is immediately performed and the time
taken is one clock cycle.
• If the instruction contains data or memory address
(two or three byte instruction).
• Processor performs read operation and gets data from
the memory.
• In some instruction write operation is performed.
Instruction Cycle
Instruction Cycle Steps
Computer Registers
• A register is a very small amount of very fast memory that is built
into the CPU (central processing unit) in order to speed up its
operations by providing quick access to commonly used values.
• Small, permanent storage locations within the CPU used for a
particular purpose
• Manipulated directly by the Control Unit
• Wired for specific function
• Size in bits or bytes (not MB like memory)
• Can hold data, an address or an instruction
• Scratchpad for currently executing program
• Holds data needed quickly or frequently
• Stores information about status of CPU and currently executing program
• Address of next program instruction
• Registers are normally measured by the number of bits they can hold.
• Registers are used to store data temporarily during the execution of a
program.
• Some of the registers are accessible to the user through instructions.
• Data and instructions must be put into the system. So we need registers
for this.
General Purpose Registers:
• There are four General Purpose Registers named as follows:
• 1. AX (Accumulator Register): is commonly used for arithmetic &
logic data transfer.
• 2. BX (Base Address Register): is used to save the address of memory
location from where data is being read from or written to.
• 3. CX (Count Register): keeps record of iterations while a LOOP
instruction is running.
• 4. DX (Data Register): holds data of the instruction currently being
executed.
Pointer Registers:
• There are three pointer registers that are used to point towards a
particular memory address.
• BP (Base Pointer): points to the base element of the stack.
• SP (Stack Pointer): always points to the top element of the stack.
• IP (Instruction Pointer): stores the address of the next instruction to be
executed.
• Index Registers: An index register is a crucial component in a computer's
CPU that facilitates efficient data management and quick access to memory
locations. By holding offsets, it streamlines the process of calculating
addresses, enhancing program execution.
• Most commonly, an index register holds the current offset of a memory
location, with another register holding the base address, so the combination
of the two registers creates a completed memory address.
• There are two sets of index registers:
• SI (Source Index): used as source index for string operations.
• DI (Destination Index): used as destination index for string operations.
• Segment Registers: Segments are specific areas for containing data,
code and stack.
• There are three main segments:
• Code Segment: It contains all the instructions to be executed. CS
register stores the starting address of the code segment.
• Data Segment: It contains data, constants and work areas. DS register
stores the starting address of the data segment.
• Stack Segment: It contains data and return addresses of procedures or
subroutines. The Stack Segment register or SS register stores the
starting address of the stack.
Flag Registers:

• The FLAG register is the status register that contains the current state of a
CPU.
• The common flag bits are:
• Overflow Flag (OF)
• Direction Flag (DF)
• Interrupt Flag (IF)
• Trap Flag (TF)
• Sign Flag (SF)
• Auxiliary Carry Flag (AF)
• Parity Flag (PF)
• Carry Flag (CF)
• Zero Flag (ZF)
• Overflow Flag: The overflow flag is set when the arithmetic result is too
large to fit in the allocated space. the overflow flag (sometimes called the V
flag) is usually a single bit in a system status register used to indicate when
an arithmetic overflow has occurred in an operation, indicating that the
signed two's-complement result would not fit in the number of bits used for
the result.
• Direction Flag: The direction flag (DF) is a CPU flag that controls the
direction of string processing in CPUs.
• If directional flag is set (1), then access the string data from higher memory
location towards lower memory location. If directional flag is reset (0), then
access the string data from lower memory location towards higher memory
location.
• Interrupt Flag: This flag is for interrupts. If interrupt flag is set (1), the
microprocessor will recognize interrupt requests from the peripherals. If
interrupt flag is reset (0), the microprocessor will not recognize any interrupt
requests and will ignore them.
• Trap Flag: This flag is used for on-chip debugging. If trap flag is set (1),
the CPU automatically generates an internal interrupt after each instruction,
allowing a program to be inspected as it executes instruction by instruction.
If trap flag is reset (0), no debugging is performed.
• Flag Register
– 8 bit register – shows the status of the microprocessor before/after
an operation
– S (sign flag), Z (zero flag), AC (auxillary carry flag), P (parity flag) &
CY (carry flag)

D7 D6 D5 D4 D3 D2 D1 D0

S Z X AC X P X CY

– Sign Flag
• Used for indicating the sign of the data in the accumulator
• The sign flag is set if negative (1 – negative)
• The sign flag is reset if positive (0 –positive)
• Zero Flag
– Is set if result obtained after an operation is 0

10110011
+ 01001101

1
• Carry Flag 00000000
– Is set if there is a carry or borrow from arithmetic
operation

1011 0101 1011 0101

+ 0110 - 1100 1100
1100
Carry 1 0010 0001 Borrow 1 1110 1001
 • Auxillary Carry Flag
– Is set if there is a carry out of bit 3
• Auxiliary carry – 1; if there is a carry from D3 bit to D4
bit.
– 0; o/w

• Parity Flag
– Is set if parity is even
– Is cleared if parity is odd

• Parity flag – 1; if the no. of binary “one” is even in A.

0; if the no. of binary “one” is odd in A.
ADDRESSING MODES
• Instruction has opcode and operand. There are
different techniques to specify operand in an
instruction. These techniques are called as addressing
modes.
• Direct addressing mode
• Immediate addressing mode
• Register addressing mode
• Register indirect addressing mode(Indirect addressing
mode)
• Implicit/Implied addressing mode
Direct addressing mode
• Address of the operand (data) is given in the
instruction itself.
• Example-

LDA 6000H Load the accumulator with the contents of

the memory location 6000H
STA 2400H Store the contents of the accumulator in the
memory location 2400H
IN 02 The data available on the 8 bit address of the
input port is moved to the accumulator
Immediate addressing mode
• In this addressing mode the operand (data) is specified
within the instruction itself.
• Example

MVI A,05 Move the data 05 into the accumulator

ADI 06 Add 06 to the content of the accumulator

LXI H, 2500 2500 is 16 bit data and is loaded into H-L pair
Register addressing mode
• Operand is one of the GPR or the accumulator.
• Opcode specifies the operation to be performed and
address of the registers.
• Operation takes place between registers.
• Example-
MOV A, B Move the content of the register B to register A

ADD B Add the content of the register B to the content of

the register A
Register Indirect addressing mode
• Address of the data is present as the content of the
another register pair.
• Example
LXI H, 2500H Load H-L pair with 2500 H

MOV A,M Move the content of the memory location whose address is
in H-L pair to the accumulator
HLT Halt
• Indirect Addressing Mode
• Using data in memory directly (without loading
first into a Microprocessor’s register) is called
Indirect Addressing.

• Indirect addressing uses the data in a register pair

as a 16-bit address to identify the memory location
being accessed.
– The HL register pair is always used in conjunction with
the memory register “M”.
– The BC and DE register pairs can be used to load
data into the Accumultor using indirect addressing.
Implicit/ Implied addressing mode
• In this type of instruction, operand is the content of
the accumulator.
• No data, address of data, register are present in the
instruction.
• Example
CMA Complement the content of the accumulator

RAL Rotate accumulator left through carry

RAR Rotate accumulator right through carry

RLC Rotate accumulator left

Interrupts
• 1. Hardware Interrupts
• If a processor receives the interrupt request from an external I/O device it is termed as a hardware
interrupt. Hardware interrupts are further divided into maskable and non-maskable interrupt.
• Maskable Interrupt: The hardware interrupt that can be ignored or delayed for some time if the
processor is executing a program with higher priority are termed as maskable interrupts.
• Non-Maskable Interrupt: The hardware interrupts that can neither be ignored nor delayed and must
immediately be serviced by the processor are termed as non-maskable interrupts.
• 2. Software Interrupts
• The software interrupts are the interrupts that occur when a condition is met or a system call occurs.
For example, a system call is a software interrupt that requests a service from the operating system,
such as opening a file, printing a message, or allocating memory.
• Interrupt Cycle
• A normal instruction cycle starts with the instruction fetch and execute. But, to accommodate the
occurrence of the interrupts while normal processing of the instructions, the interrupt cycle is added
to the normal instruction cycle as shown in the figure below.
Interrupts in instruction cycle
Contd.
• After the execution of the current instruction, the processor
verifies the interrupt signal to check whether any interrupt is
pending. If no interrupt is pending then the processor proceeds to
fetch the next instruction in the sequence.
• If the processor finds the pending interrupts, it suspends the
execution of the current program by saving the address of the
next instruction that has to be executed and it updates the
program counter with the starting address of the interrupt
service routine to service the occurred interrupt.
• After the interrupt is serviced completely the processor resumes
the execution of the program it has suspended.
Enabling and Disabling Interrupts in Computer
Architecture
• Modern computers have facilities to enable or disable interrupts. A
programmer must have control over the events during the execution of the
program.
• For example, consider the situation, that a particular sequence of instructions
must be executed without any interruption. As it may happen that the
execution of the interrupt service routine may change the data used by the
sequence of instruction. So the programmer must have the facility to enable
and disable interrupt in order to control the events during the execution of
the program.
• One can enable and disable the interrupts on both ends i.e. either at the
processor end or at the I/O device end. With this facility, if the interrupts are
enabled or disabled at the processor end the processor can accept or reject
the interrupt request. And if the I/O devices are allowed to enable or disable
interrupts at their end then either I/O devices are allowed to raise an
interrupt request or prevented from raising an interrupt request.
Contd.
• To enable or disable interrupt at the processor end, one bit of its
status register i.e. IE (Interrupt Enable) is used. When the IE flag is
set to 1 the processor accepts the occurred interrupts. IF IE flag is
set to 0 processor ignore the requested interrupts.
• To enable and disable interrupts at the I/O device end, the control
register present at the interface of the I/O device is used. One bit
of this control register is used to regulate the enabling and
disabling of interrupts for the I/O device end.
• 2x86 (CISC) processor
• ARM (RISC) processor
• x86 and ARM instructions
• Intel x86 v/s ARM
• Intel x86:
• is a generic name given to Intel processors beginning with the 8086 processor
released in 1978.
• Since the earliest machines were programmed in assembly language and
memory was slow and expensive, the CISC was implemented in computers.
• Intel x86 uses CISC (Complex Instruction Set Computer) and are chips that are
easy to program and which make efficient use of memory.
• ARM:
• ARM was first known as Acron RISC Machine, but now its known as Advanced
RISC Machine. ARM was developed in late 70s and 80s.
• This RISC Architecture utilizes a small, highly-optimized set of instructions,
rather than a more specialized set of instructions often found in other types of
architectures.
Intel x86 (CISC) .
• Processor
• x86 is a 16, 32bit CISC processor.
• It has limited number of registers.
• Load and store are incorporated in the instructions itself.
• It has complex instructions.
• Efficiency when compared to ARM is less.
• Different machine programs can be executed on CISC machine.
ARM (RISC) processor
• ARM is a 32 bit RICS processor.
It has high code density.
• Load and store architecture.
• 16 bit THUMB instructions.
• Uses simple instructions.
• Conditional execution.
• Inline barrel shifter.
x86 and ARM Instructions(comparison)
• Intel x86:
• If any one of the operand needs to be used for another computation, the
processors must re-load the data from memory into the register. The
length of the code is relatively short.
Very little RAM is required to store instructions.
It requires more transistors, more hardware space, therefore power
consumption is more.

• ARM: Operand will remain in the register until another value is loaded in
its place. More number of code lines. RAM used is more. It requires less
transistors so less hardware space therefore power consumption is less
• Intel x86 v/s ARM Intel x86:
• More emphasis on speed and performance than power
consumption.
• Is compatible with most of the operating systems like Windows 7,
Windows XP, LINUX, Android, Windows Vista, etc.. And these
consumes loads of power.
• Intel x86 is used in laptops, desktops and servers.
• ARM: Focuses mainly on low power consumption.
• It supports LINUX and Android.
• It is used in all smart phones, iPads tablets etc.
References(processor 86 and ARM)
• [1] Emily Blem and Jaikrishnan Menon A Detailed Analysis of Contemporary ARM and
x86 Architectures University of Wisconsin – Madison
• [2] Mjfern (December 21, 2012) The End of x86? An Update (Online) available from<
http://fernstrategy.com/2012/12/21/the-end-of-x86-an-update/ >[22nd February 2013]
• [3] TECH POWER UP (1st December 2011) The Move Away From x86 To ARM Processors
On The Desktop To Start Soon – Survey (Online) available from<
http://www.techpowerup.com/156056/The-Move-Away-From-x86-To-ARMProcessors-O
n-The-Desktop-To-Start-Soon-Survey.html> [22nd February 2013]
• [4] Rachel Courtland (May 2012) The Battle Between ARM and Intel Gets Real (Online)
available from<
http://spectrum.ieee.org/semiconductors/processors/the-battlebetween-arm-and-intel
-gets-real> [23rd February 2013]
• [5] Van’s Hardware Journal (n.d) Mirror The Coming War ARM versus x86 (Online)
available from<
http://vanshardware.com/2010/08/mirror-the-coming-war-arm-versusx86/ > [23rd
February 2013]