UNIT II

8085 INSTRUCTION SET AND PROGRAMMING

1. With suitable examples, explain the addressing modes of 8085.

 Every instruction of a program has to operate on a data. The method of

specifying the data to be operated by the instruction is called Addressing.
 The 8085 supports the following five addressing modes:
a) Immediate Addressing
b) Direct Addressing
c) Register Addressing
d) Register Indirect Addressing
e) Implied Addressing
a) Immediate Addressing
 In immediate addressing mode, the data is specified in the instruction itself. The
data will be a part of the program instruction.
Example: MVI B, 3EH
Move the data 3EH given in the instruction to B-register.
b) Direct Addressing
 In direct addressing mode, the address of the data is specified in the instruction.
The data will be in memory. In this addressing mode, the program instructions
and data can be stored in different memory blocks.
Example: LDA 1050H
Load the data available in memory location 1050H in accumulator.
c) Register Addressing
 In register addressing mode, the instruction specifies the name of the register in
which the data is available.
Example: MOV A, B
Move the content of B-register to A-register.
d) Register Indirect Addressing
 In register indirect addressing mode, the instruction specifies the name of the
register in which the address of the data is available. Here the data will be in
memory and the address will be in a register pair.
Example: MOV A, M
The memory data addressed by HL pair is moved to A-register.
e) Implied Addressing
 In implied addressing mode, the instruction itself specifies the data to be
operated.
Example: CMA
Complement the content of accumulator.
2. Explain the types of instruction in 8085 with examples.

 An instruction is a command to the microprocessor to perform a given task on a

specified data. Each instruction has two parts: one is task to be performed,
called the operation code (opcode), and the second is the data to be operated on,
called the operand.
 The operand (or data) can be specified in various ways. It may include 8-bit (or
16-bit) data, an internal register, a memory location, or 8-bit (or 16-bit) address.
In some instructions, the operand is implicit.
Classification of Instruction based on length
 The 8085 instruction set is classified into the following three groups according to
word size:
a) One-word or 1-byte instructions
b) Two-word or 2-byte instructions
c) Three-word or 3-byte instructions
.
a) One-Byte Instructions
 A 1-byte instruction includes the opcode and operand in the same byte.
Operand(s) are internal register and are coded into the instruction.
Example-1:
 Copy the contents of accumulator in register B.
Mnemonic- MOV B, A
Opcode- MOV
Operand- B, A
Hex Code- 47H
Example-2:
 Add the contents of accumulator to the contents of register B.
Mnemonic- ADD B
Opcode- ADD
Operand- B
Hex Code- 80H
b) Two-Byte Instructions
 In a two-byte instruction, the first byte specifies the operation code and the
second byte specifies the operand. Source operand is a data byte immediately
following the opcode.
Example-1:
 Load the hexadecimal data 32H in the accumulator.
Mnemonic- MVI A, 32H
Opcode- MVI
Operand- A, 32H
Hex Code: 3E,32
Example-2:
 Load the hexadecimal data F2H in the register B.
Mnemonic- MVI B, F2H
Opcode- MVI
Operand- B, F2H
Hex Code- 06, F2

c) Three-Byte Instructions
 In a three-byte instruction, the first byte specifies the opcode, and the following
two bytes specify the 16-bit address. Note that the second byte is the low-order
address and the third byte is the high-order address. (opcode + data byte + data
byte)
Example-1:
 Load contents of memory 2050H in the accumulator.
Mnemonic- LDA 2050H
Opcode- LDA
Operand- 2050H
Hex Code- 3A 50 20
Example-2:
 Transfer the program sequence to the memory location 2050H.
Mnemonic- JMP 2085H
Opcode- JMP
Operand- 2085H
Hex Code- C3 85 20

3. Explain about the different types of instruction set in 8085 microprocessor.

 An instruction is a binary pattern designed inside a microprocessor to

perform a specific function. The entire group of instructions, called the
instruction set, determines what functions the microprocessor can
perform.
 These instructions can be classified into the following five functional
categories:
a) Data transfer instructions
b) arithmetic operations
c) logical operations
d) branching operations
e) Machine Control Instruction
 INTEL 8085 has a very enriched Instruction Set. Varieties of instructions it
can execute. All these instructions can be broadly classified as follows,
 Description No. of No. of Example
opcodes instruction
types
Data transfer Instructions 83 13 MOV, MVI
Arithmetic Instructions 62 14 ADD, SUB
Logical Instructions 43 15 AND, XOR
Stack Instructions 15 9 PUSH, POP
Branch Instructions 36 8 JMP, JZ
I/O Instructions 2 2 IN, OUT
Interrupt Instructions 5 5 RST 0, RST 1
Total 246 66

a) Data Transfer Instructions

 These instructions move data between registers, or between memory and
registers.
 These instructions copy data from source to destination. While copying, the
contents of source are not modified.
Opcode Operand Explanation of Description
Instruction
MOV Rd, Rs Copy from This instruction copies the contents of the
source register into the destination register;
source (Rs) to
M, Rs the contents of the source register are not
destination (Rd) altered. If one of the operands is a memory
Rd, M
location, its location is specified by the
contents of the HL registers.
Example: MOV B, C or MOV B, M
MVI Rd, data Move immediate The 8-bit data is stored in the destination
8-bit register or memory. If the operand is a
M, data memory location, its location is specified by
the contents of the HL registers.
Example: MVI B, 57H or MVI M, 57H

LDA address Load The contents of a memory location,

accumulator specified by a 16-bit address in the operand,
are copied to the accumulator. The contents
of the source are not altered.
Example: LDA 2034H
LDAX Reg. pair Load The contents of the designated register pair
accumulator point to a memory location. This instruction
 indirect copies the contents of that memory location
into the accumulator. The contents of either
the register pair or the memory location are
not altered. Example: LDAX B
STA address 16-bit address The contents of the accumulator are copied
into the memory location specified by the
operand. This is a 3-byte instruction, the
second byte specifies the low-order address
and the third byte specifies the high- order
address. Example: STA 4350H
STAX Reg. pair Store accumulator The contents of the accumulator are copied
indirect into the memory location specified by the
contents of the operand (register pair). The
contents of the accumulator are not altered.
Example: STAX B

LHLD 16-bit Load H and L The instruction copies the contents of the
address registers direct memory location pointed out by the 16-bit
address into register L and copies the
contents of the next memory location into
register H. The contents of source memory
locations are not altered. Example: LHLD
2040H
SHLD 16-bit Store H and L The contents of register L are stored into
address registers direct the memory location specified by the 16-bit
address in the operand and the contents of
H register are stored into the next memory
location by incrementing the operand. The
contents of registers HL are not altered. This
is a 3-byte instruction, the second byte
specifies the low-order address and the third
byte specifies the high-order address.
Example: SHLD 2470H
LXI Reg. pair, Load register The instruction loads 16-bit data in the
16-bit data pair immediate register pair designated in the operand.
Example: LXI H, 2034H or LXI H, XYZ
XCHG none Exchange H and L The contents of register H are exchanged
with D and E with the contents of register D, and the
contents of register L are exchanged with
the contents of register E. Example:
XCHG

b) Arithmetic Instructions
  These instructions perform arithmetic operations such as addition,
subtraction, increment and decrement.
Addition - Any 8-bit number, or the contents of a register or the contents of a
memory location can be added to the contents of the accumulator and the sum is
stored in the accumulator. No two other 8-bit registers can be added directly
(e.g., the contents of register B cannot be added directly to the contents of the
register C). The instruction DAD is an exception; it adds 16-
bit data directly in register pairs.
Subtraction - Any 8-bit number, or the contents of a register, or the contents of
a memory location can be subtracted from the contents of the accumulator and
the results stored in the accumulator. The subtraction is performed in 2's
compliment and the results if negative, are expressed in 2's complement. No two
other registers can be subtracted directly.
Increment/Decrement - The 8-bit contents of a register or a memory location
can be incremented or decrement by 1. Similarly, the 16-bit contents of a register
pair (such as BC) can be incremented or decrement by 1. These increment and
decrement operations differ from addition and subtraction in an important way;
i.e., they can be performed in any one of the registers or in a memory location.

Opcode Operand Explanation of Description

Instruction

ADD R Add register or The contents of the operand (register or

M memory to accumulator memory) are added to the contents of
the accumulator and the result is stored
in the accumulator. If the operand is a
memory location, its location is
specified by the contents of the HL
registers. All flags are modified to
reflect the result of the addition.
Example: ADD B or ADD M
ADC R Add register to The contents of the operand (register or
M accumulator with carry memory) and M the Carry flag are
added to the contents of the
accumulator and the result is stored in
the accumulator. If the operand is a
memory location, its location is
specified by the contents of the HL
registers. All flags are modified to
reflect the result of the addition.
Example: ADC B or ADC M
ADI 8-bit Add immediate to The 8-bit data (operand) is added to the
data accumulator contents of the accumulator and the
result is stored in the accumulator. All
 flags are modified to reflect the result
of the addition. Example: ADI 45H
ACI 8-bit Add immediate to The 8-bit data (operand) and the carry
data accumulator with carry flag are added to the contents of the
accumulator and the result is stored in
the accumulator. All flags are modified
to reflect the result of the addition.
Example: ACI 45H
DAD Reg. pair Add register pair to H The 16-bit contents of the specified
and L registers register pair are added to the contents
of the HL register and the sum is stored
in the HL register. The contents of the
source register pair are not altered. If
the result is larger than 16 bits, the CY
flag is set. No other flags are affected.
Example: DAD H
SUB R Subtract register or The contents of the operand (register or
memory from memory) are subtracted from the
M accumulator contents of the accumulator and the
result is stored in the accumulator. If
the operand is a memory location, its
location is specified by the contents of
the HL registers. All flags are modified
to reflect the result of the subtraction.
Example: SUB B or SUB M
SBB R Subtract source and The contents of the operand (register
borrow from or memory) and M the Borrow flag are
M accumulator subtracted from the contents of the
accumulator and the result is placed in
the accumulator. If the operand is a
memory location, its location is
specified by the contents of the HL
registers. All flags are modified to
reflect the result of the subtraction.
Example: SBB B or SBB M
SUI 8-bit Subtract immediate The 8-bit data (operand) is subtracted
data from accumulator from the contents of the accumulator
and the result is stored in the
accumulator. All flags are modified to
reflect the result of the subtraction.
Example: SUI 45H
SBI 8-bit Subtract immediate The contents of register H are
data from accumulator with exchanged with the contents of register
 borrow D, and the contents of register L are
exchanged with the contents of register
E.
Example: XCHG
INR R Increment register or The contents of the designated register
memory by 1 or memory) are incremented by 1 and
M the result is stored in the same place.
If the operand is a memory location, its
location is specified by the contents of
the HL registers. Example: INR B or
INR M
INX R Increment register pair The contents of the designated register
by 1 pair are incremented by 1 and the
result is stored in the same place.
Example: INX H
DCR R Decrement register or The contents of the designated register
memory by 1 or memory are M decremented by 1
M
and the result is stored in the same
place. If the operand is a memory
location, its location is specified by the
contents of the HL registers. Example:
DCR B or DCR M
DCX R Decrement register pair The contents of the designated register
by 1 pair are decremented by 1 and the
result is stored in the same place.
Example: DCX H
DAA none Decimal adjust  The contents of the accumulator are
accumulator changed from a binary value to two
4- bit binary coded decimal (BCD)
digits. This is the only instruction
that uses the auxiliary flag to
perform the binary to BCD
conversion, and the conversion
procedure is described below. S, Z,
AC, P, CY flags are altered to reflect
the results of the operation.
 If the value of the low-order 4-bits in
the accumulator is greater than 9 or
if AC flag is set, the instruction adds
6 to the low-order four bits.

 If the value of the high-order 4-bits in

the accumulator is greater than 9 or
if the carry flag is set, the instruction
adds 6 to the high-order four bits.
Example: DAA
 c) Logical Instructions
 These instructions perform various logical operations with the contents of the
accumulator.
AND, OR, Exclusive-OR - Any 8-bit number, or the contents of a register, or of a
memory location can be logically AND, Or, or Exclusive-OR with the contents of the
accumulator. The results are stored in the accumulator.
Rotate- Each bit in the accumulator can be shifted either left or right to the next
position.
Compare- Any 8-bit number, or the contents of a register, or a memory location
can be compared for equality, greater than, or less than, with the contents of the
accumulator.
Complement - The contents of the accumulator can be complemented. All 0’s are
replaced by 1’s and all 1’s are replaced by 0’s.
Opcod Operan Explanatio Description
e d n of
Instruction
CMP R Compare The contents of the operand (register or
M register or memory) are M compared with the contents of
memory with the accumulator. Both contents are preserved.
accumulator The result of the comparison is shown by setting
the flags of the PSW as follows:
if (A) < (reg/mem): carry flag is set
if (A) = (reg/mem): zero flag is set
if (A) > (reg/mem) : carry and zero flags are
reset
Example: CMP B or CMP M
CPI 8-bit Compare The second byte (8-bit data) is compared with
data immediate the contents of the accumulator. The values
with being compared remain unchanged. The result
accumulator of the comparison is shown by setting the flags
of the PSW as follows:
if (A) < data: carry flag is set
if (A) = data: zero flag is set
if (A) > data: carry and zero flags are reset
Example: CPI 89H
ANA R Logical AND The contents of the accumulator are logical AND
register or with M the contents of the operand (register or
M memory with memory), and the result is placed in the
accumulator accumulator. If the operand is a memory
location, its address is specified by the contents
of HL registers. S, Z, P are modified to reflect the
result of the operation. CY is reset. AC is set.
Example: ANA B or ANA M
ANI 8-bit Logical AND The contents of the accumulator are logically
data immediate AND with the 8-bit data (operand) and the result
with is placed in the accumulator. S, Z, P are modified
accumulator to reflect the result of the operation. CY is reset.
AC is set. Example: ANI 86H
ORA R Logical OR The contents of the accumulator are logically OR
M register or with M the contents of the operand (register or
memory with memory), and the result is placed in the
accumulator accumulator. If the operand is a memory
location, its address is specified by the contents
of HL registers. S, Z, P are modified to reflect
the result of the operation. CY and AC are reset.
Example: ORA B or ORA M
ORI 8-bit Logical OR The contents of the accumulator are logically OR
data immediate with the 8-bit data (operand) and the result is
with placed in the accumulator. S, Z, P are modified
accumulator to reflect the result of the operation. CY and AC
are reset.
Example: ORI 86H
XRA R Exclusive OR The contents of the accumulator are Exclusive
M register or OR with M the contents of the operand (register
memory with or memory), and the result is placed in the
accumulator accumulator. If the operand is a memory
location, its address is specified by the contents
of HL registers. S, Z, P are modified to reflect
the result of the operation. CY and AC are reset.
Example: XRA B or XRA M
XRI 8-bit Exclusive OR The contents of the accumulator are Exclusive
data immediate OR with the 8-bit data (operand) and the result is
with placed in the accumulator. S, Z, P are modified
accumulator to reflect the result of the operation. CY and AC
are reset. Example: XRI 86H
RLC none Rotate Each binary bit of the accumulator is rotated left
accumulator by one position. Bit D7 is placed in the position
left of D0 as well as in the Carry flag. CY is modified
according to bit D7. S, Z, P, AC are not affected.
Example: RLC
RRC none Rotate Each binary bit of the accumulator is rotated
accumulator right by one position. Bit D0 is placed in the
right position of D7 as well as in the Carry flag. CY is
modified according to bit D0. S, Z, P, AC are not
affected.
Example: RRC
RAL none Rotate Each binary bit of the accumulator is rotated left
 accumulator by one position through the carry flag. Bit D 7 is
left through placed in the carry flag, and the carry flag is
carry placed in the least significant position D 0. CY is
modified according to bit D7. S, Z, P, AC are not
affected.
Example: RAL
RAR none Rotate Each binary bit of the accumulator is rotated
accumulator right by one position through the carry flag. Bit
right through D0 is placed in the carry flag, and the carry flag is
carry placed in the most significant position D7. CY is
modified according to bit D0. S, Z, P, AC are not
affected.
Example: RAR
CMA none Complement The contents of the accumulator are
accumulator complemented. No flags are affected.
Example: CMA
CMC none Complement The carry flag is complemented. No other flags
carry are affected.
Example: CMC
STC none Set Carry Set Carry
Example: STC

d) Branch instructions

(i) Jump Instructions

 The jump instruction transfers the program sequence to the memory
address given in the operand based on the specified flag. Jump instructions
are 2 types: Unconditional Jump Instructions and Conditional Jump
Instructions.
(a) Unconditional Jump Instructions:
 Transfers the program sequence to the described memory address.

OPCODE OPERAND EXPLANATION EXAMPLE

JMP address Jumps to the JMP 8500
address

(b) Conditional Jump Instructions:

Transfers the program sequence to the described memory address only if
the condition in satisfied.
OPCODE OPERAND EXPLANATION EXAMPLE
JC address Jumps to the address if carry flag is 1 JC 8500
 JNC address Jumps to the address if carry flag is 0 JNC 8500
JZ address Jumps to the address if zero flag is 1 JZ 8500
JNZ address Jumps to the address if zero flag is 0 JNZ 8500
JPE address Jumps to the address if parity flag is 1 JPE 8500
JPO address Jumps to the address if parity flag is 0 JPO 8500
JM address Jumps to the address if sign flag is 1 JM 8500
JP address Jumps to the address if sign flag 0 JP 8500

(ii) CALL Instructions

 The call instruction transfers the program sequence to the memory address
given in the operand. Before transferring, the address of the next
instruction after CALL is pushed onto the stack. Call instructions are 2
types: Unconditional Call Instructions and Conditional Call Instructions.
(a) Unconditional Call Instructions:
 It transfers the program sequence to the memory address given in the
operand.
OPCODE OPERAND EXPLANATION EXAMPLE
CALL address Unconditionally call CALL 8500
(b) Conditional Call Instructions:
 The program sequence is transferred to the memory address given in the
operand. Before transferring, the address of the next instruction after CALL
is pushed onto the stack.
OPCODE OPERAND EXPLANATION EXAMPLE
CC address Call if carry flag is 1 CC 8500
CNC address Call if carry flag is 0 CNC 8500
CZ address Calls if zero flag is 1 CZ 8500
CNZ address Calls if zero flag is 0 CNZ 8500
CPE address Calls if parity flag is 1 CPE 8500
CPO address Calls if parity flag is 0 CPO 8500
CM address Calls if sign flag is 1 CM 8500
CP address Calls if sign flag is 0 CP 8500

RETURN Instructions

 The return instruction transfers the program sequence from the subroutine
to the calling program. Before transferring, the address of the main
program popped from the stack to PC.
 Return instructions are two types:
 Unconditional Return Instructions
 Conditional Return Instructions.
(i) Unconditional Return Instructions:
 It transfers the program sequence unconditionally from the subroutine to
the calling program.
OPCODE OPERAND EXPLANATION EXAMPLE
RET none Return from the subroutine RET
unconditionally
(ii) Conditional Return Instructions:
 The program sequence is transferred from the subroutine to the calling
program when condition is satisfied.

OPCODE EXPLANATION EXAMPL

E
RC Return from the subroutine if carry flag is 1 RC
RNC Return from the subroutine if carry flag is 0 RNC
RZ Return from the subroutine if zero flag is 1 RZ
RNZ Return from the subroutine if zero flag is 0 RNZ
RPE Return from the subroutine if parity flag is 1 RPE
RPO Return from the subroutine if parity flag is 0 RPO
RM Returns from the subroutine if sign flag is 1 RM
RP Returns from the subroutine if sign flag is 0 RP

8085 Microprocessor Program

1. Draw the flow chart and write down the

program to add two numbers 16H and D2H.
Store the result in memory location 3015 H.

MVI A, 16H

MVI B, D2H
 ADD B

STA 3015H

HLT

2. Write an assembly language program to divide two numbers of 8-bit

data stored in memory locations 4200 H and 4201H. Store the quotient in
4202H and the remainder in 4203H.

Flowchart

Program

Label Pneumonic Comments

ORG 4100H specify program starting address.
LDA 4201H
MOV B,A Get the divisor in B-register.
LDA 4200H Get the dividend in A-register.
MVI C,00H Clear C-register for quotient.
AGAIN: CMP B
JC STORE If divisor is less than dividend go to store.
SUB B Subtract divisor from dividend.
INR C Increment quotient by one for each subtraction.
JMP AGAIN
STORE: STA 4203H Store the remainder in memory.
MOV A,C
STA 4202H Store the quotient in memory
HLT Halt program execution.
END Assembly end.

3. Write an assembly language program to multiplication two numbers of 8-

bit data stored in memory locations 4200H and 4201H. Store the quotient
in 4202H and the remainder in 4203H.

Label Pneumonic Comments

START MVI D,00 Initialize register D to 00 for carry.
MVI A,00 Initialize Accumulator content to 00
LXI H 8200 Get the first number in memory
MOV B,M Move the first number to B- register
INX H Increment memory by 1
MOV C,M Get the second number in C – register
LOOP ADD B Add content of A register with B
JNC NEXT Jump no carry to NEXT
INC D Increment content of register D
NEXT DCR C Decrement content of register C
JNZ LOOP Jump on no zero to LOOP
STA 8202 Store the result in memory
MOV A,D Move D to A
STA 8303 Store the MSB of result in memory
HLT Terminate the program

Flowchart
4. Write an 8085 program to find the smallest number.

Label Pneumonic Comments

Start LXI H, 8200 Set pointer for array.
MOV B,M Move the first data from memory to B-reg (Count)
INX H Increment the HL pair
MOV A,M Move the second data from memory to accumulator.
DCR B Decrement the count
LOOP INX H Increment HL Pair
CMP M Compare the content of memory with accumulator
JC AHEAD If CF=1, go to Label AHEAD, otherwise go to next step.
MOV A,M Set the new values at Large
AHEAD DCR B Decrement the value of B
JNZ LOOP Repeat the comparison till B= 0(ie. ZF=1)
STA 8300 Store the largest value in memory from accumulator.
HLT Stop the program.

Flowchart
5. Write an 8085 program to find the largest number.

Label Pneumonic Comments

LXI H, 8200 Set Pointers for array
MOV B,M Move the first data from (count ) memory
INX H Increment the HL Pair
MOV A,M Move the second data from memory to accumulator
DCR B Decrement the count
LOOP INX H Increment the HL pair
CMP M Complements of memory with accumulator
JNC AHEAD If A >M go to label AHEAD
MOV A,M Set the new values at large
AHEAD DCR B Decrement the values of B
JNZ LOOP Repeat the comparison till B =0
STA 8300 Store the largest value in memory from
accumulator
HLT Stop the program

Flowchart
6. Write an 8085 Assembly language program to sort numbers in ascending
order.

Label Pneumonic Comments

START LXI H, 8200 Set the pointes for array
MOV C, M Move the Count from Memory to C reg.
DCR C Decrement the count ( C reg.)
REPEAT MOV D, C Move the data in C to D register
LXI H, 8201 Load the Pointer to load next data
LOOP MOV A ,M Set the new value of large
INX H Increment the HL pair.
CMP M Compare the content of memory with Accumulator
JC SKIP If CF=1, then go to SKIP label.
MOV B,M Exchange the contents of A register and memory
MOV M,A
DCX H
MOV M,B
INX H
 SKIP DCR D Decrement the count( D reg.)
JNZ LOOP Check for ZF, if ZF = 0 then go to LOOP label.
DCR C Decrement the count
JNZ REPEAT Check for ZF, if ZF = 0 then go to REPEAT label.
HLT Stop the program.

Flowchart
7. Write an 8085 Assembly language program to sort numbers in
descending order.

Label Pneumonic Comments

START LXI H, 8200 Set the pointes for array
MOV C, M Move the Count from Memory to C reg.
DCR C Decrement the count (C reg.)
REPEAT MOV D, C Move the data in C to D register
LXI H, 8201 Load the Pointer to load next data
LOOP MOV A ,M Set the new value of large
INX H Increment the HL pair.
CMP M Compare the content of memory with Accumulator
JNC SKIP If CF=0, then go to SKIP label.
MOV B,M Exchange the contents of A register and memory
MOV M,A

DCX H

MOV M,B

INX H

SKIP DCR D Decrement the count (D reg.)

JNZ LOOP Check for ZF, if ZF = 0 then go to LOOP label.
DCR C Decrement the count
JNZ REPEAT Check for ZF, if ZF = 0 then go to REPEAT label.
HLT Stop the program.
Flowchart