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MPL Lab Manual (Modified)

The document is a lab manual for the Microprocessor Lab (ITL403) at Datta Meghe College of Engineering for the academic year 2024-2025. It outlines the institute's vision and mission, program educational objectives, specific outcomes, and course outcomes, along with a list of experiments and their corresponding learning outcomes. The manual also includes detailed explanations of various components of a PC motherboard, logic gates, and combinational circuits, along with practical aims and conclusions for each experiment.

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0% found this document useful (0 votes)
2 views

MPL Lab Manual (Modified)

The document is a lab manual for the Microprocessor Lab (ITL403) at Datta Meghe College of Engineering for the academic year 2024-2025. It outlines the institute's vision and mission, program educational objectives, specific outcomes, and course outcomes, along with a list of experiments and their corresponding learning outcomes. The manual also includes detailed explanations of various components of a PC motherboard, logic gates, and combinational circuits, along with practical aims and conclusions for each experiment.

Uploaded by

yeolepriyansha
Copyright
© © All Rights Reserved
Available Formats
Download as PDF, TXT or read online on Scribd
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DATTA MEGHE COLLEGE OF ENGINEERING

DEPARTMENT OF INFORMATION TECHNOLOGY

Academic Year:2024-2025(Term II)

LAB MANUAL
(ACADEMIC RECORD)

NAME OF THE SUBJECT: Microprocessor Lab(ITL403)

CLASS: SE

SEMESTER: IV

Institute Vision : To create value - based technocrats to fit in the world of


work and research

Institute Mission : To adapt the best practices for creating competent


human beings to work in the world of technology and
research.
DATTA MEGHE COLLEGE OF ENGINEERING
DEPARTMENT OF INFORMATION TECHNOLOGY

Academic Year:2024-2025(Term II)


: To develop and foster students for successful careers in
the dynamic field of Information Technology.
Department Vision

Department Mission :
M1 To create and disseminate knowledge through research, teaching & learning and to
: enhance society in meaningful and sustainable ways.
M2 To impart a suitable environment for students and staff to showcase innovative ideas in
: the field of IT.
M3 To bridge the curriculum gap by facilitating effective interaction among industry and
: Staff/Students.

Program Educational Objectives (PEO)


PEO1 - Develop proficiency as an IT technocrat with an ability to solve a wide range of
computational problems in industry, government, or other work environments.

PEO2 - Attain the ability to adapt quickly to new environments and technologies,
assimilate new information, and work in multi-disciplinary areas with a strong
focus on innovation and entrepreneurship.

PEO3 - Prepare graduates with the ability of life-long learning to innovate in ever-
changing global economic and technological environments of the current era.

PEO4 - Possess the ability to function ethically and responsibly with good cultural values
and integrity to apply the best principles and practices of Information Technology
towards the society.
DATTA MEGHE COLLEGE OF ENGINEERING
DEPARTMENT OF INFORMATION TECHNOLOGY

Academic Year:2024-2025(Term II)

Program Specific Outcomes (PSO)

PSO1 - Apply Core Information Technology knowledge to develop stable and secure IT
system
PSO2 - Design, IT infrastructures for an enterprise using concepts of best practices in
Information Technology and security domain.
PSO3 - Ability to work in multidisciplinary IT enabled projects for industry and society by
adapting latest trends and technologies like Analytics, Blockchain, Cloud, Data science.

Course Outcomes
ITL403.1 Demonstrate various components and peripheral of computer system

ITL403.2 Analyze and design combinational circuits

ITL403.3 Build a program on a microprocessor using arithmetic & logical instruction


set of 8086 and get hands on experience with Assembly Language Programming.

ITL403.4 Develop the assembly level programming using 8086 loop instruction set

ITL403.5 Write programs based on string and procedure for 8086 microprocessor.

ITL403.6 Write and debug programs in TASM/MASM.


DATTA MEGHE COLLEGE OF ENGINEERING
DEPARTMENT OF INFORMATION TECHNOLOGY

Academic Year:2024-2025(Term II)

DEPARTMENT OF INFORMATION TECHNOLOGY


ACADEMIC YEAR : 2024 –25 (TERM – II)

List of Experiments
Course Name : Microprocessor Lab
Datta Meghe College of Engineering
Course Code : ITL403
Airoli, Navi Mumbai

Sr. No Name of Experiment Los Covered


1. Case study on PC components and Assembly ITL403.1
2 To study and verify the truth table of various logic gates. ITL403.2
3. To study and verify the truth table and the functionality of : ITL403.2
1) Half Adder 2) Full Adder 3) Half Subtractor 4) Full
Subtractor using Simulator
4. To evaluate a given logic expression and simulate it ITL403.3
The given expression is F(ABC) = AʹB + BCʹ
5. To write and simulate assembly language program for 8bit and ITL403.3
16bit addition
6. Write an assembly language program to convert two digit ITL403.3
packed BCD to unpacked BCD and simulate it.
7. Write an Assembly language program to exchange block of data ITL403.4
bytes using string instructions.
8. Write an assembly language program to count number of 1’s ITL403.4
and 0’s in a given 8 bit number using loop statement and
simulate it.
9. Write an Assembly Language Program to find Smallest/Largest ITL403.5
number from an array of N numbers
10. Write assembly language program to compute the factorial of ITL403.5
positive integer ‘n’ using procedure and simulate it.
11. Interfacing Seven Segment Display ITL403.6
DATTA MEGHE COLLEGE OF ENGINEERING
DEPARTMENT OF INFORMATION TECHNOLOGY

Academic Year:2024-2025(Term II)

EXPERIMENT 01
Date of Performance:
Date of Submission:

Aim: Case study on PC Assembly

Theory: A motherboard is an electronic circuit board in a computer which interconnects


hardware devices attached to it - which is to say, all of the system hardware. At a minimum it
includes one or more Central Processing Units (CPU), and the main processing activity of the
computer takes place on it. However, other connected printed circuit boards may contain their own
pre-processing or post-processing CPUs, to take some of the load off of the motherboard; these,
together with other plug-in boards without CPUs, may be called daughter boards. A PC
motherboard generally has a series of slots, allowing daughter boards to be plugged in directly.
Other connectors on the motherboard allow communication through cables with various peripheral
devices, both inside and outside the computer case.
1. North Bridge: North bridge is one of the two chips located in the direction towards North in
the motherboard. The main function of North bridge is to manage the communications between
the Central Processing Unit and parts of motherboard. North bridge is directly towards Front Side
Bus (FSB). Other names for North bridge are host bridge and Memory Controller Hub (MCH).

2. South Bridge: South bridge is another chip of the logical chipset architecture. It is located to
the South of Peripheral Component Interconnect (PCI) bus in the motherboard. The main function
of South bridge is to control the IO functioning. The North bridge is the medium that connects
South bridge and Central Processing Unit. IO Controller Hub is the other name given to South
bridge for its functionality.
INTERNAL COMPONENTS
1. Mouse & keyboard: Keyboard Connectors are two types basically. All PCs have a Key board
port connected directly to the motherboard. The oldest, but still quite common type, is a special
DIN, and most PCs until recently retained this style connector. The AT-style keyboard connector
is quickly disappearing, being replaced by the smaller mini–DIN PS/2-style keyboard connector.
2. USB (Universal serial bus): USB is the General-purpose connection for PC. You can find USB
versions of many different devices, such as mice, keyboards, scanners, cameras, and even printers.
a USB connector's distinctive rectangular shape makes it easily recognizable.
3. Parallel port: Most printers use a special connector called a parallel port. Parallel port carry
data on more than one wire, as opposed to the serial port, which uses only one wire. Parallel ports
use a 25-pin female DB connector. Parallel ports are directly supported by the motherboard
through a direct connection or through a dangle.
4.CPU-Chip: The CPU, also called the microprocessor performs all the calculations that take
place inside a pc. CPUs come in Variety of shapes and sizes. Modern CPUs generate a lot of heat
and thus require a cooling fan or heat sink. The cooling device (such as a cooling fan) is removable,
although some CPU manufactures sell the CPU with a fan permanently attached.
DATTA MEGHE COLLEGE OF ENGINEERING
DEPARTMENT OF INFORMATION TECHNOLOGY

Academic Year:2024-2025(Term II)


5. RAM slots: Random-Access Memory (RAM) stores programs and data currently being used by
the CPU. RAM is measured in units called bytes. RAM has been packaged in many different ways.
The most current package is called a 168-pin DIMM (Dual Inline Memory module).
6. Floppy controller: The floppy drive connects to the computer via a 34-pin ribbon cable, which
in turn connects to the motherboard. A floppy controller is one that is used to control the floppy
drive.
7. IDE controller: Industry standards define two common types of hard drives: EIDE and SCSI.
Majority of the PCs use EIDE drives. SCSI drives show up in high end PCs such as network servers
or graphical workstations. The EIDE drive connects to the hard drive via a 2-inch-wide, 40-pin
ribbon cable, which in turn connects to the motherboard. IDE controller is responsible for
controlling the hard drive.
8.PCI-slot: Inter introduced the Peripheral component interconnected bus protocol. The PCI bus
is used to connect I/O devices (such as NIC or RAID controllers) to the main login computer. PCI
bus has replaced the ISA bus.
9. ISA slot: (Industry Standard Architecture) It is the standard architecture of the Expansion bus.
Motherboard may contain some slots to connect ISA compatible cards.
10. CMOS Battery: To provide CMOS with the power when the computer is turned off all
motherboards comes with a battery. These batteries mount on the motherboard in one of three
ways: the obsolete external battery, the most common onboard battery, and built-in battery.
11. AGP slot: If you have a modern motherboard, you will almost certainly notice a single
connector that looks like a PCI slot, but is slightly shorter and usually brown. You also probably
have a video card inserted into this slot. This is an Advanced Graphics Port (AGP) slot.
12. CPU slot: To install the CPU, just slide it straight down into the slot. Special notches in the
slot make it impossible to install them incorrectly. So, remember if it does not go easily, it is
probably not correct. Be sure to plug in the CPU fan's power.
13. Power supply plug in: The Power supply, as its name implies, provides the necessary
electrical power to make the pc operate. the power supply takes standard 110-V AC power and
converts into 12-Volt, 5-Volt, and 3.3-Volt DC power.
CONNECTIONS
PS/2: PS/2 ports were for connecting peripherals such as mouse and keyboard to the computer.
PS/2 based mice and keyboards have now been replaced by USB ports as the popular standard.
RJ-45: Wired Ethernet connection. Looks like a (bigger) telephone/modem jack. The cable itself
is referred to by its category (e.g., CAT 5) and basic type, UTP (Unshielded Twisted Pair).
USB: USB or Universal Serial Bus, is a connectivity specification, currently at version 3 (V3).
They are very common today, connecting flash drives and many peripherals.
VGA: A VGA or Video Graphics Array, connector is used to connect a monitor or other video
equipment. The same connector is sometimes used for high-definition television and is sometimes
called an RGB connector.
DA-15: The DA-15 port shown has been used for network connectivity and for video output.
Audio: The audio input and stereo output ports connect to external speakers, a microphone, head
sets, and possibly a game. The external ports are color coded by industry standard.
Firewire: Technically known as the IEEE 1394 interface. Firewire is the standard for high-
definition audio and video transfer and may be found on many digital camcorders.
DATTA MEGHE COLLEGE OF ENGINEERING
DEPARTMENT OF INFORMATION TECHNOLOGY

Academic Year:2024-2025(Term II)


eSATA: eSATA (Serial Advanced Technology Attachment) is a computer bus interface for
connecting to mass storage devices such as hard disk drives and optical drives inside the system
box. eSATA is an external port for drives.
DATTA MEGHE COLLEGE OF ENGINEERING
DEPARTMENT OF INFORMATION TECHNOLOGY

Academic Year:2024-2025(Term II)

CONCLUSION

Study of PC Motherboard Technology (South Bridge & North Bridge), Internal Components and
Connections used in computer system was successfully learnt.

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DATTA MEGHE COLLEGE OF ENGINEERING
DEPARTMENT OF INFORMATION TECHNOLOGY

Academic Year:2024-2025(Term II)

EXPERIMENT 02
Date of Performance:
Date of Submission:

Aim: To study and verify the truth table of various logic gates.
Resources required: Logisim application

Theory: LOGIC GATE:


Logic gates are the basic building blocks of any digital system. It is an electronic
circuit having one or more than one input and only one output. The relationship
between the input and the output is based on a certain logic. Based on this, logic
gates are classified as,
A) Basic Gates

1) NOT Gate
2) AND Gate
3) OR Gate

B) Derived Gates

1) NOR Gate
2) NAND Gate
3) XOR Gate
4) XNOR Gate

Out of these gates, NOR and NAND gates are called “universal gates”, because by
using these gates exclusively we can construct all other logic gates.

A) Basic Gates
1. NOT Gate:
⮚ The simplest gate is the NOT gate, also known as an inverter.
⮚ It accepts a single input and outputs the opposite value. i.e. if the input is 0,
the output is 1 and vice versa
DATTA MEGHE COLLEGE OF ENGINEERING
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Academic Year:2024-2025(Term II)


Symbol:

Expression:

Truth Table:

2) AND Gate:
⮚ In AND gate there are two inputs and one output.
⮚ In AND gate the output of an AND gate attains the state 1 if and only if all
the inputs are in state 1.

Symbol:
DATTA MEGHE COLLEGE OF ENGINEERING
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Academic Year:2024-2025(Term II)


DATTA MEGHE COLLEGE OF ENGINEERING
DEPARTMENT OF INFORMATION TECHNOLOGY

Academic Year:2024-2025(Term II)


DATTA MEGHE COLLEGE OF ENGINEERING
DEPARTMENT OF INFORMATION TECHNOLOGY

Academic Year:2024-2025(Term II)

3) XOR Gate:
⮚ XOR gate is also called as “Exclusive OR” gate.
⮚ It is a digital logic gate that implements an Exclusive OR, i.e. the result
(output) is 1 only if one of the input is 1.
⮚ That is XOR gate is a digital logic gate that generates 1 in output when the
number of 1 input is
odd.
DATTA MEGHE COLLEGE OF ENGINEERING
DEPARTMENT OF INFORMATION TECHNOLOGY

Academic Year:2024-2025(Term II)


DATTA MEGHE COLLEGE OF ENGINEERING
DEPARTMENT OF INFORMATION TECHNOLOGY

Academic Year:2024-2025(Term II)

CONCLUSION

Various logic gates, its symbol, and truth table was successfully learnt.

R1 (3 M) R2 (3 M) R3 (3 M) R4 (3 M) R5(3 M) TOTAL MARKS SIGNATURE


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DATTA MEGHE COLLEGE OF ENGINEERING
DEPARTMENT OF INFORMATION TECHNOLOGY

Academic Year:2024-2025(Term II)

EXPERIMENT 03
Date of Performance:
Date of Submission:

Aim: To study and verify the truth table and the functionality of :
1) Half Adder 2) Full Adder 3) Half Subtractor 4) Full Subtractor using
Simulator

Resources required: Logisim application


Theory:
COMBINATIONAL CIRCUITS
⮚ Combinational Circuit is the type of circuit in which output is independent of time and
only relies on the input present at that particular instant.
⮚ Combinational logic is used to build circuits that produce specified outputs from certain
inputs.

⮚ The various logic gates are the building blocks of combinational logic circuits.
⮚ Examples of Combinational Logic Circuit are half adders, full adders, multiplexers,
demultiplexers, encoders and decoders ,etc.

1) HALF - ADDER
⮚ It is the combinational logic circuit is derived by using two inputs and two outputs.
⮚ The circuit design allowed us to add two one-bit binary numbers. So, the main purpose of
using half adder is for addition.
⮚ With the inputs as A and B,and there are two output bits; one of which is the sum bit SUM
and the other is the carry bit CARRY.
⮚ The circuit can be designed as follows
DATTA MEGHE COLLEGE OF ENGINEERING
DEPARTMENT OF INFORMATION TECHNOLOGY

Academic Year:2024-2025(Term II)

2) FULL - ADDER
⮚ Full adder is the three input two output combinational logic circuit which add three single bits
applied at its input to produce SUM and CARRY outputs,

⮚ It can add two one bit numbers A , B and Carry cIN

⮚ The simplest way to construct a full adder is to connect two half- adder and an OR gate.

⮚ The circuit can be designed as follows


DATTA MEGHE COLLEGE OF ENGINEERING
DEPARTMENT OF INFORMATION TECHNOLOGY

Academic Year:2024-2025(Term II)

3) HALF - SUBTRACTOR
⮚ ☟alf subtractor is the combinational circuit with its two input and two outputs (difference and
borrow) .
⮚ It produces difference between two binary bit at the inputs and also produces an output Borrow
that indicate if a 1 has been borrowed.
⮚ The difference can be applied using X-OR Gate, borrow output can be implemented using an
AND Gate and an inverter.

⮚ The circuit can be designed as follows


DATTA MEGHE COLLEGE OF ENGINEERING
DEPARTMENT OF INFORMATION TECHNOLOGY

Academic Year:2024-2025(Term II)

4) FULL - SUBTRACTOR
⮚ Full subtractor is the combinational circuit with three inputs and two outputs.
⮚ The two half subtractor put together gives a full subtractor.
⮚ The first half subtractor will be C and A B.
⮚ The output will be difference output of full subtractor.
⮚ The expression AB assembles the borrow output of the half subtractor and the second term is the
inverted difference output of first X-OR.
⮚ The circuit can be designed as follows
DATTA MEGHE COLLEGE OF ENGINEERING
DEPARTMENT OF INFORMATION TECHNOLOGY

Academic Year:2024-2025(Term II)

Conclusion:
According to the above observations, simulation output and truth table of respective circuit matches.

R1 (3 M) R2 (3 M) R3 (3 M) R4 (3 M) R5(3 M) TOTAL MARKS SIGNATURE


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DATTA MEGHE COLLEGE OF ENGINEERING
DEPARTMENT OF INFORMATION TECHNOLOGY

Academic Year:2024-2025(Term II)

EXPERIMENT 04
Date of Performance:
Date of Submission:
Aim: To evaluate a given logic expression and simulate it
The given expression is F(ABC) = AʹB + BAʹ

CIRCUIT:

TRUTH TABLE:
A B A’ B’ A’B AB’ A’B+AB’
0 0 1 1 0 0 0
0 1 1 0 1 0 1
1 0 0 1 0 1 1
1 1 0 0 0 0 0

Procedure:
❖ Open Logisim Application.
❖ Draw the circuit according to the given expression.
❖ Verify the truth table by changing the input combinations.

Conclusion:
According to the above observations, simulation output and truth table of respective circuit matches.

R1 (3 M) R2 (3 M) R3 (3 M) R4 (3 M) R5(3 M) TOTAL MARKS SIGNATURE


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DATTA MEGHE COLLEGE OF ENGINEERING
DEPARTMENT OF INFORMATION TECHNOLOGY

Academic Year:2024-2025(Term II)

EXPERIMENT 05
Date of Performance:
Date of Submission:

Aim : To simulate assembly language program for 8bit and 16bit addition

Software required: MASM (Macro Assembler from Microsoft Corp.)

Assembler Directives:
Assembly language programs are composed of two types of statements.
1) The Instructions which can be translated to machine code by the assembler.
2) The directives that directs the assembler during the assembly process for which no machine
code is generated.
Assembler Directives are instructions entered into the source code along with the assembly
language. Pseudo instructions (Assembler Directives) do not get translated into object code, but
are used as special instructions to the assembler to perform some special functions. The
directives control the generation of machine code and organization of the program.
The assembler directives are classified into the following categories based on the functions
performed by them. They are
a) Data definition and storage allocation directives
Data definition directives are used to define the program variables and allocate a specified
amount of memory to them. They are of type BYTE, WORD, Double Word, Quad Word and
Ten Byte and their size in bytes are 1,2,4,8 and 10 respectively. The data definition directives are
DB, DW, DD, DQ, DT.

DB – [Define Byte]
The DB directive is used to define a byte–type variable or to set aside one or more storage
locations of type byte in memory. It can be used to define single or multiple byte variables.
Ex 1) n DB 42H 2) num DB ? 3) grade DB ‘A’ or “A” 4) num DB 25,50,43,76 5) info DB
‘welcome’
6) sum db 25 dup(?)
This statement defines a variable and reserves 25 bytes of consecutive memory locations and are
not initialized.
DW – [Define Word]
DATTA MEGHE COLLEGE OF ENGINEERING
DEPARTMENT OF INFORMATION TECHNOLOGY

Academic Year:2024-2025(Term II)


The DW directive is used to declare a variable of type word, or to reserve storage locations of
type word in memory.
Ex:- MULTIPLIER DW 347AH
DD – [define double word]:The DD directive is used to declare a variable of type double word.
DQ – Define Quad word :The directive DQ is used to define a quad word ( 8 bytes) type
variable.
DT – Define Ten bytes :The directive DT is used to define a Ten bytes type variable.

b)Program organization directives


SEGMENT : The segment directive is used to indicate the start
of
a logical segment. Preceding the segment directive the name you want to give the segment.
ENDS :- [end segment ] : This directive is used with the name of a segment to indicate the end
of the logical segment. ENDS is used with the segment directive to ‘bracket’ a logical segment
containing instructions or data.
ASSUME : ASSUME tells the assembler what names have been chosen for Code, Data Extra
and Stack segments. Informs the assembler that the register CS is to be initialized with the
address allotted by the loader to the label CODE and DS is similarly initialized with the address
of label DATA.
Example
• ASSUME CS: Name of code segment
• ASSUME DS: Name of the data segment
• ASSUME CS: Code1, DS: Data1
c)Alignment Directives

EVEN : Align as even memory address. The directive EVEN is used to inform the assembler to
increment the location counter to the next even memory address if it is not pointing to even
memory location already.

ORG : Originate : The directive ORG assigns the location counter with the value specified in the
directive. It helps in placing the machine code in the specified location while translating the
instructions into machine codes by the assembler.

ORG 100

The above statement informs the assembler to initialize the location counter to 100.

d)Program end Directive


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DEPARTMENT OF INFORMATION TECHNOLOGY

Academic Year:2024-2025(Term II)


END :( END PROGRAM) The END directive is put after the last statement of a program to tell
the assembler that this is the end of the program module. A carriage return is required after the
END directive. The last statement of every program must be an end directive.

e)Value returning attribute directives

LENGTH: The directive length informs the assembler about the number of elements in a data
item such as an array. If an array is defined with DB then it returns the number of bytes allocated
to the variable. If an array is defined with DW then it returns the number of words allocated to
the array variable.

Ex: MOV AX, LENGTH ITEMS

SIZE: The directive SIZE is same as LENGTH except that it returns the number of bytes
allocated to the data item instead of the number of elements in it.

Ex: MOV AX,SIZE ITEMS

OFFSET : The directive OFFSET informs the assembler to determine the displacement of the
specified variable with respect to the base of data segment.

Ex: MOV DX, OFFSET MSG

f)Procedure definition directives

PROC: The PROC directive is used to identify the start of a procedure. The PROC directive
follows a name you give the procedure. After the PROC directive the term NEAR or FAR is
used to specify the type of the procedure.

ENDP : [end procedure ]

This directive is used along with the name of the procedure to indicate the end of a procedure to
the assembler.

Factorial PROC Near

---------

---------

RET

Factorial ENDP
DATTA MEGHE COLLEGE OF ENGINEERING
DEPARTMENT OF INFORMATION TECHNOLOGY

Academic Year:2024-2025(Term II)

g) Macro definition directives

MACRO: A macro is a group of instructions we bracket and give a name to at the start of our
program. Each time we call the macro in our program, the assembler insert the defined group of
instructions in place of the call.

The MACRO directive is used to identify the start of a macro. The Macro directive follows a
name you give the macro.

MACRONAME MACRO ; START OF MACRO

--------

--------

ENDM ; END OF MACRO

ENDM :-[end macro ]

This directive is used along with the name of the macro to indicate the end of a macro to the
assembler.

EQU (EQUATE): EQU is used to give a name to some value or symbol. Each time the
assembler finds the given name in the program, it replaces the name with the value or symbol
you equated with that name.
Example: Num1 EQU 50H
PTR (POINTER) : The PTR operator is used to assign a specific type to a variable or a label. It
is necessary to do this in any instruction where the type of the operand is not clear.
Example:
•INC [BX]
It will not know whether to increment the byte or word pointed to by BX. We use the PTR
operator to clarify how we want the assembler to code the instruction.
•INC BYTE PTR [BX]
This statement tells the assembler that we want to increment the byte pointed to by BX.
•INC WORD PTR [BX]
Simplified Segment Directives
.MODEL

The .MODEL statement followed by the size of the memory system designates the Memory
Model.
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DEPARTMENT OF INFORMATION TECHNOLOGY

Academic Year:2024-2025(Term II)


E.g .MODEL SMALL ;select small model

.CODE

Designates the beginning of the CODE segment in the program.

.DATA

Designates the beginning of the DATA segment in the program

.STACK

Defines STACK segment in the program.

Syntax : .STACK [memory-size] ;memory-size is optional

Default memory size for stack segment is 1KB.

Initializes Stack Segment(SS), Stack Pointer(SP) and Base Pointer(BP).

Table summarizes the different types of models.

Model Description (Memory size )


Tiny Code and Data combined must be <=64K
Small Code <=64K ,Data <=64K
Medium Data <=64K ,Code any size
Compact Code<=64K , Data any size
Large Both Code and Data may be >64K
Huge Same as large model, except that arrays
may be large than 64K

Introduction to Assembly Language programming

Overview :In general programming of a microprocessor usually takes several iterations before
the right sequence of machine code instructions is written. The process, however is facilitated
using a special program called an “Assembler”. The assembler allows the user to write
alphanumeric instructions or mnemonics , called Assembly Language instructions. The
assembler in turn generates the desired machine instructions from the Assembly Language
instructions.

Assembly Language Programming consists of the following steps:

STEP PRODUCES
1 Editing Source file
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2 Assembling Object file
3 Linking Executable file
4 Executing Results

Assembling the program:

The assembler is use to convert the Assembly Language instructions to machine code. The
assembler starts by checking the syntax, or validity of the structure, of each instruction in the
source file. If any errors are found, the assembler displays a report on the errors with brief
explanation of their nature. However, if the program does not contain any errors, the assembler
produces an object file that has the same name as the original file but with the “obj” extention.

The assemblers for x86 families of processors are MASM,TASM,NASM.

Linking the program:

The linker is used to convert the object file to an executable file. When the assembly language
program is free of error messages ,the next step is to link the object modules. Linker combines if
requested, more than one separated assembled modules into one executable module, such as two
or more assembly programs or assembly language with a C program.

Executing the program:

The executable file contains the machine language code. It can loaded in the RAM and be
executed by microprocessor simply typing, from the DOS prompt, the name of the file followed
by the Enter Key. If the program produces an output on the screen, the effect should be noticed
almost immediately. However, if the program manipulates data in memory, nothing would seem
to have happened as a result of executing program.

Debugging the program:

The Debugger can also be used to find logical errors in the program. Even if a program does not
contain

Syntax errors it may not produce the desired results after execution. Logical errors may be found
by tracing the action of the program. Once found, the source file should be reedited to fix the
problem, then re-assembled and re-linked.

MASM(Microsoft assembler):MASM is an integrated software written by Microsoft


Corporation. It consists of an editor, an assembler , a linker and a debugger (Code View).

The following steps are used to run MASM from DOS.


DATTA MEGHE COLLEGE OF ENGINEERING
DEPARTMENT OF INFORMATION TECHNOLOGY

Academic Year:2024-2025(Term II)


Operation Command Produces file

1 Editing Any editor will do Filename.asm

2 Assembling MASM filename.asm Filename.obj

3 Linking ML filename.obj Filename.exe

4 Executing/Debugging Filename / CV filename

Assembly Language Program for addition and subtraction of

1)Two 08 bit numbers

2)Two 16 bit numbers

1. Program to add two 8 bit numbers.

Label Mnemonics Description/Comment


.MODEL SMALL
.DATA
NO1 DW 08H
NO2 DD 0DH
SUM DD 0
CARRY DB 0
.CODE
MOV AX,@DATA ;initialization of DS register
MOV DS,AX
MOV AL,BYTE PTR NO1 ;get LSW of No1 in AL
MOV BL,BYTE PTR NO2 ;get LSW of No2 in BL
ADD AL,BL ;add LSW of two numbers
MOV SUM,AL ;move the result to sum
location
MOV AH,4CH ;terminate program
INT 21H
END
DATTA MEGHE COLLEGE OF ENGINEERING
DEPARTMENT OF INFORMATION TECHNOLOGY

Academic Year:2024-2025(Term II)


2.Program to add two 16 bit numbers.

Label Mnemonics Description/Comment


.MODEL SMALL
.DATA
NUMBER1 DW 8899H
NUMBER2 DW 9988H
SUM DW 0
CARRY DB 0
.CODE
MOV AX,@DATA ; Initialization of Data segment
register
MOV DS,AX
MOV AX,NUMBER1 ;get number1 in AX
MOV BX,NUMBER2 ;get number2 in BX
ADD AX,BX ;add the two numbers
JNC EXIT ;exit if no carry
INC CARRY ;increment carry by 1
EXIT MOV SUM,AX ;move the result to sum location
MOV AH,4CH ;terminate program
INT 21H
END

Conclusion:
The Addition of two 8 bit/16 bit numbers is done and the output is Verified.

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(15)

-----------------------------------------------------------------------------------------
DATTA MEGHE COLLEGE OF ENGINEERING
DEPARTMENT OF INFORMATION TECHNOLOGY

Academic Year:2024-2025(Term II)

EXPERIMENT 06
Date of Performance:
Date of Submission:

Aim: Assembly language program to convert two-digit packed BCD to unpacked


BCD and simulate it.

Software required: MASM (Macro Assembler from Microsoft Corp.)

Procedure:
A digit BCD number is available in register AL. We have to unpack this BCD
number i.e. we have to separate the BCD digits. e.g : If the number = 92 H then
in unpack form the two digits will 02 H and 09 H. i.e. we have to mask the lower
nibble, first and rotate four times to the right to get the MSB digit. Then to get
the LSB digit mask the upper nibble. Display the result. Masking lower nibble
means ANDing the number with OF0 to get MSB.

Algorithm:

Step I : Initialize the data memory.

Step II : Load number into register AL.

Step III : Mask the lower nibble.

Step IV : Rotate 4 times left to make ; MSB digit = LSB.

Step V : Display the digit.

Step VI : Load number in AL.

Step VII : Mask upper nibble.

Step VIII : Display the result.

Step IX : Stop.
DATTA MEGHE COLLEGE OF ENGINEERING
DEPARTMENT OF INFORMATION TECHNOLOGY

Academic Year:2024-2025(Term II)

FLOWCHART:

CONCLUSION
Program for converting two-digit Packed BCD to Unpacked BCD is simulated.

R1 (3 M) R2 (3 M) R3 (3 M) R4 (3 M) R5(3 M) TOTAL MARKS SIGNATURE


(15)

--------------------------------------------------END---------------------------------------------------
DATTA MEGHE COLLEGE OF ENGINEERING
DEPARTMENT OF INFORMATION TECHNOLOGY

Academic Year:2024-2025(Term II)

EXPERIMENT 07
Date of Performance:
Date of Submission:

Aim: Write an Assembly language program to exchange block of data bytes using
string instructions

Software required: MASM (Macro Assembler from Microsoft Corp.)

Algorithm:

1. Initialize the data in the source memory and destination memory


2. Initialize SI and DI with source and destination address
3. Initialize CX register with count
4. Initialize the direction flag to zero
5. Exchange the data blocks byte by byte
6. Decrement CX
7. Increment SI and DI
8. Check for count in CX, if not zero go to step 5 else go to step 9
9. Stop

String Instructions: A string is a series of bytes stored sequentially in the


memory. String instructions operate on such “strings”.

The source string is at a location pointed by SI in the data segment. The


destination string is at location pointed by DI in the extra segment. The count
for string is always specified in CX register. Since CX register is 16 bit , we can
transfer maximum 64 KB using string instruction. SI and /or DI registers are
incremented/decremented after each operation depending direction flag. If
DF=0, auto increment SI and DI. This is done using CLD instruction. If DF=1,
auto decrement SI and DI ,using STD instruction.
DATTA MEGHE COLLEGE OF ENGINEERING
DEPARTMENT OF INFORMATION TECHNOLOGY

Academic Year:2024-2025(Term II)


FLOWCHART:

CONCLUSION: The exchange of five, data bytes using string is performed and output is
verified.

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(15)

----------------------------------------END----------------------------------------------
DATTA MEGHE COLLEGE OF ENGINEERING
DEPARTMENT OF INFORMATION TECHNOLOGY

Academic Year:2024-2025(Term II)

EXPERIMENT 08
Date of Performance:
Date of Submission:

Aim: Assembly language program to count number of 1’s and 0’s in a given 8 bit
number using loop statement and simulate it.

Software required: MASM (Macro Assembler from Microsoft Corp.)


1 . FLOWCHART
DATTA MEGHE COLLEGE OF ENGINEERING
DEPARTMENT OF INFORMATION TECHNOLOGY

Academic Year:2024-2025(Term II)

Conclusion:
In this experiment we to count the number of 1’s and 0’s using loop statement .

R1 (3 M) R2 (3 M) R3 (3 M) R4 (3 M) R5(3 M) TOTAL MARKS SIGNATURE


(15)

----------------------------------------END----------------------------------------
DATTA MEGHE COLLEGE OF ENGINEERING
DEPARTMENT OF INFORMATION TECHNOLOGY

Academic Year:2024-2025(Term II)

EXPERIMENT 09
Date of Performance:
Date of Submission:

Aim: Assembly Language Program to find Smallest/Largest number from an array


of N numbers

1]WAP for finding smallest number in an array of five data bytes.

2]WAP for finding largest number in an array of five data words.

Software required: MASM (Macro Assembler from Microsoft Corp.)

Algorithm for finding smallest 8 bit number:

1. Initialize data segment ,byte counter, and memory pointer to read numbers from array.

2. Read number from array.

3. Increment memory pointer to read next number

4. Decrement byte counter

5. Compare two numbers, IF number < next number then perform step no. 7

6. Replace with next number which is smaller

7. Increment memory pointer to read next number from array

8. Decrement counter by 1

9. If byte counter is not zero then perform step no. 5

10. Store smallest number

11. End
DATTA MEGHE COLLEGE OF ENGINEERING
DEPARTMENT OF INFORMATION TECHNOLOGY

Academic Year:2024-2025(Term II)


DATTA MEGHE COLLEGE OF ENGINEERING
DEPARTMENT OF INFORMATION TECHNOLOGY

Academic Year:2024-2025(Term II)


Program for finding smallest number in an array of five data bytes

.MODEL SMALL
.DATA
ARRAY DB 98H,23H,34H,0AH,10H
SMALLEST DB ?
.CODE
MOV AX,@DATA
MOV DS,AX
MOV CX,04H
MOV SI,OFFSET ARRAY
MOV AL,[SI]

UP: INC SI
CMP AL,[SI]
JNC NEXT
MOV AL,[SI]
NEXT: DEC CX
JNZ UP
MOV SMALLEST,AL
MOV AH,4CH
INT 21H
END
Conclusion: Programs executed to find smallest/largest number and output is verified.

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---------------------------------------END---------------------------------------------------
DATTA MEGHE COLLEGE OF ENGINEERING
DEPARTMENT OF INFORMATION TECHNOLOGY

Academic Year:2024-2025(Term II)

EXPERIMENT 10
Date of Performance:
Date of Submission:

Aim: Assembly language program to compute the factorial of positive integer ‘n’
using procedure and simulate it.

Software required: MASM (Macro Assembler from Microsoft Corp.)

Theory:

Whenever we need to use a group of instructions several times throughout a


program, then we write the group of instructions as a separate procedure. Procedure
is a part of code that can be called from a program in order to make some specific
task. It is a reusable section of a software program which is stored in memory once
but can be used as often as necessary. Procedures make program more structural and
easier to understand. Generally procedure returns to the same point from where it
was called.

A procedure can be of two types.

1) Near Procedure 2) Far Procedure

Near Procedure: A procedure is known as NEAR procedure if it is written


(defined) in the same code

segment which is calling that procedure. Only Instruction Pointer (IP register)
contents will be changed in Near procedure.

NEAR procedure.

FAR procedure : A procedure is known as FAR procedure if it is written (defined)


in the different code

segment than the calling segment. In this case both Instruction Pointer(IP) and the
Code Segment(CS)
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DEPARTMENT OF INFORMATION TECHNOLOGY

Academic Year:2024-2025(Term II)


register content will be changed.

Directives used for procedure :

PROC directive: The PROC directive is used to identify the start of a procedure.
The PROC directive

follows a name given to the procedure. After that the term FAR and NEAR is used
to specify the type of

the procedure.

ENDP Directive: This directive is used along with the name of the procedure to
indicate the end of a

procedure to the assembler. The PROC and ENDP directive are used to bracket a
procedure.

The syntax for procedure declaration:

[Procedure name ] PROC [attribute] ; at the beginning

…………

[Procedure name ] ENDP ; at the end

CALL instruction and RET instruction :

CALL instruction : The CALL instruction is used to transfer execution to a


procedure. It performs two

operation. When it executes, first it stores the address of instruction after the CALL
instruction on the

stack. Second it changes the content of IP register in case of Near call and changes
the content of IP

register and CS register in case of FAR call.


DATTA MEGHE COLLEGE OF ENGINEERING
DEPARTMENT OF INFORMATION TECHNOLOGY

Academic Year:2024-2025(Term II)


The ret instruction transfers control to the return address located on the stack. This
address is usually placed on the stack by a call instruction

Algorithm:

1. Start

2. Initialize data segment

3. Initialize AX=1

4. Load the number in BX

5. CALL procedure FACT

6. Compare BX with 1 .If BX > 1, go to step 8

7. AX = 1 and return back to calling program

8. FACT = AX * BX

9. Decrement BX

10.Compare BX with 1 .If not equal to zero, go to step 8

11.Return back to calling program

12.End
DATTA MEGHE COLLEGE OF ENGINEERING
DEPARTMENT OF INFORMATION TECHNOLOGY

Academic Year:2024-2025(Term II)

.MODEL SMALL
.DATA
NUM DW 0005H
FACTLSW DW ?
FACTMSW DW ?
DATTA MEGHE COLLEGE OF ENGINEERING
DEPARTMENT OF INFORMATION TECHNOLOGY

Academic Year:2024-2025(Term II)


.CODE
MOV AX,@DATA
MOV DS,AX
MOV AX,01H
MOV BX,NUM
CALL FACT
MOV FACTLSW,AX
MOV FACTMSW,DX
MOV AH,4CH
INT 21H
FACT PROC NEAR
CMP BX,01H
JZ LAST
UP: MUL BX
DEC BX
CMP BX,01H
JNZ UP
RET
LAST:MOV AX,01H
RET
FACT ENDP
END

CONCLUSION: Program executed to find factorial of the given number and


output is verified

R1 (3 M) R2 (3 M) R3 (3 M) R4 (3 M) R5(3 M) TOTAL MARKS SIGNATURE


(15)

-------------------------------------------END------------------------------------
DATTA MEGHE COLLEGE OF ENGINEERING
DEPARTMENT OF INFORMATION TECHNOLOGY

Academic Year:2024-2025(Term II)

EXPERIMENT 11
Date of Performance:
Date of Submission:

AIM: Interfacing Seven Segment Display


THEORY:
A seven-segment display module is an electronic device used to display
digital numbers and it is made up of seven LED segments. Because of the small size
of the LEDs, it is really easy for a number of them to be connected together to make
a unit like seven segment display. In the seven-segment display module, seven LED
s are arranged in a rectangle. Sometimes, an additional LED is seen in a seven-
segment display unit which is meant for displaying a decimal point.
Each LED segment has one of its pins brought out of the rectangular package.
Other pins are connected together to a common terminal. Seven segment displays
can only display 0 to 9 numbers. These seven LEDs indicate seven segments of the
numbers and a dot point.
Seven segment displays are seen associated with a great number of devices
such as clocks, digital home appliances, signal boards on roads etc.
DATTA MEGHE COLLEGE OF ENGINEERING
DEPARTMENT OF INFORMATION TECHNOLOGY

Academic Year:2024-2025(Term II)


7-SEGMENT DISPLAY TYPES AND DISPLAY FORMAT

The hex decimal data corresponding to the segments which have to glow for
displaying a character is output to port B.
DISPLAY FORMAT Let us consider Common Anode display to understand well, the
following table represents the connection format of the Common Anode display

Logic ‘0' in the above format will turn ON that particular segment. Logic ‘1' will
keep the segment OFF. The data for turning ON the display is through 8255 (We
already studied).
Types of Seven segment displays-
Common Cathode 7-segment display:
As the name indicates, its cathode is connected to a common terminal. Below is the
schematic diagram to indicate its common cathode structure. It should be
connected to the ground while operating the display. If a high voltage is given to
the anode, then it will turn on the corresponding segment.
DATTA MEGHE COLLEGE OF ENGINEERING
DEPARTMENT OF INFORMATION TECHNOLOGY

Academic Year:2024-2025(Term II)

In this type, the anode is common. It should be connected to a high voltage

(to the supply through a resistor to limit current). In order to turn on a particular
segment, a ground level voltage is given to the corresponding pin. Since logic
circuits

can sink more current than they can source, common anode connection is used

most widely.

Display codes:
Display codes are the voltages to be applied to the segments to display a
number. It is in the order of segments ABCDEFG(DP), total 8 bits. For example,
below is the common cathode display code of ‘0’ with decimal point OFF.
DATTA MEGHE COLLEGE OF ENGINEERING
DEPARTMENT OF INFORMATION TECHNOLOGY

Academic Year:2024-2025(Term II)


Below is a table with display codes of all the digits with decimal point OFF.

If number 0 has to be displayed, then the segments A through F are turned


on. In order to turn on the segments, in common cathode mode, the anode
terminals are subjected to a high voltage while in common anode mode, the

cathode terminals are given a low voltage.

CONCLUSION
Program for interfacing seven segment display was successfully
executed.

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(15)

----------------------------------------END-------------------------------------

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