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Assignment 03

This document is an assignment for EE-211 Digital Logic and Design, detailing tasks related to Karnaugh Maps and combinational logic circuits. It includes specific questions requiring the conversion of standard POS and SOP expressions, as well as circuit diagrams using NAND and NOR logic. The assignment was announced on December 11, 2022, and is due on December 22, 2022, with a total of 5 marks available.

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4 views1 page

Assignment 03

This document is an assignment for EE-211 Digital Logic and Design, detailing tasks related to Karnaugh Maps and combinational logic circuits. It includes specific questions requiring the conversion of standard POS and SOP expressions, as well as circuit diagrams using NAND and NOR logic. The assignment was announced on December 11, 2022, and is due on December 22, 2022, with a total of 5 marks available.

Uploaded by

soveme7713
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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Reg.

# Section Department
Name : Program __________________

Assignment3
EE-211 Digital Logic and Design

Announced Date: 11-12-2022 Due Date : 22-12-2022 Total Marks = 5


Teacher Name: Naveed Ur Rehman Marks Obtained =

(CLO_2): (Cognitive Level C4 i.e Analyzing) (PLO_2 i.e, Problem Analysis)

Question No 1)

a) Apply the concept of Karnaugh Map to convert the following standard POS expression into a minimum
POS expression, a standard SOP expression, and a minimum SOP expression.

(𝑎) ̅ + 𝐴̅̅̅̅̅̅̅̅̅̅̅
𝐴𝐵̅ 𝐶𝐷 + 𝐵̅ 𝐶̅ 𝐷 + (𝐴 + 𝐶)𝐵𝐷 (𝐵̅ + 𝐶)
(𝑏) ̅ ̅ ̅
𝐴𝐶 𝐷 + 𝐵 𝐶𝐷 + 𝐴𝐵𝐶𝐷

(CLO_2): (Cognitive Level C4 i.e Analyzing) (PLO_2 i.e, Problem Analysis)

Question No 2)

(a) Solve the combinational logic circuits in given figure to a minimum form. Draw logic circuit diagram
of minimum form also. [5 marks]

(i) (ii)

(b) Solve ABC+DE expression with only NAND logic (draw circuit)
(c) Solve (A+B) . (C+D) expression with only NOR logic (draw circuit)

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