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High - Speed ADC - Amp - DAC - Testing

The document outlines the testing methodologies and specifications for high-speed ADCs and DACs, including their architectures, performance parameters, and testing setups. It details the necessary testing instruments and provides examples of testing procedures. Agilent offers comprehensive solutions for these tests, including frequency and time domain instruments, as well as graphical programming software.

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Peter Chang
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0% found this document useful (0 votes)
5 views35 pages

High - Speed ADC - Amp - DAC - Testing

The document outlines the testing methodologies and specifications for high-speed ADCs and DACs, including their architectures, performance parameters, and testing setups. It details the necessary testing instruments and provides examples of testing procedures. Agilent offers comprehensive solutions for these tests, including frequency and time domain instruments, as well as graphical programming software.

Uploaded by

Peter Chang
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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High Speed ADC & DAC Testing

China AEO: Deng Liang Sun


High Speed DAC Testing Agenda
- DAC architecture & transfer curve
- Static and Dynamic parameters
- DAC testing setup and example
High Speed ADC Testing
- ADC architecture & transfer curve
- Static and Dynamic parameters
- ADC testing setup and example
Testing Instruments
- AWG, Sine-Wave Generator, Logic Analyzer, Pattern Generator, Pulse
Generator, Spectrum Analyzer, Multi-Meter, Power Supply, Oscilloscope
Backup Material
- Oscilloscope effective bits spec
- ADC static and dynamic parameters defined
Agilent Confidential Page 2
High Speed DAC Testing
DAC Block Diagram

Example of a 3-bit DAC

2R 4R 8R
Vref Rf

Vo

a0 a1 a2
digital code

Rf a0 a1 a2
Vo = ( + + ) Vref
R 2 4 8

Agilent Confidential Page 4


DAC Transfer Curve

Discrete Analog Discrete Analog


Output Voltage Output Voltage

Digital input code Digital input code

Ideal DAC Non-Ideal DAC

1 Device LSB = step size

Agilent Confidential Page 5


DAC Static Performance Specifications

•Differential
•Differential Non-Linearity
Non-Linearity (DNL)
(DNL)
•Integral
•Integral Non-Linearity
Non-Linearity (INL)
(INL)
•Gain
•Gain Error
Error
•Offset
•Offset Error
Error
•Gain
•Gain Mismatch
Mismatch

Agilent Confidential Page 6


DAC Dynamic Performance Specifications

• Total harmonic distortion (THD)

• Signal-to-noise plus distortion (SND)

• Signal-to-noise ratio (SNR)

• Spurious free dynamic range (SFDR)

Agilent Confidential Page 7


DAC Testing Setup

DMM
Pattern Generator DUT
Spectrum Analyzer

Power Supply

PC with Analysis Software

Agilent Confidential Page 8


DAC Testing Example (From Japan)
81130A
81131A

PG
PG
Sampling
Clock

Sampling Clock
(For DUT DAC)
Analog Signal
16903A
16903A DA
16720A DA 3458A
16720A Converter
Logic
LogicAnalyzer
Analyzer Converter
N bits data E4401B
(Digital in)

Agilent VEE GP-IB


LAN

PC(GP-IB)

Agilent Confidential Page 9


DAC Solution Results (DNL/INL)

Agilent Confidential Page 10


(Spectrum)
DAC Solution Results( )

Agilent Confidential Page 11


High Speed ADC Testing
Flash ADC Block Diagram

+Vref
n
2 -1 comparators
R
Analog
input n n lines
R

Output register
Decode logic
R

朧 ref Sampling clock


Agilent Confidential Page 13
3- Bit ADC
code
width

111

110
code
101
Binary Output Code

center code transition


100
1 LSB
011

010

001

000
1/8 1/4 3/8 1/2 5/8 3/4 7/8 FS

Analog Input

Agilent Confidential Page 14


ADC Ideal vs. Real

Ideal
111
Real
110

101
Binary Output Code

100

011

010

001

000
1/8 1/4 3/8 1/2 5/8 3/4 7/8 FS

Analog Input

Agilent Confidential Page 15


ADC Static Performance Specifications

•Differential
•Differential Non-Linearity
Non-Linearity (DNL)
(DNL)
•Integral
•Integral Non-Linearity
Non-Linearity (INL)
(INL)
•Offset
•Offset Error
Error
•Full
•Full Scale
Scale Gain
Gain Error
Error

Agilent Confidential Page 16


ADC Dynamic Performance Specifications

• Total harmonic distortion (THD)

• Signal-to-noise plus distortion (SND)

• Effective Number of Bits (Neff)

SND=6.02 * Neff + 1.76

• Signal-to-noise ratio (SNR)

• Spurious free dynamic range (SFDR)

Agilent Confidential Page 17


ADC Testing Setup

Pulse Generator

AWG
DUT Logic Analyzer
Sine-Wave Generator

Power Supply

PC with Analysis Software

Agilent Confidential Page 18


ADC Testing Example (From Japan)

81130A

10MHz Reference
PG
PG
Sampling Sampling
Clock Clock
Sine Wave (For ADC) (For LA)
(to Analog input)
16903A
AD
AD 16903A
SG
SG Filter
Filter Converter
16911A
16911A
Converter N bits data
Logic
LogicAnalyzer
Analyzer
(Digital out)

PSG Agilent VEE


GP-IB LAN
PC(GP-IB)

Agilent Confidential Page 19


ADC Solution Result (DNL/INL)

Agilent Confidential Page 20


ADC Solution Result (Spectrum)

Agilent Confidential Page 21


Summary

• Agilent provides total solution for high speed ADC&DAC testing

• Frequency Domain Instruments: Performance Spectrum Analyzer,


Low Phase Noise Signal Generator
• Time Domain Instruments: Logic Analyzer, AWG, Low Jitter Pulse
Generator
• Graphical Programming Software: VEE Pro with Matlab Script

Agilent Confidential Page 22


Backup Material

1.Oscilloscope effective bits spec


2.ADC static & dynamic parameters defined
ADC Static & Dynamic Parameters Defined
ADC Static Performance Specifications

•Differential
•Differential Non-Linearity
Non-Linearity (DNL)
(DNL)
•Integral
•Integral Non-Linearity
Non-Linearity (INL)
(INL)
•Offset
•Offset Error
Error
•Full
•Full Scale
Scale Gain
Gain Error
Error

Agilent Confidential Page 25


ADC DNL

111
110
Binary Output Code

missing code
101 DNL
100
011
DNL
010
001
000
1/4 FS 1/2 FS 3/4 FS FS
Analog Input

Data[i+1] - Data[i] Data(N-1) - Data(0)


DNL(i) = - 1.0; DeviceLSB =
DeviceLSB N-1

Agilent Confidential Page 26


ADC INL
111

Binary Output Code


110
101
100
011 INL
010
001
000
1/4 FS 1/2 FS 3/4 FS FS
Analog Input

Data[i] - (DeviceLSB * i + Data[0])


INL(i) = ;
DeviceLSB
Data(N-1) - Data(0)
DeviceLSB =
N-1
Agilent Confidential Page 27
ADC Gain Error
Gain Error

Actual code center line


111
110
Binary Output Code

Ideal code center line


101
100
011
010
001
000
1/4 FS 1/2 FS 3/4 FS FS
Analog Input

Agilent Confidential Page 28


ADC Offset Error

Ideal code center line

111
110
Binary Output Code

101
100 Actual code center line
011
010
001
000
1/4 FS 1/2 FS 3/4 FS FS
offset
Error Analog Input

Agilent Confidential Page 29


ADC Dynamic Performance Specifications

• Total harmonic distortion (THD)

• Signal-to-noise plus distortion (SND)

• Effective Number of Bits (Neff)

SND=6.02 * Neff + 1.76

• Signal-to-noise ratio (SNR)

• Spurious free dynamic range (SFDR)

Agilent Confidential Page 30


Total Harmonic Distortion, THD

The total harmonic distortion (THD) is the ratio of the rms sum of
the first N harmonic components (typically up to the 5th harmonic)
to the rms value of a full-scale input signal.
THD is expressed in dB.

Agilent Confidential Page 31


Signal-to-Noise plus Distortion, SND (SINAD)
Signal to Noise & Distortion is the ratio of the rms value of the input
signal to the rms sum of all other spectral components below Nyquist
frequency, including everything but DC.

Agilent Confidential Page 32


Effective Number of Bits, Neff
(ENOB)
• Neff or ENOB says that the ADC is equivalent to this (ENOB) number of bits as far
as SIND is concerned. That is, a converter with an ENOB of 7.0 has the same
SINAD as a theoretically perfect 7-bit converter.

SND=6.02 * Neff + 1.76

Agilent Confidential Page 33


Signal-to-Noise Ratio, SNR

Signal to Noise Ratio (SNR) is the ratio of the rms value of the input
signal to the rms sum of all other spectral components below Nyquist
frequency, excluding harmonics and DC.

Agilent Confidential Page 34


Spurious Free Dynamic Range, SFDR
Spurious free dynamic range (SFDR) is the ratio of the largest
spectral component excluding DC to the rms value of the full-
scale input signal.
A max
SFDR = -20 * log
Hf
A is the amplitude of the maximum spurious component of either
harmonics or noise
Hf is the fundamental of the output signal

Agilent Confidential Page 35

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