Electronic Devices and "

Digital Systems

► overview of Semiconductors, DiocJes and Ttansistors

► Introduction to JFET and MOSFEt
► Construction and Working of Power llevites-SCR
► BJT
► MOSFET_ .
► IGBT ' .! f

► Switching Characteristics of SCR

► . Co~verters.
Types of Power .
. • I

► Natural and Forced Commutation I -

' .'
)

► Linear Voltage Regulator

.. _j

► SMPS

► Realize the Logic Expression Using Basic Logic Gates ·

.•·••,... ' • ' ; •. • • • I

► Combinational Logic Design .

► Sum of Product form (SOP) and Product of Sum (POS) form
► Minterm and Maxterm . . ' '

► . '
Karnaugh Map (K-Map) representation oflogica1
. .
functions
. .

103
 104 Electrical and Electronics Engineering

2.1
OVERVIEW OF SEMICONDUCTORS
nd ty materials can be classified into three types as co d
tricity. lnsuiato ~ llctors
Dep~ ing on their conduc tivi
is a good conductor •of elec
sellllconductors and. insulators · C~nductor . . 1 g
b
etw een these two
r is atr,
ex.
11r,._'
to f
conduc r O e1ectr~city. Semiconductor has its con duc t1v1 ty ym
·
2·1·1 Classifications of Semiconductors
iconductor.
Intrinsic Semiconductor: A pure semiconductor is c~Iled intrinsic sem

Sem iconduc tor: Due to the poo r condu~tion ~t room temperature, the .int . .
Ext~insic troruc devices. Hence the current cond ~IC
nductor, as such, is not useful in the elec
Sellllco
capability of the intrinsic semiconductor
a s~a ll amount of impurity to the intr
should be increased. This can b~ achieved
insic semiconductor, so that It becomes
by a~ct~on
im
dip :
d'
Thi~ process of adding impurity is known as
Sellll~onductor or extrlnsic semiconductor.
N-t ype Sem ic~ ndu ctor : A sma l~
or p~osphorus 1s added to the pure semicon
~
- ou nt of pen~valent ~purities; ~uch as arsenic,
ductor (germaruum _or s1bc~n crystal) to get
antimo

number of
N.;
tavalent impurity (ant~?ny) mcreases the
sem1cond~ctor. Thus, the addition of pen the conduct1v1ty of N-type semiconducto
m the con duc tion ban d ther eby increas ing
electrons
tron s far exceeds the number of holes in an N-~
As ~ resu lt of dop ing , the num ber of free elec
carriers
ico ndu cto r. So elec tron s are call ed maj ority carriers and holes are called minority
sem
ico ndu cto r: A sma ll amo unt of trivalent impurities such as aluminium or boron
P-type Sem holes is
ed to the pure sem icon duc tor to get the P-type semiconductor. The number of
is add termed as
y mu ch gre ater than the num ber of free _electrons in a P-type material, holes are
ver
y carriers. ·:.
majority carriers and electrons as minorit

2.2 PN JUNCTION DIODES

n is a bounda ry or interface betw ee~ two types of semiconductor material, p-~
p-n junctio ; · · ·
iconductor.'•' ..
and n-type, inside a single crystal of sem

I
I
/

Fig. 2.1 PN Junction Dio de

w elec tricity to flow in only the direction. The arrow of the circuit synibOI
Diodes allo
t can flow
shows the direction in which the curren
 Electronic Devices and Digital Systems 105
•g
-~
ill of Diode: The process of applying an external voltage is called "b' . "
B·as: When no exte . . ~
zeroed 1Junction Diode. rnal voltage potential 1s applied to th PN. . W .
~.

13ias e Junction dmde called Zero

·
ard Biased PN Junction Diode
forW
W}1en a diode is connect:~ in a Forw~rd Bia
s condition, a negative volta e is a lied
n-tYPe IIlaterial and a pos1t1ve voltage is app to the
lied to the p-type material. If ls ext~~l
t,eeoIIles greater _than the value ~f the ~otenti voltage
al barrier, approx. 0.7 volts for silicon and
volts for gennamum, the potential barriers O3
opposition will be overcome and current will
tofloW, s~
. ,
for VF > VO? the. potential barrier at
the junction completely disappears and hen
the hOles ~ross_ the Juncti~n ~rom P~type t? ce,
N-type and the electrons cross the junctio
opposite direction, resulting m relatively larg n in the
e current flow in the external circuit.

electrons - - holes

Fig. 2.2 Forward Bi~sed PN jun

ction Dio de
Reverse Biased PN Junction Diode
When a diode is connected in a Reverse
Bias condition, a positive voltage is applied
N-type material and a negative voltage is _to the
applied to the P-type material. The ·positive
applied to the N-type material attracts elec voitage
trons towards the positive electrode and awa
the junction, while the holes in the P-type end y from
are also attracted away from the junction tow
the negative electrode. · · · 1 ., • : ards
• , •.. ' • • .., ·, • ;;

For large applied reverse bias, the free

electrons from the N-type moving towards
·positive terminal of the battery acquire suff the
icient energy to move with high velocity to
valence electrons from semiconductor atom dislodge
s in the crystal. These newly liber~ted elec
turn, acquire sufficient energy to dislodg trons, in
e other parent electrons. Thus, a_large num
electrons are formed which is commonly ber of free
called as an avalanche of free electrons·. Thi
to the breakdown of the junction leading to s leads
very large reverse current. ~e r~~er_s~ vo!t
which the junction breakdown occurs is kno age a!
wn as breakdown voltage·. ·, · · ' .

' !
 106 Electrical and Electronics Engineering

depletlon region
j_
.. .. ...., ..
. .......
electrons -
..... - holes

.--
•
N •
.
• . •
•:• •
•' •
• •
•+.

. . . . . .,.
• • • • • ♦
• • • • • • • ♦ •

.1,,_. _ __..,
L------11
Fig. 2.3 Reversed Biased PN Diode

+I (mA) Forward
Current

Forward
Bias
Reverse knee
Breakdown I
Voltage +V
-V .
Forward Voltage
Reverse Voltage
-50mA
Germanium
t. 0.3v Germanium
'Zener' I 0.7v Silicon
Breakdown -20mA Silicon
or Avalanche
Region
Reverse
-I (µA) Current'

Fig. 2.4
. ' ., . I •

PN Diode Applications .J

-(i) rectifiers in de power supplies

.._ ~I. J I ,

(ii) switch in digital logic circuits used in computers

, . (iii) clamping network used as de restorer in TV receivers and voltage.multipliers .. '
. •:t (iv).clipping circuits used as wave shaping circuits used in computers, radars, radi~ and
·: · ' •TV receivers .· ·= ' ·: ·, • · • · • , J · •
j 4
• ~ ! ,.. • • I • • - • r- _

· (v) demodulation (detector) cir~uits.

2.3 BIPOLAR JUNCTION TRANSISTOR [BJT] i •.,.,1' ,j, :

A Bipolar Junction Transistor (BJT) is a three terminal semiconductor device in which the
operation depends on the interaction of both majority and minority carriers and hence the name
Bipolar. It is used in amplifier and oscillator circuits, and as a switch in digital circuits. It has
wide applications in computers, satellites and other modem communication systems. ·
The BJT consists of a silicon (or germanium) crystal in which a thin layer of N-type Silicon

I .
 Electro · Dev· ·
nrc rces and Digital Systems 107
. bed between two layers of P-type silicon Thi
~ sandW'c ly in a NPN transistor, a layer of p_iyp;, ~is1or is refertec1 10 as PNP. ma:
A)ternauvNe-ty'pe material. The two types of the BJT are re ena is S~dowiched between two
1ayers of . . . presented m Fig 2.5. .

B B E- Emitter
8-Base •
N CE . p C-Collector
E p
C

(b) .
Fig. 2.5 Transistor (a) NPN and (b) PNP

2,3.1 Operation of NPN Transistor

Asso h wn in Fig.2.6, the fr
forwardth bias.applied.to the emitter base junction of an NPN transistor
causes a lot of electrons
·p om
.. th region
e emitter . to the base·region. As the base
b to crossover

~
. r btly doped with -type ~punty, e num er of holes m the base region is very small and

b:~,g lbe number of electrons lbat combine wilb holes in lbe P-type base region is also very
Hence a few electrons combine _with holes to constinuf a base current '.. The remaining
:iectrons (more than 95 %) crossover mto the collector reg10~ _to constitute a coll""°' CUtrel}I
Thus the base and collector current summed up gives the e~tter current, i.e. IE = - (Ic +
~- . . ,·. cc ' . .,, ,. . . ' .., . ' " ' . " . ' ' • . . '
IB). ' , ,. ' • . . . . . . •.,,. .. .. '
'-' ·In the external circuit :of ~ e t:lPN bipol~ junctio~ transistor, the magnitudes of ~e emitter
current IE, the base_current I8 ~d ~e _collecto~ _cu~~nt IC ar~ related b~ IE ,Ic
=:=_ +.,1s·
. : .1 : p , N . ' ,,
,-.i .
......
...
....,_ ,
.......
e-+ .....
.............
... ...........
....... ..........
. '

.............
~
L.,1 I
t
le
' ' ' I I
',
'
l'L l . ~. . )
. ' '
! L'. _,t

I
; . ,
,
-, , t I

Fig. 2.6 Operation of NPN Transistor

13,2 Operation of PNP Transistor .

. . 'tter-base junction of a PNP transistor
As shown in Fig. 2. 7, the forward bias apphed to the eIDI tot he base region as the base is
lcauses a lot of holes from the enutter f . tr in the base region IS. very small
• region to crossover
.gh . . ·ty The number o e1ec o08 . •
1 tly doped with N-types IIDpun • . ..,..'\ffnm • the N-type base region Is a so
1
and hence the number of holes combined with base current I • The
very small. Hence a few holes 8
 108 Electrical and Electronics Engineering

ctor region to constitute a couector

remaining holes (more than 95 %) crossover into the colle · the emit· ter current .
ed up gives
current Ic. Thus the coJiector and base current when summ •~
.
T
"E = - (IC + 18).
, the magnitudes of the elllitter
In the external circuit of the PNP bipolar junction transistor
related by
current IE, the base current 18 and the coHector current Ic are
IE= lc+ l8
currents in a bipolar transistor
This equation gives the fundamental relationship between the
. . ·
~rew t
p

.....,__
._......,..
N
~ ...
p

........
~ -

._.. ~ ~~ ..
._..
.,_.,_
~
.....
~

r,: .......... ~
.-.. .-

'(8·---
~ 7cl
.--

I
I -
+ I' -

Fig. 2. 7 Operation of PNP Tramistor

2.3. 3 Transistor Configurations

are basically three possible ways to
As the Bipolar Transistor is a three terminal device, there
being common to both the input and
connect it within an electronic circuit with one terminal
y to its input signal within a circuit as
output. Each method of connection responding differentl
circuit arrangement.- , ·
the static characteristics of the transistor vary with each
Current Gain .
Common Base Configuration - has Voltage Gain but no
age Gain.
Common Emitter Configuration - has both Current and Volt
no Voltage Gain.
Common Collector Configuration - has Current Gain but

The Common Base (CB) Configuration

nded base configuration, the BASE
As its name suggests, in the Common Base or grou
output signal with the input signal
connection is common to both the input signal AND 'the
being applied between the base and the emitter term
inals. The corresponding output signal
as shown with the base terminal
is taken from between the base and the collector terminals
t.
grounded or connected to a fixed reference voltage poin .,
 Electronic Devices and Digitaf Systems 109

-le .

_+7 r·-"f----1+ II II

Vsr,
-
-
Fig. 2.8 Common Base Configuration
is ic
(mA) (mA)
0.3
20 0,4mA
0.2 15 i;....------ 0.3
10 0.2
0.1
5 Ql
ICEO
0
1.0 . , 0 .5 10 15 20
VBE (V) : . r '
.V
CE
(V) .
' . -

Fig:
.
2.9 lnp~t Output c,u;,ra~teristi~s
' 1 ◄ ' ~ ' • • •

The Common fo1itter (CE) Configuration . , . , . .

In the Common Emitter or grounded emitter configuration, the' input signal_is applied between
the base, while the output is taken from between the collector and the emitter as shown. This
type of configuration}' the ~ost common}y us,ed circ.uit for trans~tor based_amplifiers and
which represents the normal method of bipolar transistor connection. ·
., - ,;le
...
,, -
.Rt. VM.

.
·_ }e ! 'l , '.

------, +
-
VSE Vee -· '
Fig. 2.10 Common E:W,,ter .Configuraticm
 110 Electrical and ElectroniQ.Engineering

1a•• ..
1

Vca(VOL.TSt

Fig. 2 .11 Output Characteristics

2.4 FIELD EFFECT TRANSISTOR

by an
FET is a device in which the flow of current through the conducting region is controlled
only by
electric field. Hence the name Field Effect Transistor (FET). As current conduction is
majority carries, FET is said to be a unipolar device.
Based on the construction, the FET can be classified into two types as Junction FET
(JFET) and Metal Oxide Semiconductor FET (MOSFET).
Depending upon the majority carriers, JFET has been classified into two types Damed
with
as (1) N-channel JFET with electro.ns as the majority carriers and (2) P-channel JFET
holes as the majority carriers.

2.4.1 Construction of N-Channel JFET J

at the
It consists of an N-type bar which is made of silicon. Ohmic contacts, (terminals) made
two ends of the bar, are called Source and Drain.
are
Source (S) This terminal is connected to the negative pole of the battery. Electrons which
the majority carriers in the N-type bar enter the bar through this terminal.
carriers
Drain (D) This terminal is connected to the positive pole of the battery. The majority
leave the bar thruogh this terminal.
bar by
Gate (G) Heavily doped P-Type silicon is diffused on both sides of the N-type silicon
G.
which PN junctions are formed. These layers are joined together and the ealled Gate

2.4.2 Operation of N-Channel JFET

and
• When VGs = 0 and Vos = 0 When no voltage is applied between drain and source,
gate and source, the thickness of the depletion regions around the PN junction is uniform
as shown in Fig.
 Electronic Devi
ces and Digital Systems . 111

JFETeona~
p

Fig. 2.12
N ·Channel JFET D .,..;--...--.

G ·

Vos
v~

Fig. 2.13
, . When vns = O 3Dd Vcs is decreased fro~ zero In this case PN iunction., are reverse
th•
biased and hence _thickness of the d~pletion region increases. As y ci is decreased from
rero, the reverse bras voltage across the PN junction is increased and heni:e ·the th' kn
. region
of the deplenon . .m th. e ch~•1 ~creas.. .
es ~ . the two depletion regions1cess
make
contact with each other. In this condinon, the channel IS said to be curoff. The value ofV ·.
, which is required to cutoff the Channel is called thO cutoff voltage vc· , ,· , . .. : ·. "'
, When Vos = 0 and V., is increased from zero Drain is positive with respect to the SOUrte
with V., = 0. Now the majority carriers (electrons) llow through the N-channe1 from
source to drain. Therefore the conventional·currem 1n llOws from drain to sinm:e: ·, · ·
As Vos is .increaseq, the cross-sectional area, of the channel will 1"' reduced, At a
certain value V, of V°" the cross-secµona1 area at B becomes minimum. At thiSvoltage,
the channel is said to be pini:h0d off and thO drain v<ilta!ie V, is called the pinch-off voltage.
• When VGS is negative and VDS is increased When the gate is maintained at .iiegative . a
voltage less than the negative cutoff voltage, the reverse . voltage across the junction is
a
further increased. Hence for negative val~ of VGS' the curve of 1n versus Vns is similar
o:
to that ·for Vos = but the values of V, and BV
000
are lower, as shown in fig. q.21. . ,
From the curves, it is seen that above the pinch-off voltage, at a constant value of
V°" 1 increases with an increase of Vos· Hence a JFET is suitable for ·use as a voltage
0

amp,lifier, siIµjlar to a transistor amplifier, . , ,." .., ,. , ; , , · ,. •• •

•• j l
). .' _; . . <: , / ~
~ ..._ :- J :-,' ·• •~ -
.
;r "11,·
I > ·... I • ;
 112 Electrical and Electronics Engineering

/o(mA) c .

loss -~ p - =-
~VGS::::,_"'-o- -t-t-- H, 8
:'
VGS •-1 V ..
:
I
:

..'''
'
Vos =-3 V I

.
I
I
I
I

!&.::,._ _ __.___ _ _ _ _ _,.____ Vos(V)

0 BVoao

Fig. 2.14 Drain Characteristics

Comparison of JFET and BJT

1. PET operation depends only on the flow of majority carriers - holes for
P-channel FETs
and electrons for N-channel FETs. Therefore. they are called Unipolar devices. Bipolar·
transitor (BJT) operation depends on both minority and majority current carriers.
2. FETs are less noisy than BJTs.
3. FETs exhibit a much higher input impendance (> 100 MQ) than BJTs. --
. .•
4. FETs are much easier to fabricate and are particularly suitable for ICs because they occupy
less space than BJTs. ,
' ... '
5. FET is normally less sensitive to temperature.
6. FET amplifiers have less voltage gain and produce more signal distortion except for small
signal operation.

2.5 METAL OXIDE SEMICONDUCTOR FIELD EFFECT TRANSISTOR (MOSFET)

T •
•

MOSFET is the common term of the Insulated Gate Field Effect Transistor (IGFET). There
are two forms of MOSFET: (i) Enhancement MOSF ET and (ii) .Depletion MOSF ET.' . ., >
. . .

Principle
g
By applying a transverse electric field across an insulator, deposited on the semiconductin
g
material, the thickness·and hence the resistance of a conducting channel of a semiconductin
material can be controlled. ·· · · ·

Enhancement MOSFET
Construction: The construction of an N-channel Enhancement , MOSFET is shown in
Fig.13.23. Two highly doped N+ regions are diffused in a lightly doped substrate of P-type
They
silicon substrate. One N+region is called source Sand the other one is called the drain D.
are separated by 1 mil 00- inch). A thin insulating layer of Si02 is grown over the surface
3

of the structure and holes are cut into the oxide layer, aUowing contact with source and drain.
Then a thin layer of metal aluminium is formed over the layer of Si02• This meetal layer
covers
the entire channel region and it forms the gate G. ·
 Electronic llovkes and lligiid Sisiams
113
ea of the gate, in conjunction with thC insulating oxide . ·. .

.fll' ~
.,,etal ar annel fonns a parallel plate capacitor This dev· . 1ayer of S10 and the
. This
ooductorfchthe insulating layer of Si02·
• layer .gives an extremely high~ lllSuIa2led
l(:C IS called th .
. gate •
~c ,use o lllpUt tesJStance
ief IJ0'1,10SfllT. . .. . ;
~r tb' the substrate is grounded and a positive volrage is a r ..
,atioa: If n Ginduces an equal negative charge on the substrate~ 1~ the gate, the
DP'p,o cJialge; Thus an electric field is proctuced between the e .een SOUree saur:' ~
regi:
ii>",Jrain th eiectric field is pe'Jl':ndicuJar !" the plates of.the capac;: !he
~
drau, regions.
·on of of electrons which are mmority c!I....: • th through the oxide.
"'oeganv As the pos,hve voltage on the gate increase, the - duced . ·. . rms ~
dir""
11
· e charge .. . -uers m e P-type substrate fo
.1 version layer.
• . . .mcreases' and10current negative
ductor increases. Hence the conductivity fl fr charge m
.
intbese!lll'dcon gh the mduce . current is enhanced b ows
d channe1. Thus the dram th om . . source
10 drain wrou shown in figure. · Y e Positive gate
voltage as
· Vac
- II Ii +

s
0
G Al
♦ ♦ ♦ ♦ +· +

Induced N-chainel
P-type,_$1.()sttate
................................. ..__ ......_.,_.., _,

Voo
Fig. 2.15 ·N-Ch~nnel Enhanceme,ii MOSFET L,. I

2.6 SCR (SILICON-CONTROLLED RECTIFIER)

SCR is a llrree-terminaJ and four layers solid-state device from the thyristor family. ' This
article discusses the SCR symbol, construction, working, applications, packages, and VJ
· Characteristics of SCR. SCR stands for Silicon-controlled rectifier. The SCR is avery llll(lOrtmt
monber of the thyristor family. It is 'more popular than other thyristor family" members like
l'RIAC, and DIAC even though that thyristor is used interchangeably_with SCR.The SCR
•Ylllhot is very similar to the diOde symbol, but it bas an additional gate terminal. As SCR only
allows current in one direction like a diode, the symbol is very similar to the diodOsym1,o1, As
lie asiode current is triggered by thO gate, ·therefore the gate terminal is denote<fin contrast to
the diode symbol, · · · · ·

Fig. ·2.16 SCR Symbol

114 Electrical and Electronics Engineering

. The three terminals of the SCR are named anode, ca~ode, an~ gate. For proper working,
connect the anode of the SCR with positive and catho_de wtth negative of ~e battery. A positive
pulse for a short duration is required at the gate to kick start the conduct10n. .

2.6.1 SCR Construction and Working

SCR has four layers of extrinsic semiconductor materials. These four-lay~r form three PN
junctions named J.1, J2, and J3. The layers are either NPNP ~r P~PN. The ~node~~ cathOde
terminals are placed at the end layers and where the gate temunal ts pl_aced with the third layer_'
The outer layers are heavily dopped and the inner two layers are hghtly dopped. !he sea
Construction is illustrated here below. -

Fig. 2.17 4 Layers of SCR Construction

SCR working depends upon the battery polarity and the gate input. The SCR can operate in
three different modes. ·
1. Forward Blocking Mode
2. Forward Conduction Mode
3. Reverse Blocking Mode.
·, . ;•

Forward Blocking Mode of .SCR: When anode of SCR connects to the positive ~d
cathode of SCR with the negative of the battery terminal. And no pulse is applied at the gate·
terminal. The SCR work in the forward blocking mode. This means that SCR will not conduct
even though the polarity of SCR is forward bias. In forward blocking mode, the J1 and J3 PN
junctions are forward biased. But the middle junction J2 is reverse biased, therefore, the SCR.
will not conduct in the forward blocking mode. · · · . , , '

Forward Conduction Mode of SCR: Forward conduction mode is the only mode of
SCR for conduction. The SCR can be set into the forward conduction mode in two ways. First
by providing the gate pulse to forward bias the J2 junction. Second by increasing the anode to
cathode voltage to break down the J2 junction. The gate pulse method is preferred and suitable
for many applications. The breakdown method reduces the SCR lifetime. The SCR will remain
 Electronic Devices and Digit
al Systems 115
after the removal of the ga'
. tJlode even sC R drops be te pulse or reducing the ap
low th plied voltage. If
cuoll t of the e ho lding current the SCR will
dll _...rell sto p falling back
. coll _Ae c,w i, ;ng JllOde.
iJI ¢lov blocfV'·
tllefOi tward • M od e in SCR: If the
anod
to · 1c,e:1<1119 J1JUi
8 0 lal of SCR connects to theepotersitminal of the SCR connects to the
",,ss ive of batte
JIaao."e alld catbtr,~eng teI.11ode. In •this mode, Jl and J3 junctions are revery terminals. The SCR
e bloc~: ~ rward bias. A s . . rse biased. Where the
oe" ver
. ill re . ctioOs J2 is 10 two Ju nct10ns are re ve b'
rse ias , so there 1s .
1s. d}e JuJl bi t but onlY a small leakage current due to the drift . ch .
no current
IJ!ld. tbfoug . arge ea rn er. .
aowillg .
teristics of SCR
I
choroc
b,2 V teristics of SCR is obtaine .
i urve of VI cb ar :o ug h sc R d by changing the voltage
. When connecting in reve across the SCR and
fb~ ~ g the curren~ ge current rse polarity, the SCR will conduc
up to breakdown voltage t
oo11c~ current, led
as!Il ak down an
:tartto act like a short circuit. , VB R. After
Below the breakdown poin
th at po int, the SC R
¢11 bre e blocking mode. t, the region is
caJled revers . the forward -
polarity, the SCR will no
If connect : eking mode, t allow any current. This
the region is below the VBO point. Th region is
called forW~d 1O is in the e portion of the VI
cbafllcterisUC curve first quadrant. In 'this regi
' . on, the current is below
. ,. . , . the latching
current. .
AnodeC.Unent, I

·l .
_/;

flacking Mode ·, ' ' '

, ~~..::1;;;;:~.,t ~~..r,;;~~.:~ .p,,.~ A.t'

Fig. 2. 18
When the voltage reaches the
VBO point, the SCR sta
SCR can be put into the forw rts the current flow. Alter
ard conduction mode by natively, the
anode current above the lat applying _the gate that will
ching current. A higher increase the
forward_ conduction mode as gate current can put SC R
COnduction mod "f th in the graph Ig3 > Ig2 > lg faster in the
e 1 e anode current 1s 1. Th e SC R wi ll remain in the forward
. abov . g curre }
e the holdm nt. . · . ,·
I

• I
 116 Electrical and Electronics Engineering

SCR Applications '

The most common SCR application is the DC motor speed control. The DC motor has tw0
windings where the annature winding is connected to the AC supply by two SCR. The Sc
controls the amount of current to the motor and ultimately the spe:d of the DC motor. ~

2.7 Insulated Gate Bipolar Transistor (IGBT)

t
The JGBT or Insulated Gate Bipolar Transistor is the combination of BJT and MOSFE
·
Its name also implies the fusion between them. "Insulated Gate" refers to the input pan
MOSFET having very high input impedance. It does not draw any input current rather
~f
operates on the voltage at its gate tenninal. "Bipolar" refers to the output ~art of the BJ;
having bipolar nature where the current flow i~ due to both types of charge earners. It allows.
id combinatio:
to handle very large curr~nts and voltages using sm'.111 voltage sig~als. This hybr_
m~es the IGBT a voltage-controJJed device. · ·
J, '

.. '
l~~~ Ec r ' G~ ~ ·'
• I

H· •'
I l Jt ' • , • • I

IGBT - Insulated-Gate Bipoiar Transistor Symbol

Fig. 2.19

2.7.1 Construction and Working of IGBT

IGBT is made of four layers of semiconductor to fonn a PNPN structure. The collector (C)
A
electrode is attached to P layer while the emitter (E) is attached between the P and N layers.
P+ substrate is used for the construction of IGBT. An N- layer is placed on top of it to
form
PN junction 11. Two P regions are fabricated on top of N- layer to form PN junction J2. The .
e. N+
P region is designed in such a way to leave a path in the middle for the gate (G) electrod
regions are diffused over the P region as shown in the figure.
E G E
Emitter Gate Emitter Metal

--l•J-_■_·-·-■__!-_-:.... Electrode

• • '
Orift
I ., ) I
• Region
lr4ector
~
'
Collector
C

Fig. 2.20 Structure of IGBT

 Electronic Devices and Digital System
s 117
d ate are metal electrodes.
The emitter is directly attach
A'litter an ~ insubited using a ed 10 the N +
el)>" gat e is silicon dioxide layer. The base
111e bile t11e . hY it is called mJ . . P+ layer iniect holes
ector 1ayer. Wh"1le the N- layer
jotl ~ er t11at wrtlonal to
15 is called the dri:,ft region.
"g ,.1, \aY
voltage blocking capacity. The P layer
. 0 1'' · propo · des1· d t h above is known as the
55 1s N- layer 1s gne o ave a path ,or ~ cu
jilt ttiic1'11~13'f. 'fhe h the
junction using the channel tha rrent flow between the emitte
\ts of 1 tbfOUg t is created under the influence r
r;,JY 11eetor of the
..A co e gate electrode. '
81"' ge at tb .
f JGBT collector (C) and e1Illtt •
vo\ta tertninals ~ sed for controll er (E ) are used for the conduction of curre
ing the IGBT. Its working is ba nt
'fll~ tw;e gate (G) ~s ~s and Collector-E sed on the biasing between
,w1e .tter tefllllil mitter terminals.
£1111 . E
(iate· \\l , G E
Emitter I Gate Emitter

J2
J1

! Collector .
,. i
C

Fig. 2. 2.1 Working of IGBT • t

-
-
I
~, I
. ..:
Uector-emitter is connected to V . .!
- J
•I
cc such that the collector is kept
The co ·tter. The J·unction jl beco at a positive voltage
,hon the mes forward biased and j2 bec
~ . eID l
the re is no voltage at the gate. Due ·2
om~s reverse biased. At
thiS pomt,t will flow between co to rev erse J , the IG BT rem·ain
-
s switched off and
nocurren lle ctor and ~mitter.. • : . , .
, . . . . . , .. , .. .
A ·lying a gate voltage VG posit . . ~- "
ive than the emitter, negative
ri t f:neath the SiO2 layer due charges will accumulate
to capa~itance. _Increasing the
c!ges which eventually form a lay VG incr~ases th~ .number of
er when the VG ex~e_eds ~e thr
P-region. This layer form N-channe eshold _vo~tage/ in the upper
l that s~orts N~ ~nft re~10n.an~
N +. r~g1on. .
The electrons from the er itt er flo
w from N + region into 'N- dri
_ ., .
from the collector are injected fro ft region. While· the holes
m the P + region into the N- dri
both electrons and holes in the ft reg ion. Due to the exce·ss of
drift region, its conductivity inc
of current. Hence the IGBT sw rease and starts the conduction
itches ON.
• -::· ,,J ( 'J ~ • ; •
l ,: . , l
2.7.2 V-1 Characteristics of ..; I

IGBT
#
Unlike BJT , IGBT is a voltage-co ~ '1 ..
I~ • • •, •
-~

ntrolled device that requires on

:. • •.,

to control the collector curre ly a small voltage at its gate

nt. However, the gate-emitter
than the threshold voltage . voltage VGE neeas to. be greate
r
cou!ransfer characteristics of the IG
off. : current l e: ~e
BT ~how the 'r~latio,n ~f inpu~
n th~ VGE _is . :v~l~g~· V!31! \ ~:
en the VGE 1s slightly mcreased 0v, there is no I~ an~ the dev1c~ re ~~ s~1tc~ed,
~;~u~.
but remains below threshold vo
lta
4
ge,..,VGET ' t4e device
'•• I ...
~ _,. 1
_., • ••
 g
118 Electrical and Electronics Engineerin
the v exc eed s the threshold .
. . i~E a unidirectional de . hrnit,
is a leakage cur ren t. Wbe:"
•t
rem ain s sw itc hed off bu t the re dev ice switches ON . sw ce
1 viee, the
the
the le sta rts to inc rea se and
ion.
cu rre nt on ly flows in on e direct Loc:t1Sof
,-....off vonao•
p,oc

of,mk; I AdJ VeR eglo n

le R~f.....----➔.
le - ·1·- - - - - 1
VOE S

VGE 3
VGE2
VGE1
Vee CE
Cuto tf AOQlon ~

VGE
+VGElll

s of JG BT
. 2 22 1-V Ch ara cte ris tic an d collector-emitter
lec tor cu rre.nt IC
F,g . · 1 tion between th e col . de and the
ws the re a V < VGET the JGBT 1s JD cu tof f mo . With
en graph sho f v At mo de ' wh ere the IC mc•reases
The giv l l O GE" GE . to acti·ve .
v at different ev es
Voltage cE v 'fi the IGBhTVgoeswhJD
ere V < VGE2 < VGE3' the IC is different.
I = 0 at any VcE· At VGE > GET GE GEI ard
c . . VCE Fu rth erm ore , or eac d th eve rse bre ak do wn lim it. So do es the forw
an mcrease ID . lle d cu rre nt starts pas sing
e rev ers e vol tag e s~? uld no t ~xce~ ;d :w n lim it, un con tro .· .
Th tiv e re
rr res pec
voltage. If they exceed ~e
through it. :
.
ts. He re are som e of the
· Ap pli ca tio ns of IGBT . • ed in AC as we ll as DC cir cui . , .
l ns us
IGBTs have numerous app icat10 ~
tio ns of IG BT · to sensitive
important applica
PS (Sw itch ed Mo de Po we r Su pp ly) to sup ply po we r
· • It is used ·in SM
me dic al equipment and com
pu ter s.
tible Po we r Su pp ly) sys tem . J •
• Jt is used in UP S (Uninterrup
ntr ol.
• It is ~sed in AC and DC
mo tor dri ves off eri ng spe ed co
.
is used in cho pp er and inv ert ers .
)

·• It
• It is used in sol ar inverters.
TERS
2.8 TYPES OF POWER CONVER

2.8.1 AC to DC Converters
cir cui t cha ng es app lie d ac inp ut vo lta ge int o a fixed de
er
1A-Diode Rectifiers: Th is rectifi ac sig nal is ap pli ed at the inp ut. Th ese are
mainly
or thr ee- ph ase alo ng with in
voltage. Either a single-ph ase em ica l pro ces ses lik e ele ctr op lat ing
cti on and in ele ctr och vices.
used in electric tra
ply . Th ese are als o use d in we ldi ng an d UP S rel ate d ser
battery charging and po we r sup
 Electronic Devices and Digital Sys
tems .119
5econtrolled Rectifie
1s-PhB to convert a fixed valrs: Unlike diode ·-recffi
ue of ac
designed perates the rectifier hence
O
voltage 5 Similar to diode rectifi
these are so m et ! m:
signal Volta r. erS, pha~-controll

ers here also the a es . down_ as

ed rectifiers are
a vanab_le de voltage. Here line
converterbase· ac sig
. .
nal. 1ts maJor .'
applic PP11e ae signallmcane commutated ac· to de
ation s are in de be •
tbree-P gical and chemical indust
ries as we ll as
dri H a smg1e-phase or
111etallUf
in ex.citaf veS, VDC systems, compensat
DC to DC Converters ion sy stems for synchronous machiors,
2.s.2 nes.
rters that co ert the de signal of
'fbe ~~nve t the outputnv are also known as cho fixed fr
de s1~~ a nt amplitude than the sou e equency prese~t at the input int · ·
rce volta PP ~- Here the achieved o a varia ble
bave. d1uere .
tors are the serruc .
onductor devices usedge. enerally, power transiou tput de voltage may
stors MOSFETs and
tbyns power signal that controls the for their fabricaf Th •.
a10w se semiconductor devices fr1on. •
-:7~:---
e ou tput l~ controlled by
Fixed DC ,., . om a control umt. ·
signal as
input
-•M Variable
;:, -. . DC signal
uoutput
2.s.3 DC to AC Converters
The devices th~t are designed to co '
. .
nvert the de signal into ac signal
applied input 1s a fixed de voltage are known as inverters. The
that can be obtained from batterie
·s variable ac voltage. The voltage s but the output obtained
and frequency of the signal obtai
~ere the semico~ductor device i.e ned are of variable nature.
., the thyristor is turned off by\.i~
forced commutation. ing either line; load, or
Inverters mainly find application
s in induction motor and synchr
with UPS, aircraft, and spac~ po onous ~otor drive~ along
~er supplies. In high voltage de tra
heating supplies as well as low po nsmission system, induction
wer systems of in~bile nature lik
in photography camera to very e flashlight discharge system
high p9w~r ~dust!ial ~ystem. .
_ . ..
2.8.4 . AC to AC Converte
rs
An ac to ac converter is designe
output voltage. d to change the ac signal of fixed
· frequency into a variable ac
· · ·
AC
signal AC
as input sig nal as
output
,
Cycloconverters: A cycloconvert
er is a device used for chang~g
single frequency into an ac outpu ,ac supply of fixed voltage and
t voltage of variable voltage as
However, here the obtained varia w~ll as different frequency.
ble ac signal frequency is low
applied ac input signal. It adop er than the frequency of the
ts single-stage conversion. Ge
mostly used in cycloconverters nerally, line, commutation is
however ,forced or l~ad ,commu
used in various applications. tat~d ,~ycloconverte~s ~e also
' · · · ' ·. .·. ·
These mainly find applications in ·
slow-speed large AC traction dri
multi MW ac motor drives, etc. ves such as a rotary kiln,
 <

120 Electrical and Electro

nics Engineering J
'· Th
ge Controllers (A C voltage reyulators,. lta e co. nv en ers d esigned to
the same fren.. Change
Vol
A C .e ta le ac vo
vo lta ge in to a va ri ab
,1.
d · f fixed g~ S ig ~ of ~
ap pl1 ac signal o io n of th es e controllers , tw o thyn st or s m an antip . ane1
ar
-'t -.C Qc "
J as lba,
er at
o f in pu t. F or th e op . . us ed fo r turning of f bo th th d . . gern...._'
ed L
.
m e co m m ut at 10 n 1s de la y e ev ic es. It offers the coclrOfran
ro lJin-....111
ar e us . th e fir in g an gl e
by ch an gi ng · g 0r
th e ou tp ut vo lta ge e in Ii ht in
co nt ro lle rs ar .
m aj or ap pl ic at io ns of ac vo lta ge w el l. g g control, electro Oic tap
T he an d pu m ps as
nt ro l o f la rg e fans
ch an ge rs , speed co
ION
.2 .9 COMMUTAT Th er e ar e tw0
.
tu rn in g of f a co nd uc tin g th yr is to r. . ID et lJ ~ f0r
e pr oc es s of ut at io n. , ,
C om m ut at io n is th n an d fo rc ed co m m
na tu ra l co m m ut at io
co m m ut at io n vi z. ,
mutation
2. 9. 1 Natural Com m m ut at io n vo lta
ur c .
ge is th e supply so e Itself If tJie
n, th e so ur ce o f co d of the po si.tiv · e ha lf cy cl e, the anode~
In na tu ra l commutatio at ev er y en ~ent
R is co nn ec te d to an A C su pp ly , tu re o f th e A C Su pply) . A s the cu rrentm,-,._
SC ating na . ap p1·1ed .un m ed ia te ly aero th '(IC
ro (d ue to th e altern
naturally be co m es ze e vo 1ta ge 1s ss e S(R
es th ro ug h th e na tu ral ze ro , a re ve rs rn O F F th e SC R : -
circuit go itions tu
ga tiv e ha lf cycle) . Th es e cond C t·
(d ue to th e ne
d as . S o~ ce C ?m m ut at io n or A
calle m lDe
m m ut at io n. is als~ ssible w it h line com
Th is m et ho d of co om m ut at w n. Th is co m m ut at io n is po
io n or C lass F C vo lta ge re gu la to rs because the ~fated
Commut at er te rs an d A C pPly
er s, co nt ro lle d re ct iii er s, cy cl o co nv · .
in ve rt . · ·
th e A C so ur ce in all th es e co nv er te rs
is
mutation,
2 . 9 .2 fo rc ed Com SC R . In such circuits
'
•
to tu rn O F F th e
ui ts ,
I

th er e is no natural
cu rr en t ze ro
w n as C om m ut at in g Ci
rcuit)
In ca se of D C ci rc al ci rc ui t (k no
be fo rc ed to ze ro w
it h an ex te rn
us t
fo rw ar d cu rr en t m
ce th e na m e, Fo rc ed C om m ut at io n.
R . H en rs and they are
to co m m ut at e th e SC nt s li ke in du ct or s an d ca pa ci to
po ne rse
is co m m ut at in g ci rcuit consist o f co m g co m po ne nt s ca us e to apply a reve
Th m m ut at in
om m ut at in g C om po ne nt s. T he se co rr en t in th e SC R to ze ro . - - -
·
called C bring the cu
e SC R that im m ed ia te ly ement of
volta ge ac ro ss th
ro cu rr en t in th e SC R an d th e arrang
di ng on th e pr oc es s fo r ac hi ev in g ze si fi ed in to di ff er en t types. They are:
D ep en ut at io n is cl as
m ut at in g co m po ne nt s, Fo rc ed C om m
the co m e L oa d
Se lf C om m ut at io n by R es on at in g th
Class A - d
C om m ut at io n by R es on at in g th e L oa
Class B - Se lf
n
en ta ry C om m ut at io • l
Class C - C om pl em
' C om m ut at io n
Cl~ss D - Auxiliary
.:: ' Class- E - Puls
e C om m ut at io n
ui ts .
ai nl y us ed in ch op pe r an d in ve rt er ci rc
m
This commutation is
 d D;gifol Sys.ms
121
Electronic Devices an

LATOR
VOLTAGE REGU . a devi.ce or circuit h• h .
. a
z.10 ge re gu
I or JS
at w ic is re sp o~ 1~le for providing t
Jjnear vo lta t vo lta is the mos
ge fo r any changes in inpu tw ge or load condumns . It rs
;. fixed ~ ou ut vo lta
tp
ic de vi ce s. There are mai Y O types of voltage regularo .
nJ
, 0nstaDt ~ o
f el ec tr on
5en
tia l P gulator
es .near voltage re
i1 lator
. Ch·Ing voltage regu
5w1t
Regulator
,.,o. 1
Linear Voltage . JS a re gu la tor de vice that is us ed t
:1
. .
~ ta : th ed ~
.
~ 1fif output
voltage regu la to r volt ag : a~
ns ta nt de sp ite variations in input d by ao ha J_ gh con_ usesTbane
Jtton ..l.f1it. er
A 1iJJeafthat remains
co
M O S FE T ) which is cont ro lle gam am gu.lated
p
or re
vo~tagpeass device .(suc 1
h as B IT
1
.
t as a vo lta ge di vi der to generate the
Is to ac
8
cove
zn an ce o f a lm ea r vo tage regu ator
r[or
vo ltage . e lo ad ) is us ed to regulate the
pe ut (resis tiv
outp
ge r~ gu la to r, a_ linear c?mponent ea r re gi on of its operation
during
lin ea r vo lta gi on or lin
In a
an sIS tor staYs m ~ ~ctive re vo lta ge , th e internal resistance
output voltage . Th~
tr ?utp ut
n
0. .. In or de ~ to ma~tam ~ constant g a transistor which is controUed by
the voltag~ regulat1 able resis ~ c e is provided by usm ca lle d a st ep-down converte
r
_e v an is al so
can be varied.; T~ ck lo_op· A lmear voltage regulator ge
the arnplifler feedba age 1s always less than the input volta
lt
where the output vo
pe s o f L in ea r V o ltage Regulator o f L in ea r Voltage Regulator
s.
Ty nly tw o ty pe s
e co nn ec tion o f load, there are mai
Based on th
They are:
ulator
Series Voltage Reg
ulator
Shunt Voltage Reg
or is
Series Voltage Reg
ulator
tiv e pa ss el em en t such as a transist
or ac is
lta ge re g u la to r, a variable element ta nt ou tp ut vo lta ge across the load
In a series vo he cons ltage
se ri es w it h th e connected load . T t w ith re sp ec t to the load. Series vo
connected in emen unt
ry in g th e re si st an ce o f the series el la to r. It is m or e efficient than a sh
achieved by va m on form o f the volta
ge regu
e re gu lator is shown in
the
e m or e co m cal se ri es vo lt ag
regulator is th rc u it diagram for a typi
to r. T he ci
voltage regula
figure.
1 R2

Unregulated
Power
Supply
t 1
_ _ ._ _ - Con
trol Circuit
~ RI
RL

..=:.. Vref
f
Fig. 2 .2 3
 s Engineering
122 Electrical and Electronic
ug h th e vo lta ge di
w vi
t· der between "" bl lh u
. sure d th ro · Th ..., 'I--11
rltasioo-,ncq
. ci.rcui.t the output voltage 1s mea
I n th 1s V re f. e er s orm
reef gthere ro
Vo IUJ
1
It ge istor. Th e,
. '. compared to the reference vo a trans ad is maintained co ns ge acr0ss
R2. This vo lta ge 1s ch as th e .1,.,e lo . .....l.
t""A
tio n of th e pa ss el em ent su ac ro ss uJ
control the cond uc 1,., e outp ut volta ge
ns •
is to r .
1s va ne. d and hence .uJ
the tra
y (SMPS)
S W IT C H E D M O DE POWER SUPPL con~
2.11
in co rp or at es a sw itc hing regulawtoerr to SU pPly Crt
1 It n_ tro lled de po
that are turned 00 ~
e:·for obta in in g a co
P~ sta nd s fo r sw it~ hed mod~15p o = su:: g sw itc hi ng de vi ce s
SM usin pacitor,
ndy. It m fta e) like ~ uc to rs or ca
electrical power effic1e po wer(;° !s stor ag e co m po ne nt s
e (off-sta te). SU••qI\,-~,,
is us ed to _c on ve rt no n- co nd uc tio n st at _.
output. It chini~sg. dtevu~1ce 1·s m· 1·rs s·
off al te rn at ivel y at
h
hi gh
th
frequ~nJtC
SW rious el ec tro ni c eq ui pment such as co.gipuppterJy '
. e . "d 1 sed in va a stab.le and efficient
power SU .
to supply power w_ en ':'?1vee equ
Y u ip m en t re qu irin g
posses ses hige gh effic iencyheanr dseis ns 1t .
battery char rs , an d ot
P~ ar e as fo l~ ow s.
The major compone
nts that C<?nstitute SM
filter)
rectifier and capacitor
J

"fl an d Fi lte r (D io de
1. Input rect1 er )
transis~or or ~OSF~T
J

nc y s~ itc h (P ow er
2. High-freque · · .· 1 •
3. C ower
0
tra ns fo nn er r)
d Fi lte r (D io de r_ ec titier and capacitor filte
4. Output rectifier
an
or) .
rc ui t (c om pa ra to r an d pulse width modulat
5. Control ci na l bl ock diagram of SM
PS:
represen ts th e func tio
The figure given below
~~
~ rcm;, _ . . -
OUtput_ : .
AC
input
Rec:tffle'un. d
.· Riter
F re q ~
.Switc:h
Tr.u.morrn.e;
,
Rectffl.-lnd
Riter'
r: ,;'
DC

M· Jl.J1JL
,W M
....._....,~ ,,, .-- :,, --,
Control
' , Clrait .
u ~ t• .

, ,·.
1. ,!
,
Suppl,:
ck
.
diag ra "' : o f Sw itch Mode Power
Fig. 2 .2 4 Blo pr ov ided to the input rect
ifier
th e so ur ce is
d ac input signal from a de signal and furth
er
Initially, the unr~gulate l is re ctified to ge ne ra te
in
e the ac input signa T he de output (still
and filter circuit. Her ise com po ne nt fr om it.
e high-frequency no quency switch. Here
smoothened to remov or ·that ac ts as a hi gh -fre
la te d form ) is fe d to the power transist rc uit ac ts as an id ea l switch i.e., when
unre gu
opping (switching). Th
is ci it with negligible
sig na l un de rg oe s ch rr en t pa ss es th ro ug h
the de e, cu
w er tra ns ist or (cho pp er circuit) is in on stat al o f th e tr an sistor . However, under
the po term in
dr op , an d de sig na l is obtained at the output h it an d le ad ing to cause maximal
voltage sses thro ug
te of th e po w er tra nsistor, no current pa pr es en t. Hence, according to
theltaofgf d sta 'th in · Th side, no volta ge w ill be
vo 1t. . us, at the output output side. The
~ r? p w i . ltage w ill be ob ta in ed at its
81
n of th eapower·a1tran1sist· or de· vo• • vel.
e ':llch in g
th oppmg frequency pl
ch
ac uo ay s
m m am ta1r un g th e desired de voltage le
cruc1 ro e
 Electr · "- ·
on1c uwices and Digital Systems 123
btained de signal at the output of the chopper . . .
v,e ~f the high-fr~ency power transformer. Here th:~ 11 Is lhen fed lo the Primary
.,iJUl,ng (rage signal 1010 a low voltage level Which is furtJ, oP-<i?Wn lransfonner convens
we high vod filler unit. This simply filters our the unwanted er P;OV•ded as input to the output
rectifi•'.:. a regulated de signal as ~e output. The control ~~~u~• from the signa1 in order
to pro•~ circuit for the complete unu. Tbis involves a compara1o( J:=~ here acis as_ the
[eedb•C (PWM). The de output from the rectifier and filter is~ d ng WJth a pulse width
111odulator,implifier which acts as a comparator, compares th e bto_ the COntrol Circuit where
refere nee va ue.
t1te error! e o tamed de voltage with the
.
the de output is greater than the reference value then the b . .
If ed. The decrease in chopping frequency will reduce the ~~mg frequency IS lo he
decreas oltage. However, if the de output is less than the referen utlpower and so the de
output vcy is increased. Whenchoppmg . frequency is raised then thecedva ue then the chopping

jJ}creasecy· pulse width ~

r,,quen d The pulse width modulator in the above circuit is respotis'bcl o~tput volta~e will get
• moduIated wave,onn whose duty cycle controls1 the ,orbgeneratmg
. a fixed
freque~y the duty ratio is the ratio of on-time to the overall cycle time e(teoppmg frequff)~cy ·
aas1ca , . d' . . ., on + o tune
by making necessary a iusl!Dents 10 the width of the pulses the ch • fr ·
flenced:iusted hence, regulated de output can be obtained. ' "Ppmg OQuency
getsa, _ _ _
Advantages
1 It is highly efficient than linear power
· between 60% - 95%. supplies. Typically, the efficiency of SMPS lies

2
_ Thus,
Due toisthe · the overan size is sman and less bulky;
high-frequency operation of the device,
compact.
3. It is inexpensive because heat dissipation is less.
4_ The obtained output voltage can be more or less than. .,.
the supply input.
Applications of SMPS

The devices invented under the latest technologies require a highly ··- supply
. ·--.power
. . efficient
,.,

which is offered by SMPS. Thus, it finds applications in various power amplifiers, persona)
computers, security and railway systems, television ~ : motor ·drives, etc. ,

-
2.12 REALIZE THE LOGIC EXPRESSION USING BASIC LOGIC GATES ·
2.12.1 Logic Gates

Alogic gate is a device that act as a building block for digital circuits. They perform basic
logical function that as fundamental to digital circuits. · ' · . ·'
,

, .
124 Electrical and Electronia Engineering

Name Graphic symbol Algebraic runction Truth labJ

x~

AND F =x•y I 0
1 0 0
1
-- -- -- -- -- -- -- -- -- -- --I I

OR ;=f)---F F=x +y 0
1
I
0 I
1 1 I
X

Inverter x----{>o--- F F=x ' 0 1

' 1 0

Buffer x-- {> --F F=x 2

'

X . * y F

NAND x=[J--
y
. F F =. (xy)'
0 .0
0 I
1 0
I
I
I
1 I. 0

X y F
0 0 I
NOR ;~ F F= (x+y)' 0
1
1
0
0
0
1 1 0

X y F
0 0 0
Exclusive-OR
(XOR) := [) -F F=xy ' +x'y
= xEB y
0
1
I'
0
1
I
1 1 0
 Electronic Devices and Digi,al Systems 125

X y F
£xclusive-NOR X 0 0 I
F F=xy+.t'y'
or y = (x EB y)' 0 1 0
•valence
eqUI I 0 0
1 1 I

oMBINATIONAL LOGIC DESIGN

2,13 C
for realization of logic expression using logic gates
f;xaIIlPles
ainple 1
Ei-ABC+ A B C ' + A' B C '
~
F 1 •cal expression can be designed by the combinatiion of NOT gate, NAO gate and OR
flus : : combinational logic diagram is shown in Fig.2.25
gate.
ABC
ABC

ABC'
>---F

F= ABC +ABC'+ A' BC'

A'BC'

Fig. 2.25
Example 2
F = (A+ B +C) ( A'+ B'+C) + (A+B'+C) .
This logical expression can be designed by the combinatiion of NOT gate, NAD gate and OR
gate. the combinational logic diagram is shown in Fig.2.26
 ia Engin eering
126 Electrical and Electron

A B C
(A ♦ 8 ♦ CJ

(A +B' +CJ

Fig. 2. 26
..
)F
FO RM (S O P) A N D PRODUCT OF SUM (POS ORAi
CT
2. 14 SUM OF PRODU
rally expressed in terms
of logical .
sion) are ge ne les
value, either oor 1 ontfb
lean expres
, Logical functions (Boo va riable can ha ve the y
s. (Each input - -
(inputs) as following form 'D
OP], Ex: A B '+ BC+C
SUM OF PRODUCTS [S
SU M S [POS ]. Ex: (A'+B') (B'+C) (C'+D)
PRODUCT OF . ~

axterm
2.14.1 Minterm and M /1
·' or
Minterm iemented
all the inp ~ts of the functions in either , coinp
ing
A pro'duct term contain T E ~S .__ - __ _ .
lled M IN
uncomplemented form is ca c~mbinations
It has 2 - all possible'
3

Let us consider 3 varia

ble (inpu t) fu
ss
nc tio
ible
n.
co
'
m binations]. Let inpu~ are A, B, the c
nction has 2n al l po
[A 'n' variable (input) fu · ' ·
and output is Y.
,
Example: I OUTPUT I
I I INPUTS - ,y
·, I
C MINTERMS i I
I A I B 0 I
0 0 , A'B'C r ,, 1-, '·•·
' .0 ;
i 0
A'B'C .. o·· -
.1
1 0 0
A'BC' 1 I
2 0 1 0
A'BC 1
3 0 1 1
AB'C' 1
4 1 0 0
AB'C 0
5 1 0 1
ABC' 1
6 1 1 0
ABC 0
7 1 1 1 I
I
 Electronic Devices and
Oigilal Syitems
171
•
Jo minterms, 0 ar e as
si gn ed w ith ba r lette
r an d 1
• Within the ro w , all
ar e multiplied (Produ are ass1.gJM:d with
ct) nba I
Choose only th e ou tp u r ct te r.
• . ut 1. A dd th e m in tc
' nn s w h' h h .
In mis ex am pl e, w e ic avmg 1 output.
• called canonical SO ge t Y = A B C ' + A 'B
P fo rm . [Standard SO C + A , ,
P fonn] 8 C + A B
Each input is assign C '. This expression
ed w is
• output Y = 1 is ch os ith it equivalent d •
en , it co rr es po nd in g
in eci? 1 ue . In
. . pu t s'adecv~
tmal valuth e truth
es are stattaedblas
e, only the
below.
Y = l: m (2, 3, 4, 6)
t,fa~erms
A s~ terll l co aining all th e in
alled nt
M A X T E R M S. Lpu ts of the functio ·
form is c et us co ns 'd th ns m et•ther
com plem
• er e same truth table. ented or w:icomplemented
f:J'aIIlPle: .

IN PU T S
A B OUTPUT
C MAXTERMS
0 0 0 y
0 (A + B + C )
1 0 0 0
1 (A + B + C ')
2 0 1 0 (A + B ' + C)
.o .. 1,
3 0 1· 1
1. (A + B ' + C!)
4 1 0 1
0 (A '+ B + C) .
5 1 . o· - 1 . (A ' + · B + C ')
1
6
'. 0 11
,
.t 1 •
1 1 0 (A ' + B ' + C) ',
7 1 1
1 1 (A ' + B ' + C ')
• In maxterms, 1 ar e 0
assigned w ith ba r le
• O are assigned w ith tter and
un ba r le tte r: . . . . . ' ... ' .
. ,, .
• Within th e ro w , - •. I " W• •

~11 ar e summed ·(Add

ed)
• Choose only th e '.
ou tp ut 0, Pr od uc t th
e m ax t~ ~s which ha
• In this exampie, ving O output.
w e ge t Y · (A + B + 0

expression is called C ) (A + B + C ') (A '+ B

• ,
• . Each input is as
canonical PO S form
• _ •
. [SI
ta nd ar
..
d PO S fo
'

rm
+ C-') (A
]~
- ) .
'+ B '+ C- ') .' T hi s
signed with it equiva '; ~ o'.
~ 1J
,.,.
~• (
output Y = 0 is chos lent decimal value. _
f •

en, it corresponding In the truth table, only

in pu t's decimal valu th e
es ar~ stat~d as_below
Y-:- TIM (0, 1, 5, 7) .. ·
Note: Minterms and M ,- 1 • J
ax te rm s ar e complem # ':. ,f :

ent with each other.

r·,

J •
f? 128 Electrical and Electro
nics Engin eering

SQJ>
given below, ob tain the (i) canomca1
Boolean func tio n lol'IIJOsj
· Example 1. Fo r the C )= A +B 'C
,
Y( A, B,
canonical PO S form.
Y(A,B,C) = A + B 'C
= AXX+ XB 'C 'C
'+ AB 'C + AB C '+ AB C + A' B' C + AB
= AB 'C
m; Since A + A = A J .
[Remove the common ter
)
1.
C '+ A B C +A 'B 'C (canonical SO P form
B
¥= A B 'C '+ A B 'C + A
110 111 001
100 101
m6 ~ m1)
(m4 ms •
y = Em (1, 4, 5, 6, 7) . . ~
)

Max.terms are complement with each other)

y = IIM (0, 2, 3) (M
interms and

Mo M2 M3
000 010 011 rm) - !i
+ B' + C ) (A + B '+ C ') (Canonical ~ S fo
Y= (A + B+ C ) (A !

ONs /
I

R EP R ES EN TA TI O N Of. LOGIC~L '"NCTI

AP (K-MAP)
2.15 KARNAUGH M
I
-

pression with lDininnnn ,

In many digital circuits
-

and practical problem

I
•

ns
s, w
of
e
2,
ne ed
3,
to find ex
or 4 variables very easil s Sum f
y using the 1
1

ize Boolea n ex p~es sio two form

variables. We can minim Boolean algebra theorems. The K-map can take .
0
us in g an y the pr ob lem
K map without Su m (POS) according to
the needs of
) and Pr od uc t of .
r
Product (SOP . .

- ·· - I I
us in g th e K -m ap
Steps to solve expression /
·

ct K -m ap acco rding to the number of variables.

1. Sele 1
term s or m ax term s as given in the problem.
2. Identify m in
resp ec tive to th e m interms (O's elsewhere).
K-map
3. For SOP put 1's in blocks of
•
•

elsewbe~e).
I

,/ 4. For POS put O's in bli ocks of K -m ap re sp

ta l
ec
te
tiv
rm
e
s
to
in
the maxterms (1· 's.
po w er of two
~ '
lik e i: 4
· ,8 (e~ce
-
pt 1)
ng to
e 5. Make rectangular groups containi you can in one group.
elements as
1/ and try to cover as many
d sum them up fo! SOP for
m.
d th e pr od uc t te rm s an
!/ 6. from the groups made in step 5 fln I ,

es ·
2.15.1 · Grouping Rul ing
s for the simpliflcation of expressions by group
The Karna~gh map llsuses the following rule , .
ntaining ones
together adJacent ce co
1. No zeros allowed.
2. No diagonals.
ber of cells in each group.
3. Only power of 2 num
 UNOTt
Groups should be as large as Possible.
4, ryone must be in at least one gro
Eve up.
s. overlapping allowed.
6
· Wra p around is allowed. .
7
s.· Get the fewest number of groups Possible.

~ l: 111(0,2,3)
~oolean expression by Using I<-Map F(A
5;,nphfi' II B ,B)
0 1
ii 01
f
0
~ 0
A 2
3
1 !
i l
·t7
FCA,B):: j +,
1

SinlPlI.fy the Boolean expression by using K-Map

F(A, B) = Im (2, 0, 3)
j B
0 1 '···
A. -0 1 ;
0
I 1 l I
A 2 3
1 0 0

..
Simplify the Boolean expression by using K-Map ·
; •. , I i, ' l,

F=AB+AB
Solution: . ,
Number of input variables are 2
Hence the number of squares = 2° = 22 = 4
 130 Electrical and Electroni~ Engineering

Ii B
0 1
0 J
A
0 I J I 1
2 J
A
1 0 0
i
F=A

Exam le~
Simplify the B<,>0Iean expression by using K-M
ap

F (A, B) = Thi (0, 3)

. Solution:
Number of input variables are 2
Hence the number of squares = 2° = 22 = 4
B B
0 1
1
A
a 0
A l

0
2

1 0

F(A,B) = L m(O, 3) =Al + AB

'
Example 5
-
Simplify the Boolean expression by using K-Map
F (A, B, C) = A B C + A BC + ABC
Solution:
Number of input variables are 3
.1
Hence the number of squares = 2° = 23 = 8
BC BC . BC Bl . i
00 01 11 10
1 3 l
1 0

0 -11 0 (1 /I]
..
'
~

5 7
A
1 0 0 0 0

F(A,B,C) = AC+AB
 El8N,..._,'
-"'Qf\1c •

Or'clDigilQILL
-,~ 131
9oolean expression by using K-Map
11ft ~111(0,3,7,6)
siJ1ll' 0, C)~t.,
f(~• 0
1~t1, 11: ·oput variables are 3
,oNl)llli,er of I er of squares = 20 == 23 == 8
I (be
purob

I'ff" Iii:
oo lie
01
Be
11
Bl
A rco;-r---i1t---:3~~-
10
o QJ O O2
A 4
s
1
0 0

P(A, B, C) :: ~Dl' + BC+ AB ,

~oolean th expression by using K-Map

i
silJllllify e B) - A CD + A BCD + ABCD
B + ABcn
f(~, ' C,D - , . .. . -
1ution:
~ ~rofm'put variables are 4_· •. __
Nl)III the number of squares = 20 = 24 == 16
gence "CD "CD CD CD .
00 01' - 11 10
AB 1 3
00 .
0 0
AB 4 5 7
01

AB
0
12
0
13
CD 0 F(~ B,C,D)::: iij +ABCD +ABCD
1S , 14
11

AB
0 0 0 0
9 11
10
0 0
/
 132 Electrical and Ele ctro nia Engineering

Ex.1rn le a
g K-M ap
Sim plif y the Boo lea n exp res sio n by usin
14, 15, 8, 10)
F (A, B, C, D) = !:m (0, 2, 4, 6, 12,
Sol utio n:
Nu mb er of inp ut var iab les are 4
2' = 16
He nce the num ber of squ are s = 2n =
lD lo CD CD
00 01 11 10
1 3 2
A1l 0 )

00 I 0 0 I
AB 4 s 7 6

01 t 0 0 1 - F(A ,B, C,D ) = D + ABC

u 13 1or; 14
AB
11 t 0 I• i l -
8 9 11 10
AIi
1o ' 1 0 0 t

Ex am ple 9 ) '

c gates
the foll ow ing Boo lean exp ~es sion usin g K-M ap and implement .it using logi
Sim plfy
5, 7, 8, 9, 10, 12, 13)
· Y (A, B, C, D) = !:m (0, 1, 2, 4,
· ca, c·o · c·o CD co · _ ·"
.AB
0 01 11 10
]. 0 ..
A'B ' 0 0 0

. 0 .
...
]. ]. ].
A'.B 01
AB 11 ]. .,. ]. ... 0 ... 0

AB ' 10 1
•
0 ... 1 0

Y- C ' +B 'D'- t-A 'BD --

Imp lem ent atio n Usi ng Log ic Ga tes

Y = C' + B'D ' .+ A'B D
A B C D
·1

Y'

Fig . 2.2 7