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com Description

Subsystem Design
I2C Expander Through UART Bridge

1 Description
Figure 1-1 shows how to transfer data or commands from a universal asynchronous receiver-transmitter (UART)
interface to several target I2C controllers using the MSPM0 as an I2C expander. Incoming UART packets are
specifically formatted to facilitate the transition to I2C communication. Figure 1-1 also illustrates how errors can
be communicated back to the host device. Code for this example is found in the MSPM0 SDK.
VCC
I2C Peripheral 1

MSPM0

I2C
I2C Peripheral 2
Host Device (Controller)

VCC

UART UART

I2C
I2C Peripheral 3
(Controller)

I2C Peripheral 4

Figure 1-1. Subsystem Functional Block Diagram

2 Required Peripherals
This application requires a UART and I2C peripherals.
Table 2-1. Required Peripherals
Sub-block Functionality Peripheral Use Notes
UART TX-RX Interface (1 ×) UART Called UART_BRIDGE_INST in code
I2C Controllers (2 ×) I2C Called I2C_BRIDGE_INST and I2C_BRIDGE2_INST in
code

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3 Compatible Devices
Table 3-1 lists the compatible devices with the corresponding EVMs based on the requirements in Table 2-1.
Using other MSPM0 devices and corresponding EVMs is possible if the requirements in Table 2-1 are met.
Table 3-1. Compatible Devices
Compatible Devices EVM
MSPM0Lxxxx LP-MSPM0L1306
MSPM0Gxxxx LP-MSPM0G3507

4 Design Steps
1. Set UART peripheral instance, I2C peripheral instance, and pin out to desired device pins in SysConfig.
2. Set UART baud rate in SysConfig. Default is 9600baud.
3. Set I2C clock speed in SysConfig. Default is 100kHz.
4. Define the maximum I2C packet size the bridge handles.
5. Define key UART header values (optional).
6. Customize error handling (optional).
5 Design Considerations
• Communication Speeds: Increasing speeds increases data throughput and decreases chances of collision.
Adjusting the external pullup resistors according to I2C specifications is necessary to allow for communication
if I2C speeds are increased. Optimizations include higher device operating speeds, multiple transfer buffers,
header size reduction, or state machine simplification.
• UART Header: The UART packer header and start byte are customizable for the application. Texas
Instruments recommends assigning values that are less likely to occur during the start of typical data
transfers.
• Error Handling: Correspond the error values to ASCII numerical values if monitoring UART bus with a
computer terminal. Make sure the host UART device can read error values and know the associated
meanings so appropriate action can be taken by the host. Add additional error types by modifying the
ErrorFlags structure type and add additional error detection code within the Uart_Bridge(). The current
implementation detects limited errors and reports back the corresponding code on the UART interface. The
application code then breaks from the current communication state machine. Users can add additional error
handling code to change the behavior of the bridge when an error occurs. For example, re-sending an I2C
packet after a NACK occurs.

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www.ti.com Software Flow Charts

6 Software Flow Charts

Figure 6-1, Figure 6-2, and Figure 6-3 show the code flow diagrams for Main UART Bridge functionality, Main()
plus UART ISR, and I2C ISR, respectively, for Figure 1-1.

Switch:
Uart_Bridge()
UART Bridge Status

Wai
ng START I2C Write I2C Read TX UART Error

Fill I2C TX FIFO I2C Status = RX Started

RX more bytes than I2C length or TX I2C data received;
False
UART Header? R/W Error? Reset I2C counts;
U.B.Status = Waing
False
True True
Check if lling FIFO True
Set Error ag. covers all data
Disable TX FIFO
Interrupt
U.B.Status = to be wrien
Error Error already TX?
Set I2C Address, I2C Break
True
False Enable TX FIFO
Controller, Length, R/W. False
Interrupt
U.B.Status = START

U.B.Status = Waing;
Clear UART Start
I2C Status = TX Started Detect
Wait for full UART RX. True
Transfer data to I2C buf. I2C Write?
U.B.Status = I2C Write
False
All I2C bytes sent and False False Clear UART RX Data
Break All I2C Bytes Recieved?
I2C Status = Idle?
U.B.Status = True
I2C Read?
I2C Read True
True Break
False
Reset I2C counts; U.B.Status = TX UART
Reset UART controls. U.B.Status = Wai ng
Clear I2C R/W
Break

Figure 6-1. Software Flow Diagram for UART_Bridge()

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True Send error over UART;

MAIN() Error detected?
Reset error
ag

False

Sleep Uart_Bridge()

UART ISR:
RX Interrupt

False
UART Start byte
detected?

True

Set UART
Fill UART Receive buer. True
UART Bu er overow? overow error
gUartStartDetected =true
ag

False

Exit

Figure 6-2. Software Flow Diagrams for MAIN Loop and UART ISR

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www.ti.com Required UART Packet

I2C ISR: TX FIFO Trigger I2C Status = Fill FIFO to

Switch source INT TX_IN_PROGRESS gI2C_Length

TX DONE Disable TX_FIFO Interrupt;

INT I2C Status = TX_COMPLETE

RX FIFO Trigger I2C Status = Fill data bu er to Check for bu
er True Set I2C overrun
INT RX_IN_PROGRESS gI2C_Length overrun error ag

False

RX DONE I2C Status =

INT RX_COMPLETE

I2C Status = ERROR;

I2C NACK Break;
Set I2C NACK error
INT Exit
ag

Figure 6-3. Software Flow Diagram for I2C ISR

7 Required UART Packet

Figure 7-1 shows the required UART packet for proper bridging to the I2C interface. The values shown are the
default header values defined within Figure 1-1.
• Start Byte: The value used by the bridge to indicate a new transaction is starting. UART transmissions are
ignored until this value is acknowledged by the bridge.
• I2C Address: The address of the I2C target the host communicates with.
• I2C Read or Write Indicator: The value that functions the bridge to read or write from the target I2C device.
• Message Length N: The length of data transferred in bytes. This value cannot be larger than the defined I2C
maximum packet length.
• Bridge Index: The I2C controller that the host communicates on.
• D0, D1...., Dn: The data transferred within the bridge.

I2C Write Start Byte I2C W Byte Length Byte

Address Byte I2C Controller D0 D1…. DN
Packet (0xF8) (0xFB) N

UART Header Data

I2C Read Start Byte I2C R Byte Length Byte

Address Byte I2C Controller
Packet (0xF8) (0xFA) N

Figure 7-1. UART Bridge Packet Description

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Device Configuration www.ti.com

8 Device Configuration
This application makes use of TI System Configuration Tool (SysConfig) graphical interface to generate the
configuration code for the COMP and two TIMER modules. Using a graphical interface to configure the device
peripherals streamlines the application prototyping process.
9 Application Code
To change the specific values used by the UART packet or the maximum I2C packet size, modify the following
#defines in the beginning of the code example, as demonstrated in the following code block:

/* Define UART Header and Start Byte*/

#define UART_HEADER_LENGTH 0x04
#define UART_START_BYTE 0xF8
#define UART_READ_I2C_BYTE 0xFA
#define UART_WRITE_I2C_BYTE 0xFB
#define ADDRESS_INDEX 0x00
#define RW_INDEX 0x01
#define LENGTH_INDEX 0x02
#define BRIDGE_INDEX 0x03

/*Define max packet sizes*/

#define I2C_MAX_PACKET_SIZE 16
#define UART_MAX_PACKET_SIZE (I2C_MAX_PACKET_SIZE + UART_HEADER_LENGTH)

10 Additional Resources
• Texas Instruments, I2C Expander Sub-System Code
• Texas Instruments, Download the MSPM0 SDK
• Texas Instruments, Learn more about SysConfig
• Texas Instruments, MSPM0L LaunchPad™
• Texas Instruments, MSPM0G LaunchPad™
• Texas Instruments, MSPM0 UART Academy
• Texas Instruments, MSPM0 I2C Academy

11 E2E
See TI's E2E™ support forums to view discussions and post new threads to get technical support for utilizing
MSPM0 devices in designs.
12 Trademarks
LaunchPad™ and E2E™ are trademarks of Texas Instruments.
All trademarks are the property of their respective owners.

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