Interrupt Vector Table
Interrupt Vector Table
Definition
• An interrupt vector table (IVT) is a data structure that associates a list
of interrupt handlers with a list of interrupt requests in a table of
interrupt vectors(vector means memory address). Each entry of the
interrupt vector table, called an interrupt vector, is the address of an
interrupt handler (also known as ISR). While the concept is common
across processor architectures, IVTs may be implemented in
architecture-specific fashions.
Cont..
• Interrupt Vector Table consists of 256 entries each contains 4 bytes
• Each interrupt vector consists of:
• Offset (16-bit): Lower 2 bytes store the offset address of the ISR.
• Segment (16-bit): Higher 2 bytes store the segment address of the ISR.
• Table starts at the memory address 00000H
• First 32 vectors are spared for various microprocessor operations.
• The rest 224 vectors are used definable.
• The lower the vector number, the higher the priority.
IVT is a structured list containing the addresses of Interrupt Service Routine (ISR) for various
interrupts. It is also known as Interrupt Pointer Table (IPT).
Physical Address = Code Segment and Instruction Pointer = CS X 10H + IP = 20 bits in size.
256 interrupts = 256 X 4 = 1024 bytes = 1KB is located in the starting part of memory.
IP is stored at this address. This is not the value of the IP, it is the value at which the IP of
the ISR will be located.
IP is stored at this address. This is not the value of the IP, it is the value at which the IP of
the ISR will be located.