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Interrupt Vector Table

The Interrupt Vector Table (IVT) is a data structure that maps interrupt requests to their corresponding interrupt service routines (ISRs), consisting of 256 entries, each 4 bytes in size. The first 32 entries are reserved for microprocessor operations, while the remaining 224 are user-definable, with lower vector numbers indicating higher priority. The document also details the physical address calculations for ISRs and provides examples of setting up and triggering custom interrupts in 8086 assembly language.

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0% found this document useful (0 votes)
3 views24 pages

Interrupt Vector Table

The Interrupt Vector Table (IVT) is a data structure that maps interrupt requests to their corresponding interrupt service routines (ISRs), consisting of 256 entries, each 4 bytes in size. The first 32 entries are reserved for microprocessor operations, while the remaining 224 are user-definable, with lower vector numbers indicating higher priority. The document also details the physical address calculations for ISRs and provides examples of setting up and triggering custom interrupts in 8086 assembly language.

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bhasutkarmahesh
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Interrupt Vector Table

Definition
• An interrupt vector table (IVT) is a data structure that associates a list
of interrupt handlers with a list of interrupt requests in a table of
interrupt vectors(vector means memory address). Each entry of the
interrupt vector table, called an interrupt vector, is the address of an
interrupt handler (also known as ISR). While the concept is common
across processor architectures, IVTs may be implemented in
architecture-specific fashions.
Cont..
• Interrupt Vector Table consists of 256 entries each contains 4 bytes
• Each interrupt vector consists of:
• Offset (16-bit): Lower 2 bytes store the offset address of the ISR.
• Segment (16-bit): Higher 2 bytes store the segment address of the ISR.
• Table starts at the memory address 00000H
• First 32 vectors are spared for various microprocessor operations.
• The rest 224 vectors are used definable.
• The lower the vector number, the higher the priority.
IVT is a structured list containing the addresses of Interrupt Service Routine (ISR) for various
interrupts. It is also known as Interrupt Pointer Table (IPT).

INT N, N = Type Number = 0 to 255  256 Software Interrupts

IVT should have the addresses of ISR for 256 interrupts.

Physical Address = Code Segment and Instruction Pointer = CS X 10H + IP = 20 bits in size.

CS = 2 bytes and IP = 2 bytes.

So there is unique 256 interrupts ISR addresses.

256 interrupts = 256 X 4 = 1024 bytes = 1KB is located in the starting part of memory.

Address range will be CS : IP = 0000 : 0000 to 0000 : 03FFH


Interrupt Vector Table (IVT)
CS : IP Physical Address Memory
0000 : 0000 00000 1 byte size
0000 : 0001 00001 1 byte size
0000 : 0002 00002 1 byte size
0000 : 0003 00003 1 byte size
0000 : 0004 00004 1 byte size
0000 : 0005 00005 1 byte size
0000 : 0006 00006 1 byte size
0000 : 0007 00007 1 byte size
0000 : 0008 00008 1 byte size
0000 : 0009 00009 1 byte size
0000 : 000A 0000A 1 byte size
Interrupt Vector Table (IVT)
CS : IP Physical Address Memory
……… ……… ………
0000 : 03F6 003F6 1 byte size
0000 : 03F7 003F7 1 byte size
0000 : 03F8 003F8 1 byte size
0000 : 03F9 003F9 1 byte size
0000 : 03FA 003FA 1 byte size
0000 : 03FB 003FB 1 byte size
0000 : 03FC 003FC 1 byte size
0000 : 03FD 003FD 1 byte size
0000 : 03FE 003FE 1 byte size
0000 : 03FF 003FF 1 byte size
For any interrupt to be pointed to an ISR we need 4 bytes.
Type number = 0 to 255
Type 0 interrupt (Divide by 0)
To execute Type 0 interrupt in needs to go to the specific ISR.
Higher memory address contains higher byte and lower memory address
contains lower byte.
IP for the ISR of Type N = 4N (Where, N is Type number)
CS for the ISR of Type N = 4N+2 (Where, N is Type number)
For Type 1, IP = 4X1 = 00004H and CS = 4X1+2 = 00006H.
CS : IP Physical Address Memory
0000 : 0000 00000 IP (Lower byte) for Type 0
0000 : 0001 00001 IP (Higher byte) for Type 0
0000 : 0002 00002 CS (Lower byte) for Type 0
0000 : 0003 00003 CS (Higher byte) for Type 0
0000 : 0004 00004 IP (Lower byte) for Type 1
0000 : 0005 00005 IP (Higher byte) for Type 1
0000 : 0006 00006 CS (Lower byte) for Type 1
0000 : 0007 00007 CS (Higher byte) for Type 1
0000 : 0008 00008 ………
0000 : 0009 00009 ………
0000 : 000A 0000A ………
CS : IP Physical Address Memory
……… ……… ………
0000 : 03F6 003F6 ………
0000 : 03F7 003F7 ………
0000 : 03F8 003F8 IP (Lower byte) for Type 254
0000 : 03F9 003F9 IP (Higher byte) for Type 254
0000 : 03FA 003FA CS (Lower byte) for Type 254
0000 : 03FB 003FB CS (Higher byte) for Type 254
0000 : 03FC 003FC IP (Lower byte) for Type 255
0000 : 03FD 003FD IP (Higher byte) for Type 255
0000 : 03FE 003FE CS (Lower byte) for Type 255
0000 : 03FF 003FF CS (Higher byte) for Type 255
Example: Determine the physical address of the ISR for the given IVT if Type 0
interrupt is encountered by 8086 microprocessor.
CS : IP Physical Address Memory
0000 : 0000 00000 05H
0000 : 0001 00001 34H
0000 : 0002 00002 00H
0000 : 0003 00003 20H
……… ……… ………
……… ……… ………
……… ……… ………
2000 : 3405 23405 MOV AX, BX (in Hex Code)
2000 : 3406 23406 ………
2000 : 3407 23407 ………
2000 : 3408 23408 ………
Solution:
Type 0, N = 0

IP = 4N = 4X0 = 00000H (Address of the ISR IP)

IP is stored at this address. This is not the value of the IP, it is the value at which the IP of
the ISR will be located.

CS = 4N+2 = 4X0+2 = 00002H (Address of the ISR CS)

IP of the ISR = 3405H

CS of the ISR = 2000H

Physical Address = CSX10H+IP = 2000X10+3405 = 23405H (Answer)


Example: Determine the physical address of the ISR for the given IVT if Type 255 interrupt is encountered
by 8086 microprocessor.

CS : IP Physical Address Memory


0000 : 0000 00000 05H
0000 : 0001 00001 34H
0000 : 0002 00002 00H
0000 : 0003 00003 20H
……… ……… ………
……… ……… ………
……… ……… ………
0000 : 03FC 003FC 22H
0000 : 03FD 003FD 33H
0000 : 03FE 003FE 00H
0000 : 03FF 003FF 40H
Solution:
Type 255, N = 255

IP = 4N = 4X255 = 1020D = 003FCH (Address of the ISR IP)

IP is stored at this address. This is not the value of the IP, it is the value at which the IP of
the ISR will be located.

CS = 4N+2 = 4X0+2 = 1022D = 003FEH (Address of the ISR CS)

IP of the ISR = 3322H

CS of the ISR = 4000H

Physical Address = CSX10H+IP = 3322X10+4000 = 43322H (Answer)


Dedicated Interrupts (5) – Type 0 to Type 4 – They also called as
predefined interrupts.

Reserved Interrupts (27) – Type 5 to Type 31 – Reserved by Intel for


use in its future level of processors.

Available Interrupts (224) – Type 32 to Type 255 – Available to the


user to be used as hardware or software interrupts.

Whether it is an external (h/w) or an internal (s/w) interrupt 


mapped to Type number (N)
The starting addresses of different types of interrupts are – (Range of different categories)

Interrupt Type Starting Address Interrupt Type Starting Address


Type 0 00000H Type 32 00080H
Type 1 00004H Type 33 00084H
Type 2 00008H Type 34 00088H
Type 3 0000CH Type 35 0008CH
Type 4 00010H ……… ………
Type 5 00014H ……… ………
Type 6 00018H ……… ………
……… ……… Type 252 003F0H
Type 29 Type 253 003F4H
Type 30 00078H Type 254 003F8H
Type 31 0007CH Type 255 003FCH
Implementation of IVT in 8086 Assembly
• 1. Writing a Custom ISR

ORG 100H ; Start of program


MY_ISR PROC
PUSH AX
MOV AH, 09H ; DOS function to display a string
LEA DX, MSG ; Load address of message
INT 21H ; Call DOS interrupt
POP AX
IRET ; Return from ISR
MY_ISR ENDP
MSG DB 'Custom Interrupt Triggered!$' ; Message to display
• 2. Setting Up the Interrupt Vector

MOV AX, 0 ; Interrupt number (e.g., 0x60)


MOV ES, AX ; ES points to IVT base address (0000:0000)
MOV WORD PTR ES:[60H * 4], OFFSET MY_ISR ; Store offset at
IVT[60H]
MOV WORD PTR ES:[60H * 4 + 2], SEG MY_ISR ; Store segment at
IVT[60H]
• 3. Triggering the Custom Interrupt

INT 60H ; Call the custom ISR

4. Restoring Original Vector


MOV WORD PTR ES:[60H * 4], OLD_OFFSET ; Restore old offset
MOV WORD PTR ES:[60H * 4 + 2], OLD_SEG ; Restore old segment

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