1. Define computer Organization.

Computer organization refers to the operational structure and functional arrangement of a computer system. It
encompasses the physical and logical design of the computer’s components, their interconnections and how they
work together to execute instructions and process data.
Computer organization deals with the hardware components of a computer system and their
inter-relationships. It is distinct from computer architecture, which focuses on the abstract structure and functionali
from a programmer’s perspective.

2. Explain the purpose and functioning of the instruction "MOV A, M" in the 8085 microprocessor
architecture.

The MOV A,M instruction is used to copy the contents of a memory location pointed to by the HL register pair into
the accumulator (register A)

This function performs -

A. Fetch - Instructions are fetched from the memory.

B. Decode - The control unit decodes the instruction and identifies it as MOV A,M
C. Execute - The contents of the memory location address by the HL register pair are read.

The Data read from the memory is then copied into the accumulator (A).

3. Describe the immediate addressing mode. Give an example instruction and explain how it
operates using immediate addressing mode.

❖ In immediate addressing mode , the operand (data) is directly specified into the instruction itself. This
means that the actual data to be operated upon is part of the instruction rather than being stored in a
memory location or register.

Example- MVI A, 55H

Here, MVI stands for move Immediate, A is the destination register or accumulator in this case. And
55H is the immediate data to be moved into the accumulator.

This is the simple and efficient way to work with constant values directly within instructions,
reducing the need of additional memory access and simplifying the instruction set for certain operations.
4. Describe the memory hierarchy.

5. Describe a clock cycle in computer architecture.

❖ A clock cycle, also known as a machine cycle or a clock tick, is the basic unit of time in a computer's
central processing unit (CPU). It represents one complete operation of the CPU, including fetching,
decoding, executing, and storing data.

❖ Clock is a digital signal that goes Low to High then Low then High and Continue. This phenomenon is
called clock pulse. Within this clock pulse there occurs Edge Triggering(Positive & Negative Edge
Triggering) and Level Triggering(High Level & Low Level Triggering). The Time period of a clock is the
combination of leading(1) and falling Edges(0).

The frequency = 1/Time Period, that controls the speed of signals.

6. Describe the difference between RAM and ROM.

RAM ROM

RAM stands for Random Access Memory ROM stands for Read Only Memory

RAM is Volatile in nature ROM is not volatile

RAM is much expensive than ROM ROM is less expensive than RAM

RAM is very faster as comparison Not faster than RAM

7. State the purpose of a bus in a computer system.

A bus in a computer system is a communication pathway that transfers data, addresses, control signals
and power between different components of the Computer.

Purpose of the BUS -

➢ Data Transfer - Data-bus transfers actual Data between CPU and I/O devices. It is bidirectional.

➢ Addressing - Address-Bus carries the addresses of the memory location or I/O devices that the CPU
intends to read from or write to. It is unidirectional.

➢ Control Signal - Control-Bus carries the Control signals or Commands from the CPU to coordinate and
manage the operations of the Computer Components.

Like- clock signals, interrupts requests.

8. Explain the term cache memory with respect to computer architecture.

Cache memory is a small, high-speed memory located close to the CPU, used to store frequently accessed data
and instructions to speed up processing. It bridges the speed gap between the fast CPU and slower main
memory(RAM). Cache memory is organized into levels (L1, L2 and sometimes L3), with L1 being the smallest and
fastest while the subsequent levels increase in size and Latency.

Advantages -

Reduce Data accessing time, leading to faster execution of the Program.

Enhance CPU efficiency by reducing the idle time while waiting for Data.

Drawbacks -
Cost: Cache memory is more expensive per byte than RAM, leading to higher costs.

Complexity: Managing cache coherence and ensuring data consistency across multiple cache levels adds
complexity to system design.

9. Explain the role of a TLB in virtual memory.

The Translation Look-aside Buffer (TLB) is a small, fast cache in the CPU that stores recent translations of virtual
memory addresses to physical addresses, playing a crucial role in virtual memory systems.

Role -

Speed: TLB speeds up the virtual-to-physical address translation process, reducing the time needed for memory
access.

Efficiency: Improves overall system performance by minimizing the number of accesses to the page table in main
memory.

Example: When a CPU needs to access data, it first checks the TLB for the virtual address. If the translation is
found (a TLB hit), it quickly retrieves the corresponding physical address. If not (a TLB miss), it retrieves the
address from the page table, which is slower.

Advantages:

Fast Translation: Reduces latency in address translation.

Improved Performance: Decreases memory access time, enhancing system efficiency.

Drawbacks:

Limited Size: TLBs have limited entries, which can lead to frequent misses in large memory applications.

Complexity: Managing TLB consistency and handling misses adds to system complexity.

10. Write, in brief, about a branch predictor in computer architecture.

A branch predictor in computer architecture is a component that guesses whether a conditional branch in a
program (like an if statement) will be taken or not taken, before it is actually executed. This prediction helps the
processor fetch and execute instructions more efficiently.
Real-Life Analogy: Traffic Intersection - Imagine you're driving towards an intersection (like a branch in a program).

No Predictor (Basic Approach):

Without any prediction, you would approach the intersection cautiously, slowing down to check if you need to turn
(branch taken) or continue straight (branch not taken). This cautious approach can slow down traffic.

Branch Predictor (Prediction Mechanism):

Now, imagine there's a traffic sign or a traffic light ahead of the intersection that predicts whether you'll need to turn
or continue straight based on previous traffic patterns (similar to the predictor's history).

If the sign or light predicts you'll continue straight, you maintain your speed and pass through without slowing down
unnecessarily (like a branch not taken).
If it predicts a turn, you start slowing down early to make the turn smoothly (like a branch taken).

Just as a traffic predictor helps you anticipate and react faster at an intersection, a branch predictor in computer
architecture helps the processor fetch and execute instructions more efficiently by predicting the outcome of
conditional branches.

11. Give an illustration about pipeline in computer architecture.

12. Describe the difference between a single-issue and a multiple-issue pipeline.

Aspect Single-Issue Pipeline Multiple-Issue Pipeline

Instruction Executes instructions sequentially, one after Executes multiple instructions concurrently, if
Execution another. dependencies allow.

Performance Lower throughput due to sequential Higher throughput due to parallel processing of
Impact processing. instructions.

Dependency Handles dependencies easily as it processes Requires advanced techniques to manage

Handling one instruction at a time. dependencies between multiple instructions.

Real life Like a single lane road where vehicles pass Like a multi-lane highway where multiple cars
Instance through one after another. can move side by side.

13. Illustrate the purpose of a scoreboard in computer architecture

In computer architecture, a scoreboard is used to manage and synchronize the execution of instructions in a
pipeline.

Purpose of a Scoreboard:
1. Instruction Synchronization: Ensures that instructions proceed through the pipeline in the correct order and
without conflicts.

2. Dependency Tracking: Keeps track of dependencies between instructions, such as when one instruction
depends on the result of another.

3. Resource Management: Manages the availability of hardware resources (like registers and other functional
units) to prevent conflicts and ensure efficient use.

4. Execution Control: Determines when an instruction can proceed to the next stage of execution based on the
availability of resources and resolution of dependencies.

14. Define memory controller in a computer system.

A memory controller in a computer system is like a manager that oversees how data is stored and accessed in the
computer's memory.

Imagine you run a warehouse where you store various items (data) that people (programs or applications) need to
access. Then what will be your key responsibilities ? Definitely - Overall Warehouse Organizing, efficiently locating
Data and Safe Distribution, Organizing Storage, Access Control and Speed Optimization etc.

Similarly Memory Controllers are responsible for the followings -

Data Management: Controls how data is stored, retrieved, and updated in the computer’s memory.

Performance Optimization: Helps improve the speed and efficiency of data access, crucial for fast and
responsive computing.

Resource Allocation: Manages memory resources to ensure different programs can access and use memory
without conflicts.

15. Explain the workflow of the CPU.

CPU work Fetch, Decode, and Execute are the fundamental functions of the computer. The workflow of a CPU
(Central Processing Unit) can be simplified into these basic steps -

Fetch: The CPU fetches instructions (tasks) from the computer's memory that need to be executed.

Decode: It decodes these instructions to understand what operation needs to be performed.

Execute: The CPU performs the actual operation or task instructed by the decoded instruction. This could involve
calculations, data movement, or logical operations.

Memory Access: Sometimes, the CPU needs to access data from memory or store results back into memory
during execution.

Write Back: Finally, the CPU may write back the results of its operation to memory or to registers for temporary
storage.
16. Explain the significance of timing and control mechanisms in digital systems.

Timing and control mechanisms are crucial in digital systems because they ensure that operations happen in the
right order and at the correct speed.
Real life example - Timing and Control Mechanisms in Traffic Lights.

Traffic lights operate in a predefined sequence like - green (go), yellow (prepare to stop), and red (stop). This
sequence ensures that vehicles and pedestrians move safely and efficiently through intersections. When one
direction gets a green light, others get a red light, preventing collisions and optimizing traffic flow. Timing
mechanisms ensure each light changes at the right time to maintain order and safety by preventing accidents.

Similar Significance in Digital Systems -

Computers and Networks: Timing and control mechanisms in computer systems ensure that data flows between
components (like processors, memory, and peripherals) at the correct times and speeds.

Communication Systems: In telecommunications, timing mechanisms synchronize data transmission between

devices, ensuring reliable communication.

Industrial Automation: Control systems in factories rely on precise timing to coordinate machinery and ensure
efficient production processes.

Hence, Timing and control mechanisms in digital systems manage the flow of data and operations to prevent
errors, optimize performance, and ensure everything operates smoothly and efficiently.

17. What is the purpose of a control unit in a computer system?

The purpose of a control unit in a computer system is to manage and coordinate the execution of instructions. It
acts as the brain that manages and controls the flow of instructions and data within the computer system.

Purpose of CU in Computer Systems -

Instruction Execution: Manages the fetch, decode, execute cycle for each instruction.
Resource Allocation: Allocates resources like CPU time and memory access efficiently.

Data Flow Control: Ensures data moves between components correctly.

Error Detection: Detects and handles errors to maintain system reliability.

18. Explain the effect of instruction set on the performance of a computer system.

An instruction set is a collection of commands or operations that a computer's CPU (Central Processing Unit) can
understand and execute. The instruction set directly impacts how efficiently a computer system processes tasks.

Efficiency: A well-designed instruction set allows the CPU to execute instructions quickly and with minimal effort.

Complexity: Complex instruction sets can slow down performance due to increased processing time and resource
usage.

Optimization: Optimized instruction sets improve overall system speed and responsiveness by reducing the
number of instructions needed to perform tasks.

19. Explain the workflow of virtual memory in a computer system.

Virtual memory is a computer system technique that expands the available memory by temporarily transferring
data from RAM to disk storage. It allows programs to use more memory than physically available and optimizes
performance by managing memory resources efficiently.
Work Flow of Virtual memory -

Storage Management: If data isn't in physical memory, it's fetched from storage (like a hard drive) into memory.

Efficiency: Virtual memory helps use memory efficiently by swapping data between RAM and storage as needed.

Improves Performance: By managing memory this way, computers can run larger programs and handle more
tasks without running out of memory.

20. Compare between synchronous and asynchronous DRAM.

Aspect Synchronous DRAM Asynchronous DRAM

Memory The System Clock Coordinates the memory Does not use a System Clock to coordinate the
Access access. memory access.

Performance Provides High Performance. Provides Low Performance.

Manufacture Manufacture of Synchronous DRAM in High. Relatively Rare.

Application Modern PCs with high speed memory use Traditional PCs with Low speed memory use
Synchronous DRAM Asynchronous DRAM

21. Explain role of a DMA controller in a computer system.

The DMA (Direct Memory Access) controller in a computer system plays a vital role in managing data transfers
between devices (like hard drives, network cards) and memory without involving the CPU extensively.

Efficiency: DMA controllers improve system performance by offloading data transfer tasks from the CPU, which
can focus on executing programs.

Speed: They facilitate faster data transfers between devices and memory, enhancing overall system
responsiveness.

Resource Management: DMA controllers optimize resource usage by handling data movement efficiently,
reducing CPU overhead.
22. Evaluate the performance improvement of a computer system by using cache memory.

23. Explain the role of a memory management unit in virtual memory systems.

24. Illustrate how a branch predictor works in a pipelined processor.

25. Explain the concept of general register organization in computer architecture.

26. Construct the difference between Virtual memory and Cache memory.

27. Define why Virtual Memory is needed in Computer Systems.

28. Distinguish the difference between PROM and EPROM.

29. Illustrate the memory hierarchy with a suitable diagram.

30. Explain different types of mapping techniques used in cache memory.

31. Recall how many addressing modes and explain with an example ?

32. Why is the size of cache memory much less than main memory?
33. What are the advantages of using Cache Memory in a Computer System?

34. Describe the methods for dealing with the instruction hazards.

35. Explain cache write through and cache write back.

36. Define clocked sequential circuits.

A clocked sequential circuit is a type of digital circuit in which the output depends not only on the current input but
also on the history of the past inputs. These circuits use a clock signal to synchronize changes in state, ensuring
that all the changes occur simultaneously and in an orderly manner.

Components of clocked sequential circuits are - Flip-flops, Clock Signals and Combinational Logic.

❖ Flip-Flops - are the memory element used to store the state of circuits triggered by the clock signal.
❖ Clock signal - coordinates the timing of state changes.
❖ Combinational Logic - determines the next state of the flip-flops based on the current state and inputs.

A. Clock is a signal that goes Low to High Then Low then High and so on.
B. Time Period of a clock is the combination of Leading Edge(1) and Falling Edge(0)
C. Frequency = 1/Time Period, that controls the speed of a signal.

37. Discuss the influence of pipelining on instruction set design.

38. Extend briefly, the design of a hardwired control unit.

39. Determine instruction hazard.

40. Briefly explain maskable and non-maskable interrupts.

41. Briefly explain parallel processing.

42. Discuss the address capability of 8085 in 64 KB.

The 8085 Microprocessor, a popular 8 bit Microprocessor introduced by Itel in 1976, has a 16 bit address Bus. This
means it can address 2^16 or 64KB of memory.

★ Cause of Capability being limited to 64KB →

→ 16 bit address Bus.

→ Register size and instruction set is not optimized which causes architectural limitations.

→ In the 1970s 64KB of memory was a significant amount.

→ To make these processors less expensive and less complicated to design, developers keep it simple.

43. Explain Reduced Instruction Set Computer (RISC)

44. Discuss the function of ALE and READY pins in 8085.

ALE (Address Latch Enable) is used to demultiplex the address and data lines. The 8085 Microprocessor has a
multiplexed address and Data Bus (AD0 – AD7) which means the lower 8 Bit of the address and the 8 Bit of Data
share the same physical lines.

The READY pin used to synchronize the Microprocessor with the slower peripherals.
 Pin Purpose Functions

ALE Demultiplexing address Goes high to indicate the address is present on AD0 – AD7 lines. Used to
and Data lines. latch the lower address bit for proper separation of Address and Data

READY Synchronizing with Indicates whether a peripheral is ready for Data transfer, if Low, the
slower peripherals. Microprocessor waits, ensuring Synchronization with peripheral speed
capabilities.

45. Illustrate different types of array processors.

46. Organize the performance of ALU 8085 .

47. Identify the triggering of Flip-flops.

Triggering refers to the control signal or even that causes a flip-flop to change its state. A flip-flop is a type of circuit
that can store and recall a single bit of information. A flip-flop has two states : Either 0 or 1

There are two types of triggering → Edge triggering and Level triggering. Now Edge triggering is further divided
into two categories → Positive Edge Triggering and Negative Edge Triggering. Similarly Level Triggering also
has two categories → High Level Triggering and Low Level Triggering.
48. Distinguish HLDA and HOLD pin of 8085 microprocessor.

Aspect HOLD HLDA

Function Request Bus control from the Acknowledge the receipt of HOLD
microprocessor. request.

Type Input Output

Operation Initiated by External Device Microprocessor

Status Indicator Indicates external requests for the Bus Indicates microprocessor has granted
control. Bus control.

49. Identify the various hardware interrupts supported by the 8085 microprocessor.

The 8085 microprocessor supports the following hardware interrupts →

➔ TRAP: Non-maskable interrupt for critical tasks.

➔ RST 7.5: Software restart interrupt for specific tasks.
➔ RST 6.5: Software restart interrupt for specific tasks.
➔ RST 5.5: Software restart interrupt for specific tasks.
➔ INTE: Interrupt enable input for general interrupts.

These interrupts allow the 8085 microprocessor to respond to various events and conditions in a computer system,
facilitating efficient task handling and system management.

50. Justify the various registers of 8085.

Registers are the fastest and smallest storage component of a computer system. It is the collection of multiple
flip-flops. There are several registers in 8085 microprocessor -

Types of Registers in 8085 Microprocessor

General purpose Registers Special Purpose Registers

B(8 bit) C(8 bit) Accumulator (8 Bit), Flag Register (8 Bit)

D(8 bit) E(8 bit) Instruction Register (8 Bit)

 H(8 bit) L(8 bit) Program Counter (16 Bit), Stack Pointer(16 Bit)

Temporary Register

❖ Accumulator → type of register that temporarily stores the result of computation.

❖ Flag Register → is the status register that contains the current state of an X86 CPU.
❖ Instruction Register → holds the instruction currently being executed or decoded.
❖ Program counter → a special kind of register that keeps track of the memory address of the next instruction
to be executed in a program.
❖ Stack Pointer → Small register that stores the memory address of the last element added to the stack.
❖ Temporary Register → The only register that can be read and written more than once in a single
instruction.

Long Answer Questions

1. Illustrate logic and shift micro-operations.

2. Explain the race-around condition in detail.

3. Design the arrangement and interconnection of the adders and the input signals so as to
generate an 8-bit product as P7 P6 P5 P4 P3 P2 P1 P0.
Assuming two 4-bit unsigned numbers are to be multiplied using the principle of carry save
adders and the numbers to be A3 A2 A1 A0 and B3 B2 B1 B0.

4. Explain the circuit diagram for implementing the following register transfer operation: if(a'b=1)
then R1<-R2 else R1<-R3; where a and b are control variables.

5. Explain arithmetic shift-right, circular shift-right and logical shift-left operations. Suppose
register A holds the 8-bit number 11011001. Determine the sequence of binary values in A after an
arithmetic shift-right, followed by a circular shift-right and followed by a logical shift-left.

6. Give the list of Memory Reference Instructions. Explain any THREE of it

7. Draw and explain the flowchart for the instruction cycle.

8. Define the types of interrupt and model the interrupt cycle.

9. What are register reference instructions? Explain.

10. Develop an assembly language program to multiply and divide two 8 – bit numbers.

11. Develop an 8085 assembly language program to sort the numbers in ascending order.
12. Explain the Timing diagram for STA 526A H.

13. Develop an 8085 assembly language program to add two 16-bit numbers.

14. Explain the following instructions of the 8085 processor with suitable examples.
a. SPHL
b. XCHG
c. MOV B, M
d. DAA
e. RAR

15. Estimate the Average access time and Efficiency of the memory system with a hierarchical
cache-main memory subsystem possessing Cache access time of 160 ns, main memory access
time of 960 ns and hit ratio of cache memory is 0.9.

16. Compare between Primary, Secondary, and Tertiary memory.

17. Explain the concept of cache levels.

18. Explain the storage structure of a ROM storage cell and the read and write operations on the
cell.

19. Explain memory interfacing with the help of an example.

20. Draw and explain the Control unit of the Basic computer system with a timing diagram.

21. Apply the SR flip flop by using a NAND gate.

22. (3*4) + (5*6) convert into RPN and show stack operations.

23. Discuss the general register organization of CPU.

24. Discuss the stack organization of CPU.

25. Draw and explain the data movement among registers using a common bus.

26. Discuss the advantages and disadvantages of the types of addressing modes.

27. Distinguish between RISC and CISC.

28. How many address lines are needed to access RAM chips arranged in a 4×6 array, where each
chip is 8K × 4 bits, if each address space represents one byte of storage space ?

29. Design the architecture of 8085 Microprocessor.

30. Discuss the pin function of 8085 Microprocessor .

31. Explain the function of Direct Memory Address(DMA).

32. Categorize the accumulator.

33. Explain the addressing mode and its different types.

34. Define and compile the JK flip flop.

35. Develop the T flip flop.

36. Outline the features of primary memory and secondary memory.

37. Explain the memory hierarchy of the computer system .

38. Distinguish the importance of the accumulator unit of the computer system.

39. Construct the Von Neumann Model with all its components.

40. Design and discuss the components of computer systems .

41. Illustrate the term instruction cycle with a diagram.

42. Classify different types of the computer register.

43. Explain the computer register with the help of a structural diagram.

44. Apply the do-while loop and for loop used in assembly language.

45. Examine the data transfer and data manipulation performed by the Central Processing Unit.

46. Determine the importance on Reduced Instruction Set Computer(RISC)

47. Elaborate all the addressing modes.

48. Explain the structure of the instruction format.

49. Construct the architecture Random Access Memory(RAM)

50. Interpret the term Cache coherence and its importance.

51. Relate the term cache memory and cache mapping.