Rz,#01

MOV(11) (a]Decode 2 (viii)

END JMP INC R2
JMPR2.#N (O+XRAA
communications (vii) (vi) (v)EE/EL-306-Microprocessors (iv) (iii) (11) ())ENOfeoOTRo
EXAMINATION
[a] 1SUPPLEMENTAY Hours
Time:
3:00 B.Tech Total
CINERi,R, CLR R3,
MOVC
MOV -JNCSUBBA,R A,@DPTR DPTR
INC memory
MOV
Rj,A
A,@DPTR
AMOVX DPTR,#1000H
MOVX MOV JMP INR OUTA Handshake Atleast Arithmetic
Synchronous 8byte EPROMPROM Only Interrupt Giving 11972a
Attempt
AttemoothoYIpgY AsSume Number
20H; the ELECTRICAL/
FIFO one
256 system
What following reasons
20y register routinesShift all
based bytes MEYOne suitable of
wil is utilizing RAM for parts pages
be the characters is by
programs bank with ELECTRICAL
the port data of
is always
8085_uP. mandatory
explaining
internal issing
of 3
content What address transfera a
8251requisite can monitor parts.
and begin dáta
is are data be &
of the for(very one ELECTRONICS
ofreportUSART.
requisite is used if
R, shape the mandatory for memory program with signed anýData from
ifN DIA the 8x8 atinstructionbriefly),
a &
is converter
of answer Question4
the the Keyboardfor time arithmetic.. Microcontroller
is Place
waveform is why? Sheets ENGG.
count with
mandatory in always
establishing
after (Marks Marks:40 Maximum
slow 8051 DI.
of execution scanning placed proVIdedareare and
array generated (Aug-2o18)
SEMESTF^ 6h Roll
No.
microcontroller(C).
peripherals. may.ñöt
in second.from
redfrom
synchronous
of with 8051 in be
?(8O85 the
each C a
Application:
uP) program. 8279. first
1000E? family.A eOonewise)
lx8 slot Question
seria
(8051, for
5
 5|a] 4[a] 3
[b ] e and calculation of [ b]
without [a] [b] (i1)
ettoringspeed addresshigher03BCH refreshes individual
h converter)
witassembly locations pin Start (Port50Hz). ratconsumed converter
TRIANGULAR (ii)Process (i)
8253 A of Write 10.304 Write Draw Draw RRC SETB C CLRC ACC.7IB
A SJMP
2 3x8 Address
of voltage
of handshake Instruction
mode MOVA.
d of 8255 The foldback a
anrogrammable
the converts key
83.nibble he x conversion.
24004. 12.8kHz. an (directly an neat a
ar)ration display language8 are connected range ADC p.u. 8085 by MHz.
of neat
DC Draw lockout data connected ke y the delays 8085contiguous involved <Signed
containing and STAX timing
are motor
individually the received pad Assume 80r834)Assuming issignalssingle
assembly interfaced
Drawwaveform wite
en of a Assume to in and assembly Integer
neat data for program and turn fo r diagram Whet
the by timer RSTS.5). neatly
memory D.
diagram received
zero, eight to suitable
in through phase counts. neat awith (8085y)
input does
thedrive.
ontrolling in 8085seven 8
that interrupt connected of
informat handshake purely language diagram 8085nearly
lo ad language their and for A
Store
lar interfaced system successive
of sequence
uP/8051C
waits number the uP- address map the: hold
The from segment(7seg) OR output
the of driven sinusoidal to sample by Port for after
on the f or th e 8085 program of 50Hz the
ronous with system.clock 8279 row of mode. simultaneously progranmrange.8K,4K
PWM with key th
throughe output Address-8O,).
the of ereewti
8085/8051 in to and samples. input uP and using dat a
is presses FIFO
to scheme. and2K
at inputs available left column displays
a in to Use
through voltage hold
the t full 8279 compute program
Digital through ofprog
4bientry. th e the Assume
sameinputs to is atstatus, pin circuit sampling Show memories
binary awithintertace. (with microprocessor
same PC
waveformport
Type-C used at
Assume to to 8255
rate of stretch to A at the details (NOS)
the IMHz hex encoded external
assimilate system analog
generate in port
but chopper to precisiongenerate of a its p.u.
Dcontrol and code aand Write 8255Ssampling sequence
ced tlip call bin-7seg (230V, current power of
clock (DA) under 1
then scan (/N T the PPI the
Odd with on the an a
tlop for the 8 at
8
 4 3 e er 1%
4 2 x3

transmission
80(825/).
9600forparity losection
opInitialize [b].
register
desiredcounters to with
PWM diagramfrequency
to Draw provide
8051 bit, send of Doutput respect
and chopping of through ofthe to
unitsDraw using one the 8051 neat a
8085 connections
may produce to
including Timerl, a to
stop dataprogram
speed
receive diagram e be
Pratassembly each
neat bit for andproduced. control
is requisite
of other
diagram
baud asynchronous
Crystal with data the
for
speed20kHz. different
baud USART language inbeyond
fe=I1.059MHz).
rate through
DTE-DTE is The 256 duly
proportional
ORAssume
generationfor of rate (8251) system timers stepscycle half
communication
the factorinterrupt program
825 and in time
to PWM
clock
reference operate clockwise
1/8051
Assume ofinterfaced to period
(RST
DTE-DCE duty is in (or
8051). 16(for kept 8083 the 9
with th 5.
wi5NINTI) cycle.speed correspnndimg
direction ond
even
8251/baud with atsystem
so 9
receiver
address 8 serial 5.12 that
is ger
bits/frame, and8035/
go
proideh MHz Inifialrne rgu
agogrngrate
rate nterface f
to UART
into md flig t
and be of 10 PrA
a n he he fin
e ey
 Total Number of Pages 2 Ikoll No,
D flip flop (preser and clear) are used to producc requisite duly cycle PWM (at
Qand Qoutputs of FlipFlop) which in turn provide thespced control in 128 steps. B.Tecth ELECTRICAL/ELECTRICAL &ELECTRONICSENGG. 6,EMESER
Draw a neat diagram of connections of different timers to operate the system, END SEMESTER CXAMINATION (Muy-o19)
Initialize the counters through assembly language program in 8085 1P so that
appropriate PWM output may be produced. Thesystem clock is kept at 2.56 EE/EL-306 Microprocessor & Microcontroller Application
MHZ and the desired chopping rate is 20kHz. Assume reference speed is Time: 3:00Hours Maxlmum Marks:40
provided in register D of 8085uP and speed is proportional to duty cycle 8
Noto: ana2& a3 aro compulsory
5[a] A 2x8 hex key pad [Oy-7hr" ron); 8-Fn(2nd row] and.8 seven segment(2seg). HAtermpt'otther 2(Two)parta one:trom.Quontlon 4, andisecond trom Quostlon 5
displays are connected to 8085 uP/805lC through.-8279 interfacc. Write, an ASSuraesujablemis9hgaala Tany pataSheagie provido
assembly language program that waits. for the key press, assimilate the data HAtomptall parto o a quostion ationo placo.(Mitkumay nottboawarded othewio)
received in format of row and column with encoded scan with N key rollover
for each key press and then write on the display sequentially with right entry. 1[ajGiving reasonsexplain briefly, why? (Answer any five)
Devise a subroutine which converts the data received fromn FIFO of 8279 into (i) The bus operation is regulated through Tristate bulfers.
a 4bit binary hex code with higher nibble containing zero for use in the main (ii) Overflow occurs with addition of similar signed numbers.
program. System clock is available at IMHz and Odd address 43. Draw a (ii) Stack memory isemployed for both CALL and RET instructions.
neat diagram of the system. Assume each write on the display memory (iv) Interruptroutines always begin with instruction D.
sequences next display for writing. (v) Only onc register bank can be used at a timne in 8051 microcontroller(z).
OR (vi) Multiple SFRs are put in service while programming with 80STC fmily.
(vii)8byte FIFO RAM is arequisite for 8x8 Keyboard scanning with %279.
(b). Draw a neat diagram for DTE-DTE and DTE-DCE serial interface. Ix5
Initialize and program the USART (8251) interfaced with 8085/ UART [b]Return answer in cither numerical value/ value in requisite formav names
section of 805 1 to go into the loop to send and receive the data in alternating
fashion for asynchronous communication with 8 bits/frame, no parity bit, one () 8900 in Q13 format, is cqual to.....in base 10?
stop bit with baud rate factor of 16(for 825/)/baud rate of 9600for 8051 using (ii)T states consumed in cxecution of instruction LHLD 2500,. (8085uP)
Timerl, Crystal fou=l1.059MHZ). Assume even address to be 80:(825/). Draw a (ii) After execution of following instructions what will be the status of S,Z,AC,PC
neat diagram of the 825 1/8051 with receiver and transmission units including and overflow flags ?
baud rate generation(for 8051). 8
MVIA,301
ADI E8|
-X
(iv) If the initialvalues of the DE and HL. register pairs aro given, after oxecution
of following instructions the content of DE register pair will be...7
XCHG
DAD H DE 2264
4433
XCHG
(v) After execution of following instructions what will be the content of SP nd
BCregister pairs?
LXISP, FFFE,
LXI B, CADB|
LXI D, 007CH
PUSH B
PUSH D
POPB
(vi) If data <BO> is given one arithmetic right shift the
contents becomes...?
 program. [b] Draw a neat timing diagram for the:
lajoe the lollowng prograns and report thc answer after exCcution of cach () Instruction IN 204 (8085uP)
(i) MVICOAN handshake
XRA A (i)Process involved for output of data through 8255S port under 1hx2
MOV B,A mode
+INR B
3[a] Write an 8085/8051 assembly language program to
implement Successive
Approximation based analog to digital conversion using Digital to Analog
ADD B
DCR C analog
-JNZ What would Accumulator hold after execution? (DIA) converter (directly interfaced with 8085 uP. Port Address-204) and an
(1) LXI H, 2400H comparator. Use RSTS.5 pin of the 8085 uP to input from analog comparator.
MVIC04H
Use delay of approximaely- S6T states-in the-progrä-to-take-care of the
XRA A
MOV A,M
response time of the D/Aconverter andanalog comparator.
MOV B,M -fA
CMP B Converter
JNC
MOV A,B 8085/
4INX H 8051
DCR C Analog

JNZ What would Accumulator hold afier execution? 1 RST S.S

Comparator Input

212 (iii) MVI C,00:

MOV H,C [b]Write an 8085 assembly language program program to generate a triangular
MVID, 0AH waveform of nearly 70Hz using Digital to Analog (DIA) converter (direcily
MVIB, #(8 bit binary number) interfaced with 8085 uP- Port Address-804). Assume system clock of 10.304 MHz.
MOV A,B
SUB D Draw a neat diagram of the scheme. Show details of the calculation of delays
INRC and counts.
JNC
DCR C
ADD D 4[a](i) Write an 8085/8051 assembly language program to compute the p.u
MOV B,A value of power on DC side of the rectifier which feeds a resistive load to
MOV A,C transfer the power from AC source. The signal from the voltage sensor on
t SUB D
INRH
the DC bus is analysed by an ASIC (Application Specific Integrated
JNC
Circuit) which in turn provide the average voltage as digital data in per
DCR H
unit form, to be READ from 20H. Assume the resistance connected as load
ADD D is 0.125S2 (p.u.). 4
RLC
RLC ()Draw a neat diagram with proper labelling for ADC interface to 8085juP
RLC through 8255. U_e port A to input data from ADC. Pin PC, is used to
RLC provide the start of conversion signal (B/C), and the End of Conversion
ORA B (DR) is received at PC4, which serves as strobe signal. Write an assembly
from
MOV L,A What would HL register pair hold afler execulion? 1%
language program to sample 100 data from ADC and store them 4
(iv) MVI B, # location 2400. Use interrupt mode for data transfer.
MOV A,B
RLC
OR
used to control the
MOV A,B
b] An 8253 programmable timer interfaced with 8085 uP is incident on type-C
RAR
speed of a small DC motor by controlling the PWM inputs
of the
chopper for motoring operation of the drive. The asynchronous inputs
HLT What would Accumulator hold afler execution? 1%