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BCS-302 - 2

This document is a model question paper for the B.Tech 3rd semester Computer Organization and Architecture course for the 2023 batch. It consists of three sections, with Section A requiring brief answers to various topics, Section B containing detailed questions on specific concepts, and Sections C through G offering choices for in-depth exploration of topics like stack organization, effective address calculation, control mechanisms, cache performance, and data transfer modes. The paper covers a range of subjects including memory types, instruction cycles, virtual memory, and interrupt types.

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3 views2 pages

BCS-302 - 2

This document is a model question paper for the B.Tech 3rd semester Computer Organization and Architecture course for the 2023 batch. It consists of three sections, with Section A requiring brief answers to various topics, Section B containing detailed questions on specific concepts, and Sections C through G offering choices for in-depth exploration of topics like stack organization, effective address calculation, control mechanisms, cache performance, and data transfer modes. The paper covers a range of subjects including memory types, instruction cycles, virtual memory, and interrupt types.

Uploaded by

erlik.xvii
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© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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MODEL QUESTION PAPER-II (2024-25)

B.TECH 3rd SEMESTER (2023 BATCH) (CS)


COMPUTER ORGANIZATION AND ARCHITECTURE
BCS302 PAPER ID:

Attempt all the Sections.


SECTION A
1. Attempt all the questions in brief.
a. Write short note on Locality of Reference. CO4 K1
b. Differentiate between RISC and CISC. CO2 K4
c. Define instruction cycle. CO3 K1
d. List the difference between static RAM and dynamic RAM. CO4 K1
e. Define bus and memory transfer? CO1 K1
f. Explain the term Cycle Stealing. CO5 K2
g. Discuss biasing with reference to floating point Representation. CO2 K2

SECTION B
2. Attempt any three of the following:
a. An instruction is stored at location 400 with its address field at location 401.The CO1 K1
address field has the value 500.A processor register R1 contains the number 200.
Evaluate the effective address if the addressing mode of the instruction is (i) direct
(ii) immediate (iii) relative (iv) register indirect (v) index with R1 as index register.
b. Explain IEEE-754 standard for floating point representation. Express (314.175)10 CO2 K2
in all the IEEE-754 models.
c. Explain 2-bit by 2-bit Array multiplier. Draw the flowchart for divide operation of CO3 K2
two numbers in signed magnitude form.
d. Discuss the need of virtual memory. Demonstrate its implementation using paging. CO4 K2
e. Define interrupt. Also discuss different types of interrupt. CO5 K1

SECTION C
3. Attempt any one part of the following:
a. Explain about stack organization used in processors. What do you understand by CO1 K2
register stack?
b. A digital computer has a common bus system for 8 registers of 16 bit each. The bus is CO1 K1
constructed using multiplexers. I. How many select input are there in each multiplexer? II.
What is the size of multiplexers needed? III. How many multiplexers are there in the bus?

4. Attempt any one part of the following:


a. Illustrate the process of non-restoring division taking the division of 1310by 310 . CO2 K2
b. What is an effective address? How it is calculated in different types of addressing CO2 K2
modes? Explain.

5. Attempt any one part of the following:


a. List the differences between hardwired and micro programmed control in tabular format. CO3 K1
Write the sequence of control steps for the following instruction for single bus architecture.
R1 ←R2 * (R3)
b. Draw the flowchart for instruction cycle with neat diagram and explain. CO3 K6
6. Attempt any one part of the following:
a. Explain Cache performance measures. Evaluate the performance of 2-level Cache memory. CO4 K2
b. Calculate the page fault for a given string with the help of LRU & FIFO page replacement CO4 K4
algorithm, Size of frames = 4 and string 1 2 3 4 2 1 5 6 2 1 2 3 7 6 3 2 1 2 3 6.

7. Attempt any one part of the following:


a. Discuss the different modes of Data Transfer. CO5 K2
b. Draw and explain the Block Diagram of DMA Controller. CO5 K6

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