Computer Architecture and Organization

Assignment-1

1. Which of the following is part of the Central Processing Unit (CPU)?

A) Input Unit
B) Control Unit
C) Output Unit
D) I/O Devices

2. In General Register Organization, registers are used to:

A) Store data permanently
B) Hold temporary data for processing
C) Manage input-output devices
D) Control external peripherals

3. A stack organization in the CPU uses:

A) Registers organized in layers
B) A last-in-first-out (LIFO) storage method
C) Registers that transfer data sequentially
D) A first-in-first-out (FIFO) storage method

4. The stack pointer (SP) holds:

A) The address of the top element of the stack
B) The address of the next instruction
C) The result of arithmetic operations
D) The status of input-output devices

5. Which of the following is NOT an instruction format?

A) Three-address format
B) Two-address format
C) Stack-address format
D) Single-address format

6. An instruction format typically consists of:

A) Opcode and operand fields
B) Data and program counter
C) Clock cycles and memory
D) Status bits and flags

7. Addressing modes are used to:

A) Speed up execution
B) Define how operands are chosen
C) Control data buses
D) Assign memory addresses to devices

8. In immediate addressing mode, the operand is:

A) Stored in a register
B) Provided as part of the instruction
C) Fetched from memory
D) Calculated by the ALU

9. Direct addressing mode involves:

A) The operand being in a register
B) The operand being stored in memory
C) The operand being part of the instruction
D) The operand being found in the stack
10. Data transfer instructions involve:
A) Moving data between registers and memory
B) Arithmetic operations
C) Conditional branching
D) Interrupt handling

11. Data manipulation instructions include:

A) Arithmetic and logic operations
B) Data transfer between I/O devices
C) Program control instructions
D) Memory management

12. Program control instructions manage:

A) Arithmetic calculations
B) Execution flow of the program
C) Memory read and write
D) Data transfer between peripherals

13. CISC processors are characterized by:

A) A reduced set of instructions
B) Complex instruction sets
C) Use of microprogramming only
D) Fewer addressing modes

14. RISC processors aim to:

A) Reduce the number of instructions per program
B) Increase the complexity of instruction sets
C) Add more addressing modes
D) Simplify control unit design

15. The control unit in the CPU is responsible for:

A) Fetching and executing instructions
B) Performing arithmetic operations
C) Storing data permanently
D) Displaying output

16. A control memory in the CPU contains:

A) Data to be processed
B) Instructions for micro operations
C) The results of calculations
D) The program counter

17. Address sequencing refers to:

A) The process of determining the next microinstruction address
B) Fetching data from memory
C) Managing program execution order
D) Handling external interrupts

18. Microprogramming involves:

A) Writing machine-level programs
B) Designing the control unit using a sequence of microinstructions
C) Managing memory paging
D) Interrupt handling
19. In a microprogrammed control unit, the control signals are generated by:
A) Hardware
B) Software instructions
C) A sequence of microinstructions stored in control memory
D) Direct memory access

20. The major advantage of microprogrammed control is:

A) Faster execution of instructions
B) Simplified control unit design and flexibility
C) Reduced memory usage
D) Complex hardware circuitry

21. A hardwired control unit is characterized by:

A) Flexible instruction decoding
B) Faster control signal generation through fixed circuits
C) Use of microinstructions stored in memory
D) Simplified debugging of control signals

22. In a microprogrammed control unit, the control memory is typically organized as:
A) Random access memory (RAM)
B) Read-only memory (ROM)
C) Cache memory
D) Flash memory

23. A microinstruction specifies:

A) A single machine-level instruction
B) The control signals required to execute a micro operation
C) The next address in the instruction cycle
D) The operand and opcode

24. In a microprogram example, the microinstructions are typically stored in:

A) The program counter
B) The instruction register
C) The control memory
D) The stack pointer

25. The design of a control unit involves:

A) Arithmetic and logic operations
B) Generating control signals and instruction sequencing
C) Data manipulation and storage
D) Displaying output on the screen

26. What is the main characteristic of semiconductor memory?

A) It is slow and inexpensive
B) It is fast and volatile
C) It is non-volatile and fast
D) It is used for permanent storage

27. Which of the following represents the correct memory hierarchy in terms of speed
(fastest to slowest)?
A) Cache, Main Memory, Auxiliary Memory
B) Main Memory, Cache, Auxiliary Memory
C) Auxiliary Memory, Cache, Main Memory
D) Main Memory, Auxiliary Memory, Cache
28. Memory interleaving is used to:
A) Increase memory capacity
B) Increase memory access speed
C) Reduce the cost of memory
D) Organize memory logically

29. The main memory in a computer typically consists of:

A) RAM and ROM chips
B) Only RAM chips
C) Only ROM chips
D) Cache and RAM

30. Which of the following is true about Random Access Memory (RAM)?
A) It is non-volatile
B) It retains data when power is turned off
C) It is used for temporary storage
D) It is used for permanent storage

31. Read-Only Memory (ROM) is typically used for:

A) Temporary data storage
B) Storing programs that need to be permanently available
C) Running user applications
D) Buffering high-speed data

32. The address map in memory organization refers to:

A) The way addresses are assigned to memory locations
B) The number of data blocks stored in cache
C) The physical layout of memory chips
D) The mapping between memory and peripheral devices

33. Associative memory is also known as:

A) Content-addressable memory (CAM)
B) Read-only memory (ROM)
C) Static memory
D) Dynamic memory

34. Associative memory is used for:

A) Faster data access based on content rather than address
B) Storing instructions permanently
C) Managing virtual memory
D) Writing and reading data sequentially

35. In associative memory, match logic is used to:

A) Compare desired content with stored data
B) Organize data in a sequential manner
C) Write data into memory cells
D) Control the size of the memory block

36. Cache memory is used to:

A) Store permanent data
B) Increase the speed of data access
C) Store large amounts of data
D) Increase memory capacity
37. In cache memory, the size of the cache affects:
A) The speed of data access
B) The amount of data that can be processed simultaneously
C) The size of the data blocks stored
D) The overall storage capacity

38. In direct mapping, a block of memory is mapped to:

A) Any available cache line
B) A fixed cache line
C) A set of cache lines
D) The first cache line

39. Set associative mapping allows:

A) One memory block to be mapped to only one cache line
B) One memory block to be mapped to any cache line
C) A block to be mapped to a limited number of cache lines
D) A block to be stored directly in main memory

40. In associative mapping, memory blocks are:

A) Directly mapped to cache
B) Mapped based on content, not address
C) Randomly distributed across the cache
D) Split into smaller blocks before mapping

41. The primary function of cache memory is to:

A) Reduce access time for frequently used data
B) Increase main memory size
C) Store instructions permanently
D) Increase the speed of auxiliary memory

42. Which of the following is a type of auxiliary memory?

A) Magnetic tapes
B) RAM
C) Cache
D) ROM

43. Auxiliary memory is used for:

A) Temporary storage
B) Permanent and large-capacity storage
C) Executing programs
D) Speeding up CPU operations

44. Magnetic tapes are commonly used for:

A) Storing data that requires frequent access
B) Storing large volumes of data for backup
C) Storing instructions in ROM
D) Storing small amounts of fast-access data

45. Which of the following mapping functions is the simplest but least flexible?
A) Associative mapping
B) Set associative mapping
C) Direct mapping
D) Random mapping
46. In a cache, block size refers to:
A) The number of words transferred at once
B) The physical size of the cache chip
C) The speed of cache memory
D) The total size of the cache

47. Larger block sizes in cache tend to:

A) Increase cache hit rate
B) Decrease memory access time
C) Improve auxiliary memory performance
D) Reduce the size of the main memory

48. What is the disadvantage of a large block size in cache memory?

A) Higher miss penalty
B) Reduced cache hit rate
C) Increased memory size
D) Increased processing speed

49. In associative mapping, how is the location of data determined?

A) By its memory address
B) By the content of the data
C) By the program counter
D) By the size of the memory block

50. Which of the following memory technologies is known for its non-volatile
characteristic?
A) RAM
B) Cache memory
C) ROM
D) DRAM