Vishwakarma Institutes of Technology

D.E.S.H. - Department of Engineering, Sciences and Humanities

FY (AY-20 -21) - RME Robot Mechanics and Electronics
Notes 7.1,7.2 and 7.3 Digital Electronics
------------------------------------------------------------------------------------------------------------------------------------------
A) Binary numbers
This brings us to the first
two digits i.e., 0 and 1 which means that while counting in binary you cannot exceed 1. Infact all the
numbers which you represent are made up of only two digits i.e., 0 and 1 which is quite interesting.
Binary counting
How do we count using binary?
It is just like counting in decimal except we reach 10 much sooner.
Binary Explanation
0 Start at 0
1 Then 1
???
How do we count in Decimal?
Decimal Explanation
0 Start at 0
1 Then 1
2-8 Count 1,2,3,4,5,6,7,8
9 This is the last digit in Decimal
10 Start from back at 0 again, but carry 1 on the left

Binary Explanation
0 Start at 0
1 Then 1
10 Now start back at 0 again, but carry 1 on the
left
11 1 more
???
What happens in Decimal?

Decimal Explanation
99
100

Binary Explanation
0 Start at 0
1 Then 1
10 Now start back at 0 again, but carry 1 on the left
11 1 more
100 start back at 0 again, and carry one to the number on the left but
that number is already at 1 so it also goes back to 0 and 1 is
carried to the next position on the left
101
 110
111
1000 Start back at 0 again (for all 3 digits), add 1 on the left

B) Number System in Digital Electronics

Definition: In digital electronics, the number system is used for representing the information. The
number system has different bases and the most common of them are the decimal, binary, octal, and
hexadecimal.
Types of Number Systems -
Some of the important types of number system are
Decimal Number System
Binary Number System
Octal Number System
Hexadecimal Number System
These number systems are explained below in details.

1) Decimal Number Systems -

The number system is having digit 0, 1, 2, 3, 4, 5, 6, 7, 8, 9; this number system is known as a decimal number system.
The base of the decimal number system is 10.
2) Binary Number Systems -
The base of binary number system is 2 because it has only two digits 0 and 1.The digital electronic equipments are
works on the binary number system and hence the decimal number
is converted in to binary system.
3) Octal Number systems
The octal number system has base 8. All these digits from 0 to 7 have the same physical meaning as by
decimal symbols.
4) Hexadecimal Numbers
These numbers are used extensively in microprocessor work. The hexadecimal number system has a
base of 16, and hence it consists of the following sixteen numbers of digits.
0, 1, 2, 3, 4, 5, 6, 7, 8, 9, A, B, C, D, E, F.

C) Logic Gates
Logic gates are the basic building blocks of any digital system. It is an electronic circuit having one or
more than one input and only one output. The relationship between the input and the output is based
on certain logic. Based on this, logic gates are named as AND gate, OR gate, NOT gate etc.
AND gate -
The AND gate produces the AND logic function, that is, the output is 1 if input A and input B are both
equal to 1; otherwise the output is 0. The algebraic symbol of the AND function is the same as the
multiplication symbol of ordinary arithmetic. We can either use a dot between the variables or
concatenate the variables without an operation symbol between them. AND gates may have more than
two inputs, and by definition, the output is 1 if and only if all inputs are 1.

OR Gate
The OR gate produces the inclusive-OR function; that is, the output is 1 if input A or input B or both
inputs are 1; otherwise, the output is 0. The algebraic symbol of the OR function is +, similar to
arithmetic addition. OR gates may have more than two inputs, and by definition, the output is 1 if any
input is 1.

Inverter (NOT) Gate

The inverter circuit inverts the logic sense of a binary signal. It produces the NOT, or complement,
function. The algebraic symbol used for the logic complement is either a prime or a bar over the variable
symbol.

NAND Gate
The NAND function is the complement of the AND function, as indicated by the graphic symbol, which
consists of an AND graphic symbol followed by a small circle. The designation NAND is derived from the
abbreviation of NOT-AND.

NOR Gate -
The NOR gate is the complement of the OR gate and uses an OR graphic symbol followed by a small
circle.
Exclusive-OR Gate
The exclusive-OR gate has a graphic symbol similar to the OR gate except for the additional curved line
on the input side. The output of the gate is 1 if any input is 1 but excludes the combination when both
inputs are 1. It is similar to an odd function; that is, its output is 1 if an odd number of inputs are 1.

Exclusive-NOR Gate
The exclusive-NOR is the complement of the exclusive-OR, as indicated by the small circle in the graphic
symbol. The output of this gate is 1 only if both the inputs are equal to 1 or both inputs are equal to 0.

C) Combinational logic circuit

Combinational Logic Circuits are memoryless digital logic circuits whose output at any instant in time
depends only on the combination of its inputs

Combinational Logic Circuits are made up from basic logic NAND, NOR or NOT gates that are

Sequential logic circuit - The combinational circuit does not use any memory. Hence the previous state
of input does not have any effect on the present state of the circuit. But sequential circuit has memory
so output can vary based on input. This type of circuits uses previous input, output, clock and a memory
element.
 D) Flip-flop (latch)
In electronics, a flip-flop or latch is a circuit that has two stable states and can be used to store state
information. Due to these states, latches also refer to as bistable-multivibrators. The stored data can be
changed by applying varying inputs. Flip flops and latches are the basic building blocks of digital
electronics systems used in computers, communications, and many other types of systems. One flip-flop
can store one bit of information.
FLIP FLOP using Transistor (Bistable multivibrator)-
In Bistable multivibrator both states are stable state and output of the multivibrator can be any of the 2
stable states. When we apply the trigger signal then output goes from one stable state to another stable
state and if no triggering action is occurred after that then output will remain in second stable state. But
suppose if triggering action is occurs once again then output will go back in to another stable state. This
type of Bistable multivibrator can be used as flip-flop.

Application
1) Used for counting and storing the binary information.
2) Used as frequency divider in timing circuits.
3) Used for generation of clock pulses.
4) Used in relay controller
5) Used as a electronic toggle switch

E) Latch
In digital electronics, a Latch is one kind of a logic circuit, and it is also known as a bistable-multivibrator.
Because it has two stable states namely active high as well as active low. It works like a storage device
by holding the data through a feedback lane.
Different Types of Latches - The latches can be classified into different types which include SR Latch,
Gated S-R Latch, D latch, Gated D Latch, JK Latch, and T Latch.

SR Latch -
The SR latch is a special type of asynchronous device which works separately for control signals. It
depends on the S-states and R-inputs. The SR latch design by connecting two NOR gates with a cross
loop connection. The SR latch can also be designed using the NAND gate. Below are the circuit diagram
and the truth table of the SR latch.
 S R Q
0 0 Memory
0 1 0 1
1 0 1 0
1 1 Unstable

SR Latch (NAND version)

S R Q
0 0 Disallowed
0 1 1 0
1 0 0 1
1 1 Memory

F) SR Flip-flop

The problems with S-R flip flops using NOR and NAND gate is the invalid state. This problem can be
overcome by using a bistable SR flip-flop that can change outputs when certain invalid states are met,
regardless of the condition of either the Set or the Reset inputs. For this, a clocked S-R flip flop is
designed by adding two AND gates to a basic NOR Gate flip flop.

S* R* Q
0 0 Not used
0 1 1 0
1 0 0 1
1 1 Memory

Find S*

S* = = +

R* = = +

Case 1) When CLK = O, value of S* = 1 , R* =1

Case 2) When CLK = 1, value of S* = , R* =

So when S=0, R=0 then S* = 1 and R* =1 , so output is memory.

Case 3) When CLK = 1, value of S* = 1, R*=0. So when S=0, R=1, then

Output is 0 and 1.
Case 4) When CLK =1, S=1, R=0, then S* = 0, R*=1, output is 1 and 0.

Case 5) When CLK = 1, S*=R*=0, so when S=R=1, output is not valid.

G) D (Data) Flip-Flop
D flip bit
binary data. The D-type flip-flop is a modified Set-Reset flip-flop with the addition of an inverter to
prevent the S and R inputs from being at the same logic level.
Truth Table of D flip-flop -

CLK D Qn
0 × Previous
o/p
1 0 0
1 1 1

Construction- A D flip flop is constructed by modifying an SR flips flop. The S input is given with D
input and the R input is given with inverted D input. Hence a D flip flop is similar to SR flip flop in
which the two inputs are complement to each other, so there will be no chance of any intermediate
state occurs.

Working If the clock signal is high (rising edge to be more precise) and if D input is high, then the
output is also high and if D input is low, then the output will become low. Hence the output Q follows
the input D in the presence of clock signal.

Applications

1) Data storage registers.

2) Data transferring as shift registers
3) Frequency division circuits

H) JK Flip-Flop
The sequential operation of the JK Flip Flop is the same as for the RS flip-flop with the same SET and
RESET input. The difference is that the JK Flip Flop does not the invalid input states of the RS Latch
(when S and R are both 1). The basic symbol of the JK Flip Flop is shown below:
 takes place. Thus, to prevent
this invalid condition, a clock circuit is introduced. The JK Flip Flop has four possible input combinations

The circuit diagram of the JK Flip Flop is shown in the figure below:

The S and R inputs of the RS bistable have been replaced by the two inputs called the J and K input
respectively. Here J = S and K = R. The two-input AND gates of the RS flip-flop are replaced by the two 3
-
coupling of the RS Flip-Flop is used to produce toggle action.

I) T (Toggle) Flip Flop

T flip f
flop, we should provide only one input to the flip flop called Trigger input or Toggle input (T). Then
the flip t to complement of
The logic symbol of T flip flop is shown below. It has one Toggle input (T) &
one clock signal input (CLK).

CLK T Qn+1
0 × Qn ( Memory )
1 0 Qn ( Memory )
1 1 ( Toggle)

Applications
1) Frequency Division Circuits.
2) 2 Bit Parallel Load Registers
 J) Triggering method of flip-flop-
There are mainly two types of pulse-triggering methods. They differ in the manner in which the
electronic circuits respond to the pulse. They are
i) Level Triggering
ii) Edge Triggering
i) Level Triggering: a) High Level Triggering - When a flip flop is required to respond at its HIGH state, a
HIGH level triggering method is used. It is mainly identified from the straight lead from the clock input.
The symbolic representation is as shown in fig below.

b) Low Level Triggering - When a flip flop is required to respond at its LOW state, a LOW level triggering
method is used. It is mainly identified from the clock input lead along with a low state indicator bubble.

ii) Edge Triggering

a) Positive edge triggering - When a flip flop is required to respond at a LOW to HIGH transition state,
POSITIVE edge triggering method is used. It is mainly identified from the clock input lead along with a
triangle.

b) Negative edge triggering - When a flip flop is required to respond during the HIGH to LOW transition
state, a NEGATIVE edge triggering method is used.. It is mainly identified from the clock input lead along
with a low-state indicator and a triangle.
 K) Counter
Counter is a sequential circuit. A digital circuit which is used for counting pulses is known counter.
Counter is the widest application of flip-flops. It is a group of flip-flops with a clock signal applied.
Counters are of two types.
1) Asynchronous or ripple counters.
2) Synchronous counters.
1) Asynchronous or ripple counters
If the flip-flops do not receive the same clock signal, then that counter is called as Asynchronous
counter. The output of system clock is applied as clock signal only to first flip-flop. The remaining flip-
flops receive the clock signal from output of its previous stage flip-flop.
2) Synchronous counters
If all the flip-flops receive the same clock signal, then that counter is called as Synchronous counter.

2 bit Asynchronous or ripple counters The logic diagram of a 2-bit ripple up counter is shown in figure.
Logical Diagram Truth Table

The toggle (T) flip-flop are being used. But we can use the JK flip-flop also with J and K connected
permanently to logic 1. External clock is applied to the clock input of flip-flop A and QA output is applied
to the clock input of the next flip-flop i.e. FF-B.
L) Digital Registers

Flip-flop is a 1 bit memory cell which can be used for storing the digital data. To increase the storage
capacity in terms of number of bits, we have to use a group of flip-flop. Such a group of flip-flop is
known as a Register.
Depending on how the input is given and how output is retrieved, there are four modes of operation of
a shift register.
1) Serial Input Serial Output
2) Serial Input Parallel Output
3) Parallel Input Serial Output
4) Parallel Input Parallel Output
Shift Registers - Data Movement
The bits in a shift register can move in any of the following manners.

1) Serial Input Serial Output

In "Serial Input Serial Output", the data is shifted "IN" or "OUT" serially. In SISO, a single bit is shifted at a
time in either right or left direction under clock control.

2) Serial Input Parallel Output -

In the "Serial IN Parallel OUT" shift register, the data is passed serially to the flip flop, and outputs are
fetched in a parallel way.

3) Parallel Input Serial Output -

In the "Parallel IN Serial OUT" register, the data is entered in a parallel way and the outcome comes
serially (one bit at a time).

4) Parallel Input Parallel Output

In "Parallel IN Parallel OUT", the inputs and the outputs come in a parallel way in the register.
4-bit Shift Register Animation -
Let us assume that we need to load the 4-bit register with binary 0 0 0 1. Then we should feed binary 1
on the first leading edge of the clock pulse, binary 0 on the second leading edge, binary 0 on the third
leading edge, and finally binary 0 on the fourth leading edge.
Shift Registers Serial in Serial out (SISO)
The shift register, which allows serial input (one bit after the other through a single data line) and
produces a serial output, is known as Serial-In Serial-Out shift register. The circuit consists of four D flip-
flops which are connected in a serial manner. All these flip-flops are synchronous with each other since
the same clock signal is applied to each flip flop.

Let all the flip-flops be initially in the reset condition i.e. Q3 = Q2 = Q1 = Q0 = 0. If an entry of a four-bit
binary number 1 1 1 1 is made into the register, this number should be applied to Din bit with the LSB bit
applied first. The D input of FF-3 i.e. D3 is connected to serial data input Din. The output of FF-3 i.e. Q3 is
connected to the input of the next flip-flop i.e. D2, and so on.
Parallel In Serial out (PISO)
Introduction -
Data bits enter in a parallel fashion.
The circuit, shown below, is a four-bit parallel-in serial-out register.
Output of the previous flip Flop is connected to the input of the next one via a combinational
circuit.
The binary input data bits B0, B1, B2, and B3 are applied through the same combinational logic
circuit.
Application
Shift registers are sequential circuits used primarily used for:
Storage of Data
Data transfer through movement of binary data
Data manipulation
Counter implementation

Serial-In Parallel-Out shift Register (SIPO)

The shift register, which allows serial input (one bit after the other through a single data line) and
produces a parallel output, is known as Serial-In Parallel-Out shift register.
The above circuit is an example of shift right register, taking the serial data input from the left side of the
flip flop and producing a parallel output. They are used in communication lines where demultiplexing of
a data line into several parallel lines is required.
4-bit Parallel-in to Serial-out Shift Register:
The data is loaded into the register in a parallel format in which all the data bits enter their inputs
simultaneously, to the parallel input pins PA to PD of the register. The data is then read out sequentially
in the normal shift-right mode from the register at Q representing the data present at PA to PD. This
data is outputted one bit at a time on each clock cycle in a serial format.
Parallel-in to Parallel-out (PIPO) Shift Register
The final mode of operation is the Parallel-in to Parallel-out Shift Register. This type of shift register also
acts as a temporary storage device or as a time delay device similar to the SISO configuration above. The
data is presented in a parallel format to the parallel input pins PA to PD and then transferred together
directly to their respective output pins QA to QD by the same clock pulse. Then one clock pulse loads
and unloads the register.

Ring Counter
A ring counter is a special type of application of the Serial IN Serial OUT Shift register. The only
difference between the shift register and the ring counter is that the last flip flop outcome is taken as
the output in the shift register. But in the ring counter, this outcome is passed to the first flip flop as an
input. All of the remaining things in the ring counter are the same as the shift register.
In the Ring counter
No. of states in Ring counter = No. of flip-flop used
Below is the block diagram of the 4-bit ring counter. Here, we use 4 D flip flops. The same clock pulse is
passed to the clock input of all the flip flops as a synchronous counter. The Overriding input (ORI) is used
to design this circuit.
The Overriding input is used as clear and pre-set.
The output is 1 when the pre-set set to 0. The output is 0 when the clear set to 0. Both PR and CLR
always work in value 0 because they are active low signals.
PR = 0, Q = 1
CLR = 0, Q = 0
Working
The ORI input is passed to the PR input of the first flip flop, i.e., FF-0, and it is also passed to the clear
input of the remaining three flip flops, i.e., FF-1, FF-2, and FF-3. The pre-set input set to 0 for the first flip
flop. So, the output of the first flip flop is one, and the outputs of the remaining flip flops are 0. The
output of the first flip flop is used to form the ring in the ring counter and referred to as Pre-set 1.

---------------------VVVVVIIIII PPPPPEEEEEBBBBBHHHHH