ARBA MINCH UNIVERSITY

FACULTY OF COMPUTING AND SOFTWARE ENGINEERING

DEPARTMENT OF SOFTWARE ENGINEERING

Microprocessor and Assembly Language

Group Assignment

Group members name ID No.

1. Eden Mekonnen NSR/303/15

2. Elsa Shiferaw NSR/321/15

3. Hawi Degefa NSR/474/15

4. Kidist Endashaw NSR/569/15

5. Lidiya Iyasu NSR/597/15

6. Mariamawit Nejib NSR/615/15

7. Roza Nega NSR/799/15

8. Shalom Alemayehu NSR/846/15

Submitted To: Instructor Ammanuel B.

Submision Date : 09/05/2017 E.C

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Various instruction of8086 and how 8086 work 3

Various control instruction 9

Various addressing mode of 8086 12

difference between 8087 lintel-co-processors and 8086 16

microprocessors
19
functon of ready,ale,hold,den
reset pins of 8086 23

the 80x86 family of cpu's 25

comparing 8085,8086,8088 32

meaning of interrupt in hardware and soft 37

ware
39
type of hardware interrupt
type of software 41
interrupt
purpose of using directiVites 45

difference between immediate and indirect instruction 48

how pass by Value work 56

how pass by reference 58

work
how pass by Value- returned 60
work
62
how pass by name work

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 1.List various Instructions of 8086 and write how

they are working.

Introduction
The 8086 microprocessor, a key player in the development of modern computing,
features a rich set of instructions that facilitate a wide range of operations. These
instructions can be categorized into various groups, including data transfer,
arithmetic, bit manipulation, processor control, Iteration control, interrupt and
string manipulation instructions. Each category serves a specific purpose, allowing
programmers to efficiently manage data and execute complex tasks.

Understanding how these instructions work is essential for anyone looking to

delve into low-level programming or computer architecture. For instance, data
transfer instructions enable the movement of data between registers, memory,
and I/O ports, while arithmetic and logical instructions perform fundamental
mathematical and logical operations. Control instructions manage the flow of
execution, and string instructions handle operations on sequences of characters.

This article will explore the various instructions of the 8086 microprocessor in
detail, examining their functionality and providing insights into how they
contribute to the overall performance of computing systems.

The 8086 microprocessor supports 8 types of instructions −

 Data Transfer Instructions

 Arithmetic Instructions
 Bit Manipulation Instructions
 String Instructions
 Program Execution Transfer Instructions (Branch & Loop Instructions)
 Processor Control Instructions
 Iteration Control Instructions
 Interrupt Instructions

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 Data Transfer Instructions

These instructions are used to transfer the data from the source operand to the
destination operand. Following are the list of instructions under this group

Instruction to transfer a word

 MOV − Used to copy the byte or word from the provided source to the provided
destination.
 PPUSH − Used to put a word at the top of the stack.
 POP − Used to get a word from the top of the stack to the provided location.
 PUSHA − Used to put all the registers into the stack.
 POPA − Used to get words from the stack to all registers.
 XCHG − Used to exchange the data from two locations.
 XLAT − Used to translate a byte in AL using a table in the memory.

Instructions for input and output port transfer

 IN − Used to read a byte or word from the provided port to the accumulator.
 OUT − Used to send out a byte or word from the accumulator to the provided
port.

Instructions to transfer the address

 LEA − Used to load the address of operand into the provided register.
 LDS − Used to load DS register and other provided register from the memory
 LES − Used to load ES register and other provided register from the memory.
Instructions to transfer flag registers

 LAHF − Used to load AH with the low byte of the flag register.
 SAHF − Used to store AH register to low byte of the flag register.
 PUSHF − Used to copy the flag register at the top of the stack.
 POPF − Used to copy a word at the top of the stack to the flag register.

Arithmetic Instructions

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 These instructions are used to perform arithmetic operations like addition,
subtraction, multiplication, division, etc.Following is the list of instructions under
this group

Instructions to perform addition

 ADD − Used to add the provided byte to byte/word to word.
 ADC − Used to add with carry.
 INC − Used to increment the provided byte/word by 1.
 AAA − Used to adjust ASCII after addition.
 DAA − Used to adjust the decimal after the addition/subtraction operation.

Instructions to perform subtraction

 SUB − Used to subtract the byte from byte/word from word.
 SBB − Used to perform subtraction with borrow.
 DEC − Used to decrement the provided byte/word by 1.
 NPG − Used to negate each bit of the provided byte/word and add 1/2’s
complement.
 CMP − Used to compare 2 provided byte/word.
 AAS − Used to adjust ASCII codes after subtraction.
 DAS − Used to adjust decimal after subtraction.

Instruction to perform multiplication

 MUL − Used to multiply unsigned byte by byte/word by word.
 IMUL − Used to multiply signed byte by byte/word by word.
 AAM − Used to adjust ASCII codes after multiplication.

Instructions to perform division

 DIV − Used to divide the unsigned word by byte or unsigned double word by word.
 IDIV − Used to divide the signed word by byte or signed double word by word.
 AAD − Used to adjust ASCII codes after division.
 CBW − Used to fill the upper byte of the word with the copies of sign bit of the
lower byte.
 CWD − Used to fill the upper word of the double word with the sign bit of the
lower word.

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 Bit Manipulation Instructions

These instructions are used to perform operations where data bits are involved,
i.e. operations like logical, shift, etc.Following is the list of instructions under this
group

Instructions to perform logical operation

 NOT − Used to invert each bit of a byte or word.
 AND − Used for adding each bit in a byte/word with the corresponding bit in
another byte/word.
 OR − Used to multiply each bit in a byte/word with the corresponding bit in
another byte/word.
 XOR − Used to perform Exclusive-OR operation over each bit in a byte/word with
the corresponding bit in another byte/word.
 TEST − Used to add operands to update flags, without affecting operands.

Instructions to perform shift operations

 SHL/SAL − Used to shift bits of a byte/word towards left and put zero(S) in LSBs.
 SHR − Used to shift bits of a byte/word towards the right and put zero(S) in MSBs.
 SAR − Used to shift bits of a byte/word towards the right and copy the old MSB
into the new MSB.

Instructions to perform rotate operations

 ROL − Used to rotate bits of byte/word towards the left, i.e. MSB to LSB and to
Carry Flag [CF].
 ROR − Used to rotate bits of byte/word towards the right, i.e. LSB to MSB and to
Carry Flag [CF].
 RCR − Used to rotate bits of byte/word towards the right, i.e. LSB to CF and CF to
MSB.
 RCL − Used to rotate bits of byte/word towards the left, i.e. MSB to CF and CF to
LSB.

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 String Instructions

String is a group of bytes/words and their memory is always allocated in a

sequential order. Following is the list of instructions under this group

 REP − Used to repeat the given instruction till CX ≠ 0.

 REPE/REPZ − Used to repeat the given instruction until CX = 0 or zero flag ZF = 1.
 REPNE/REPNZ − Used to repeat the given instruction until CX = 0 or zero flag ZF =
1.
 MOVS/MOVSB/MOVSW − Used to move the byte/word from one string to
another.
 COMS/COMPSB/COMPSW − Used to compare two string bytes/words.
 INS/INSB/INSW − Used as an input string/byte/word from the I/O port to the
provided memory location.
 OUTS/OUTSB/OUTSW − Used as an output string/byte/word from the provided
memory location to the I/O port.
 SCAS/SCASB/SCASW − Used to scan a string and compare its byte with a byte in
AL or string word with a word in AX.
 LODS/LODSB/LODSW − Used to store the string byte into AL or string word into
AX.

Program Execution Transfer Instructions (Branch

and Loop Instructions)

These instructions are used to transfer/branch the instructions during an

execution. It includes the following instructions

Instructions to transfer the instruction during an execution without any

condition

 CALL − Used to call a procedure and save their return address to the stack.
 RET − Used to return from the procedure to the main program.
 JMP − Used to jump to the provided address to proceed to the next instruction.

Instructions to transfer the instruction during an execution with some

conditions

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 JA/JNBE − Used to jump if above/not below/equal instruction satisfies.
 JAE/JNB − Used to jump if above/not below instruction satisfies.
 JBE/JNA − Used to jump if below/equal/ not above instruction satisfies.
 JC − Used to jump if carry flag CF = 1
 JE/JZ − Used to jump if equal/zero flag ZF = 1
 JG/JNLE − Used to jump if greater/not less than/equal instruction satisfies.
 JGE/JNL − Used to jump if greater than/equal/not less than instruction satisfies.
 JL/JNGE − Used to jump if less than/not greater than/equal instruction satisfies.
 JLE/JNG − Used to jump if less than/equal/if not greater than instruction satisfies.
 JNC − Used to jump if no carry flag (CF = 0)
 JNE/JNZ − Used to jump if not equal/zero flag ZF = 0
 JNO − Used to jump if no overflow flag OF = 0
 JNP/JPO − Used to jump if not parity/parity odd PF = 0
 JNS − Used to jump if not sign SF = 0
 JO − Used to jump if overflow flag OF = 1
 JP/JPE − Used to jump if parity/parity even PF = 1
 JS − Used to jump if sign flag SF = 1

Processor Control Instructions

These instructions are used to control the processor action by setting/resetting

the flag values. Following are the instructions under this group −

 STC − Used to set carry flag CF to 1

 CLC − Used to clear/reset carry flag CF to 0
 CMC − Used to put complement at the state of carry flag CF.
 STD − Used to set the direction flag DF to 1
 CLD − Used to clear/reset the direction flag DF to 0
 STI − Used to set the interrupt enable flag to 1, i.e., enable INTR input.
 CLI − Used to clear the interrupt enable flag to 0, i.e., disable INTR input.

Iteration Control Instructions

These instructions are used to execute the given instructions for number of times.
Following is the list of instructions under this group

 LOOP −Used to loop a group of instructions until the condition satisfies, i.e.,CX = 0

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 LOOPE/LOOPZ − Used to loop a group of instructions till it satisfies ZF = 1 & CX = 0
 LOOPNE/LOOPNZ -Used to loop a group of instructions till it satisfies ZF=0&CX = 0
 JCXZ − Used to jump to the provided address if CX = 0

Interrupt Instructions

These instructions are used to call the interrupt during program execution.

 INT − Used to interrupt the program during execution and calling service specified.
 INTO − Used to interrupt the program during execution if OF = 1
 IRET − Used to return from interrupt service to the main program

Conclusion
The Intel 8086 microprocessor's instruction set is a fundamental aspect of its
architecture, enabling a wide range of operations essential for programming and
system control. By categorizing instructions into different instructions and the
8086 provides a versatile toolkit for developers. Each category of instructions
plays a crucial role in managing data flow, performing calculations, manipulating
bits, and controlling program execution. For instance, data transfer instructions
facilitate seamless movement of information between various components of the
system, while arithmetic instructions allow for complex mathematical operations.
Bit manipulation instructions enable efficient data processing at the binary level,
which is critical for optimizing performance. Understanding these instructions
empowers programmers to write efficient assembly language code and leverage
the full capabilities of the 8086 microprocessor. As a cornerstone of early
computing technology, the 8086 not only paved the way for subsequent
processors in the x86 family but also established foundational principles that
continue to influence modern computing architecture.

2.Explain Various Control Instructions.

Introduction

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Control instructions in the Intel 8086 microprocessor are essential for managing
the flow of execution within a program. These instructions allow programmers to
alter the sequence of instruction execution based on specific conditions or events,
enabling the implementation of complex logic and control structures. By utilizing
these instructions, developers can create loops, conditional branches, and
procedure calls, which are fundamental to structured programming. The 8086
architecture provides a variety of control instructions that can be categorized into
several types, including unconditional jumps, conditional jumps, procedure calls,
and processor control instructions. Each type serves a distinct purpose and plays a
critical role in program execution. Understanding these control instructions is vital
for anyone working with assembly language or seeking to grasp the intricacies of
computer architecture. Control instructions are particularly important because
they enable dynamic program behavior. For example, they allow a program to
make decisions based on user input or the results of previous computations. This
adaptability is crucial for developing efficient software that can handle various
tasks and respond to different scenarios.

Various Control Instructions

1.Unconditional Transfer Instructions:-These instructions

transfer control to a specified address without any conditions:
• CALL: Calls a procedure and saves the return address onto the stack.
Example: CALL SUBROUTINE transfers control to the subroutine labeled
SUBROUTINE.
• RET: Returns control from a procedure to the calling location.
• Example: RET pops the return address from the stack and jumps to it.
• JMP: Jumps unconditionally to a specified address.
• Example: JMP LABEL transfers control to the instruction at LABEL.

1. Conditional Transfer Instructions :- These instructions transfer

control based on specific conditions determined by the status flags:

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• JA/JNBE (Jump if Above/Not Below or Equal): Jumps if the previous
comparison indicates that one value is greater than another.
• JAE/JNB (Jump if Above or Equal/Not Below): Jumps if the previous
comparison indicates that one value is greater than or equal to another.
• JBE/JNA (Jump if Below or Equal/Not Above): Jumps if the previous
comparison indicates that one value is less than or equal to another.
• JC (Jump if Carry): Jumps if the carry flag (CF) is set.
• JE/JZ (Jump if Equal/Zero): Jumps if the zero flag (ZF) is set, indicating
equality.
• JG/JNLE (Jump if Greater/Not Less Than or Equal): Jumps if the
previous comparison indicates that one value is greater than another.
• JGE/JNL (Jump if Greater or Equal/Not Less Than): Jumps if the
previous comparison indicates that one value is greater than or equal to another.
• JL/JNGE (Jump if Less Than/Not Greater Than or Equal): Jumps if the
previous comparison indicates that one value is less than another.
• JLE/JNG (Jump if Less Than or Equal/Not Greater): Jumps if the
previous comparison indicates that one value is less than or equal to another.

2.Processor Control Instructions :- These instructions are

used to manipulate processor flags and control its behavior:
• STC: Sets the carry flag (CF) to 1.
• CLC: Clears the carry flag (CF) to 0.
• CMC: Complements the state of the carry flag (CF).
• STD: Sets the direction flag (DF) to 1, indicating that string operations should
decrement addresses.
• CLD: Clears the direction flag (DF) to 0, indicating that string operations should
increment addresses.
• STI: Sets the interrupt enable flag, allowing interrupts.
• CLI: Clears the interrupt enable flag, disabling interrupts.

3.Iteration Control Instructions :- These instructions

facilitate looping constructs in programs:
• LOOP: Decrements CX and continues looping until CX becomes zero.

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• Example: LOOP LABEL will loop back to LABEL until CX = 0.
• LOOPE/LOOPZ: Loops while CX is not zero and ZF = 1 (zero flag).
• LOOPNE/LOOPNZ: Loops while CX is not zero and ZF = 0.
• JCXZ: Jumps to a specified address if CX = 0.

Conclusion
Control instructions in the Intel 8086 microprocessor are essential for managing
program execution flow. They enable developers to implement complex decision-
making processes through conditional branching and looping constructs. By
understanding how these instructions function—ranging from unconditional
jumps and procedure calls to conditional transfers based on processor flags—
programmers can create efficient and effective assembly language programs.
These control instructions not only enhance program logic but also allow for
better resource management within computing systems. As such, mastering these
instructions is essential for anyone looking to work closely with low-level
programming or computer architecture, providing a strong foundation for
understanding more advanced concepts in modern computing system.

3.Explain various Addressing modes of 8086.

Introduction
The 8086 microprocessor, released by Intel in 1978, revolutionized the world of
computing with its powerful performance and versatile capabilities. One of the
key components that contributed to its success was its addressing modes, which
allowed for efficient and flexible handling of memory operations. Addressing
modes refer to the methods used by a processor to access data or operands from
various memory locations. In this essay, we will explore the various addressing
modes implemented in the 8086 microprocessor and how they contribute to its
efficient functioning. Understanding these addressing modes is crucial for
programmers and developers in optimizing their code and harnessing the full

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potential of this groundbreaking microprocessor. So let us delve into the world of
8086 addressing modes and unravel their significance in the realm of computing.

The 8086 is a widely used microprocessor that forms the basis of many computer
systems today. One of its key features is its ability to access and manipulate data
in different ways through addressing modes. These addressing modes allow the
processor to retrieve data from various sources, such as memory or registers, and
perform operations on them. In this essay, we will delve into the various
addressing modes of the 8086 and understand how they contribute to the
versatility and efficiency of this processor. By the end of this discourse, you will
have a comprehensive understanding of how these addressing modes work and
their significance in enhancing the capabilities of the 8086 microprocessor. So let
us dive in and explore the world of addressing modes in 8086.

Addressing Modes of the 8086 Microprocessor

The 8086 microprocessor employs various addressing modes that dictate how the
operands of instructions are specified and accessed. Understanding these modes
is crucial for efficient assembly language programming, as they affect how data is
retrieved and manipulated in memory.

Types of Addressing Modes

1. Immediate Addressing Mode:- The operand is specified directly within the

instruction, eliminating the need for a separate memory reference. In this mode,
the operand is embedded in the instruction, allowing for quick access to constant
values.

Example: MOV AX, 5H (where 5H is the immediate data).

Usage: Useful for loading constants directly into registers.

2. Direct Addressing Mode:- The effective address of the operand is given

explicitly in the instruction,This means that the instruction contains the actual

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memory address from which data will be retrieved or to which data will be
written, allowing for quick and straightforward access.

Example: MOV AX, [5000H] (here, 5000H is the address in memory).

Usage: Directly accesses a specific memory location.

3. Register Addressing Mode:- Both operands are located in registers, the

instruction directly specifies which register contains the data to be operated on,
allowing for fast access since no memory reference is required.

Example: MOV AX, BX (moves data from register BX to AX).

Usage: Fast access since it uses CPU registers.

4. Register Indirect Addressing Mode:- The address of the operand is stored in a

register rather than being specified directly in the instruction. In this mode, the
instruction references a register that contains the memory address where the
actual data (operand) resides.The effective address of the operand is held in a
register (BX, BP, SI, or DI).

Example: MOV AX, [BX] (the address in BX points to the data).

Usage: Allows flexible access to memory locations.

5. Indexed Addressing Mode:- The effective address is determined by adding an

index register to a base address, This mode is particularly useful for accessing
elements in data structures like arrays, as it allows for flexible memory access.

Example: MOV AX, [SI] (where SI holds the offset).

Usage: Commonly used for accessing array elements.

6. Register Relative Addressing Mode:- Combines a base register with a

displacement value to form an effective address,the effective address of the
operand is calculated by adding a displacement value (immediate value) to the
contents of a register, typically a base register. This allows for flexible memory

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access, as the operand's address can be dynamically determined based on the
current value of the register plus an offset specified in the instruction.

Example: MOV AX, 50H[BX] (where BX provides the base and 50H is the
displacement).

Usage: Useful for accessing data structures with fixed offsets.

7. Based Indexed Addressing Mode:- The effective address is computed by

adding a base register and an index register.

Example: MOV AX, [BX][SI].

Usage: Efficient for accessing complex data structures.

8. Relative Based Indexed Addressing Mode:- Combines a displacement with the

sum of a base register and an index register to form an effective address.This
mode allows for flexible access to memory locations, particularly useful for data
structures like arrays.

Example: MOV AX, 50H[BX][SI].

Usage: Provides flexibility for accessing elements in data structures with offsets.

Importance of Addressing Modes

Addressing modes are fundamental in assembly language programming as they

define how instructions access data. The choice of addressing mode can
significantly impact program efficiency and performance. For instance, using
registers tends to be faster than accessing memory directly due to lower latency.
Additionally, understanding these modes helps programmers write more
optimized and maintainable code by leveraging the architecture's capabilities
effectively.

Conclusion
The addressing modes of the 8086 microprocessor are crucial for determining
how data is accessed and manipulated within instructions, significantly impacting

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program efficiency and flexibility. By utilizing various modes such as immediate,
direct, register, and indexed addressing, programmers can optimize their code for
performance, allowing for faster data retrieval and manipulation. Each mode
serves a specific purpose, enabling efficient handling of operands whether they
are constants, memory addresses, or stored in registers. Understanding these
addressing modes is essential for effective assembly language programming and
leveraging the full capabilities of the 8086 architecture.

4.Write the difference between 8087 Intel-co

processor and 8086 microprocessors?

Introduction

The Intel 8086 microprocessor and the 8087 coprocessor represent significant
advancements in computing technology, each serving distinct yet complementary
roles within a computer system. The 8086 is a general-purpose 16-bit
microprocessor designed to handle a wide array of computing tasks, including
integer arithmetic and control operations. In contrast, the 8087 is a specialized
floating-point coprocessor that enhances the capabilities of the 8086 by
performing complex arithmetic operations involving real numbers. This distinction
allows for improved performance in applications requiring extensive
mathematical computations. Understanding the differences between these two
processors is crucial for grasping their respective functionalities and contributions
to early computing architectures, as well as their impact on software
development and system design.

What is 8087 Intel-co processor?

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The Intel 8087 is a floating-point coprocessor designed to work alongside the
8086 and 8088 microprocessors, introduced by Intel in 1980. Its primary function
is to accelerate floating-point arithmetic operations, including addition,
subtraction, multiplication, division, and square root, as well as transcendental
functions such as trigonometric and logarithmic calculations. The 8087
significantly enhances performance, achieving speed improvements ranging from
approximately 20% to over 500% compared to software-based calculations. It
operates using a modified stack architecture and features an instruction set that
includes about 60 specialized commands, identifiable by the prefix 'F' for floating-
point operations. This coprocessor allows for concurrent execution of instructions,
enabling the main CPU to perform integer operations while the 8087 handles
floating-point calculations, thereby improving overall system throughput.

The Intel 8087 coprocessor can be classified based on its functionality and the
types of data it processes. Here are the main classifications:

1. Numeric Data Processor (NDP): The 8087 is primarily known as a

numeric data processor, designed to handle arithmetic operations involving
numeric data types efficiently.
2. Math Coprocessor: It serves as a math coprocessor, working alongside
the 8086/8088 microprocessors to perform complex mathematical
calculations, thereby enhancing overall computational speed.
3. Floating Point Unit (FPU): The 8087 functions as a floating point unit,
specifically designed to execute floating-point arithmetic operations such as
addition, subtraction, multiplication, and division with high precision and
speed.
4. Data Types Supported:
• Binary Integers: Supports various integer formats including word (16-bit),
short (32-bit), and long integers (64-bit).
• Packed Decimal Numbers: Handles BCD (Binary-Coded Decimal) formats
for decimal calculations.
• Real Numbers: Processes different types of real numbers, including short
real (32-bit), long real (64-bit), and temporary real (80-bit) formats.

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These classifications highlight the 8087's role in enhancing computational
capabilities, particularly in scientific and engineering applications, by providing
dedicated support for complex numeric calculations

The differences between the Intel 8086 microprocessor and the 8087
and the 8087microprocessors .

8086 Microprocessor 8087 Coprocessor

Functionality -A general-purpose 16- - A dedicated floating-point
t microprocessor designed coprocessor that enhances the
perform a wide range of capabilities of the 8086 by
omputing tasks, including performing complex floating-
ithmetic and logic point arithmetic operations, such
perations. as addition, subtraction,
multiplication, and division.

Architecture -Acts as the main CPU, - Functions as a supplementary

handling all types of data processor that works alongside
processing and control the 8086, specifically for floating-
tasks. point calculations, effectively
appearing as an extension of the
8086's instruction set.
Performance -Performs integer - Significantly accelerates
operations but can be floating-point operations, often
slower in executing achieving speeds several times
floating-point arithmetic faster than the 8086 could with
due to its reliance on software-based calculations.
software routines
Integration - Operates independently - Requires integration with the
and does not require a 8086 system; it connects through
coprocessor for basic a dedicated socket on the
functionality motherboard and relies on
specific escape instructions to
execute its floating-point
operations.

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Instruction Set - Contains a general - Introduces additional
instruction set for various instructions specifically for
operations, including floating-point arithmetic, which
integer arithmetic. are not available in the 8086
instruction set

Conclusion
The differences between the Intel 8086 microprocessor and the 8087 coprocessor
highlight their distinct roles in a computing system. The 8086 serves as a general-
purpose microprocessor capable of handling a variety of tasks, including integer
arithmetic and control operations, while the 8087 is a specialized floating-point
coprocessor designed to accelerate complex mathematical calculations involving
real numbers. The 8086 operates independently, executing general instructions,
whereas the 8087 functions in tandem with the 8086, executing its own set of
floating-point instructions that enhance overall performance.The 8087
significantly improves the speed of floating-point arithmetic, achieving
performance enhancements that can be up to 100 times faster than software-
based calculations executed by the 8086. Additionally, the 8087 introduces a
dedicated instruction set for floating-point operations, which is not present in the
8086. Together, they enable more sophisticated computations, particularly
beneficial in scientific and engineering applications. Understanding these
differences is essential for grasping how these processors complement each other
to enhance computing capabilities.

5.What are the function of Ready, ALE, HOLD,

and RESET pins of 8086 microprocessor?

Introduction

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The 8086 microprocessor, a cornerstone of early computing, relies on a set of
control pins to manage its interactions with external devices and memory. Among
these, the READY, ALE (Address Latch Enable), HOLD, and RESET pins play crucial
roles in ensuring proper synchronization, data transfer, and system initialization.
These pins are not merely electrical connections; they are the communication
channels through which the 8086 coordinates its operations with the rest of the
system. Understanding the function of each of these pins is essential for anyone
working with or studying the 8086 architecture. This document will provide a
detailed explanation of the purpose and operation of the READY, ALE, HOLD, and
RESET pins, highlighting their significance in the overall functioning of the 8086
microprocessor.

READY Pin (Synchronization with Slower Devices):

Function

The READY pin (often also called RDY or WAIT) is an input signal on the 8086 used
to synchronize the microprocessor's operation with the speed of external devices,
primarily memory and I/O peripherals. It's a critical component of the 8086's
handshaking mechanism.

Need for Synchronization

The 8086 can operate at a high clock speed, much faster than many external
components, especially older memory chips and peripherals. If the 8086 tries to
read data from a slow memory location before the data is actually available, or
tries to write data to a slow peripheral before it's ready to receive it, errors will
occur.

The READY pin addresses this by allowing slower devices to signal to the 8086
that they are not ready for a read or write operation.

How It Works (Active Low)

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 Default State (High): Normally, the READY pin is held in a high state. This
indicates that the external devices are operating at a compatible speed, and the
8086 can proceed with read and write operations at its normal pace.
Slow Device (Low): When the 8086 initiates a memory or I/O cycle that targets a
slow device, the device (or an associated interface circuit) pulls the READY line
low.
Wait States Introduced A low signal on the READY input forces the 8086 into
wait states. During a wait state:
* The 8086 essentially pauses the current bus cycle.
* The CPU clock continues to run, but the internal state of the CPU remains
unchanged.
* The CPU effectively waits and does nothing except continue monitoring
the READY pin.
Device Ready (High Again): Once the slow device is ready (e.g., the memory
has retrieved the requested data, the peripheral has processed the command),
the device releases the READY line, allowing it to return to a high state.
Cycle Completion: The 8086 detects the high state on the READY pin and
completes the interrupted memory or I/O cycle.

Significance

The READY pin ensures that the 8086 can function correctly with a wide range of
devices that operate at different speeds. It avoids data corruption and timing
errors that would otherwise occur. Without it, the system would either need to
use only very fast peripherals or would be extremely unreliable.

ALE (Address Latch Enable) Pin (Address

Demultiplexing):

Function

The ALE pin is an output signal that is critical for systems using the 8086 in
minimum mode, where the address and data buses are multiplexed (shared on
the same pins). ALE provides the crucial timing signal needed to separate
(demultiplex) the address from the address/data bus.

20
Multiplexed Address/Data Bus

• The 8086 in minimum mode uses the same pins (AD0-AD15) for both address
information during the first part of a bus cycle, and for data during the second
part of the cycle. This multiplexing saves pins on the chip itself, but it adds
complexity to external circuitry.
• Without a way to capture the address, it would be lost when the bus
switches to transmitting data.

How It Works (Pulse)

Beginning of Cycle: At the beginning of a memory or I/O bus cycle, the 8086
places the 20-bit address onto the multiplexed address/data bus (AD0-AD15, and
address lines A16-A19). Simultaneously, the 8086 asserts the ALE signal (makes it
high).
ALE Pulse: The ALE signal is a short pulse. The rising edge of this pulse signals the
external address latches to capture and hold the current address available on the
bus.
Address Latched: External address latches (typically 74LS373 devices) are
connected to the AD0-AD15 pins, and their clock inputs are connec

Data Transmission: Once the address has been latched, the 8086 removes the
address from the AD0-AD15 pins and prepares to transfer data on the same lines.
The address, however, remains valid in the external latches, allowing memory or
peripherals to use it.

Significance

ALE enables the 8086 to share address and data lines efficiently, reducing the
overall pin count required for the chip, making it cost-effective, and reducing the
complexity of the system. Without ALE and external latches, the address
information would be lost.

HOLD Pin (Direct Memory Access - DMA):

Function

21
 The HOLD pin is an input signal that allows external devices, particularly DMA
controllers, to request control of the system bus for high-speed data transfers
directly between memory and peripherals. The HOLD mechanism supports DMA
(Direct Memory Access).

Need for DMA

When data needs to be transferred in large blocks between memory and
peripherals (e.g., disk drives, network cards), using the CPU to move each byte or
word can be very slow and inefficient.

• DMA controllers can transfer data directly without continuous CPU

intervention. This frees the CPU to perform other tasks and improves system
performance.

How It Works (Request and Acknowledge)

DMA Request: When a DMA controller needs to access memory, it asserts the
HOLD pin high, effectively asking the 8086 for control of the bus.
Bus Release by 8086: Upon receiving the HOLD request:
* The 8086 completes the current memory or I/O bus cycle.

* The 8086 floats its address, data, and control lines (puts them into a high-
impedance state, effectively disconnecting them from the bus), giving the DMA
controller access.
* The 8086 asserts the HLDA (Hold Acknowledge) signal (an output pin on
the 8086) high. This HLDA signal indicates to the DMA controller that the bus is
available.
DMA Transfers: The DMA controller now takes control of the system bus, uses
the address, data, and control lines to perform direct transfers between memory
and the peripheral.
Bus Return: Once the DMA transfers are complete, the DMA controller releases
HOLD (makes it low).
8086 Regains Control: The 8086 detects the low state of HOLD, de-asserts the
HLDA pin, and regains control of the system bus and continues its tasks.

Significance

22
 The HOLD/HLDA mechanism allows for high-speed data transfer, enabling more
efficient system operation by avoiding CPU intervention for large data
movements. Without this, DMA transfers wouldn't be possible, severely limiting
the system's performance.

RESET Pin (System Initialization):

Function

The RESET pin is an input signal that is used to initialize (reset) the 8086
microprocessor to a known starting state. It's an active-high signal.

Need for Reset

• A system needs to be initialized when first powered on, to bring it to a

known state where it can reliably start executing instructions.
• A reset is also needed if the system encounters errors, gets stuck, or behaves
unexpectedly.

How It Works (Active High)

• Asserting RESET (High): When the RESET pin is driven high (by an external
reset circuit), the 8086 immediately:
* Halts all ongoing operations.
* Clears the internal registers (including the program counter, flags, data
registers).
* Sets the program counter (PC) to a predefined memory address – typically
to 0xFFFF0 in the 8086 architecture (this is part of the top 16 bytes of the 1MB
memory space).
* Puts the output lines into a high-impedance state.
• Releasing RESET (Low): Once the RESET pin is released (goes low), the 8086
fetches the first instruction from the memory location pointed to by its reset
address.

Conclusion

23
The READY, ALE, HOLD, and RESET pins of the 8086 microprocessor are vital for its
proper operation and interaction with external components. The READY pin is
used for synchronizing the microprocessor with slower memory or peripheral
devices, ensuring that data transfers occur correctly. The ALE (Address Latch
Enable) pin is used to demultiplex the address and data lines, allowing the 8086 to
access memory and peripherals efficiently. The HOLD pin is used for direct
memory access (DMA) operations, allowing other devices to take control of the
system bus. Finally, the RESET pin is used to initialize the microprocessor and
bring it to a known starting state. Each of these pins plays a critical role in the
8086's ability to communicate with its environment, manage memory access, and
ensure proper system operation. This document will delve into the specifics of
each pin, explaining their functions and their importance in the overall
architecture of the 8086.

6.Discuss the 80X86 family of CPU’s

Introduction
The 80x86 family of central processing units (CPUs) represents a lineage of
microprocessors that have profoundly shaped the landscape of personal
computing. Beginning with the Intel 8086 in the late 1970s, this family has
evolved through numerous iterations, each introducing architectural
enhancements, increased processing power, and new capabilities. From the early
days of the IBM PC to modern high-performance computing, the 80x86
architecture has remained a dominant force. Understanding the history, evolution,
and key features of the 80x86 family is crucial for anyone studying computer
architecture, operating systems, or the history of computing. This document will
provide an overview of the 80x86 family, tracing its development from its origins
to its current state, highlighting the key innovations and milestones along the way.

24
I.The Genesis: The Intel 8086 (and 8088)

Release: 1978 (8086) and 1979 (8088)

Significance

The 8086 was the first 16-bit microprocessor from Intel and a major leap from
their earlier 8-bit processors. It introduced the x86 instruction set architecture
(ISA) that has been the basis for all subsequent processors in this family.

Key Features

16-bit Architecture: 16-bit registers, 16-bit data bus, but 20-bit address bus
capable of accessing 1 MB of memory.

Segmented Memory Model: The 8086 used a segmented memory model with
16-bit segment registers (CS, DS, ES, SS) to access the full 1MB of address space.
This segmentation, while innovative at the time, led to some programming
complexities.
Instruction Set: The x86 instruction set included instructions for arithmetic,
logic, data movement, branching, and control.

Clock Speeds: Initially around 4.77 MHz to 10 MHz.

8088 Variation: The 8088 was a slightly cheaper variant of the 8086 with an 8-
bit external data bus (though it maintained 16-bit internal processing). This
made it more compatible with existing 8-bit hardware. Famously used in the
original IBM PC.

II. The 80286: Introducing Protected Mode

Release: 1982

Significance

25
 The 80286 (also known as the i286) was a significant upgrade, adding support
for a new "protected mode" of operation.

Key Features

• Protected Mode: Introduced a new mode of operation with several important

features:
* Memory Protection: Could protect memory areas from being accessed by
unauthorized programs, enhancing stability and security.

* 16MB Memory Access: Could address up to 16 MB of physical memory, a

significant jump from the 8086's 1 MB.

* Virtual Memory: Supported a limited form of virtual memory (memory that

is logically larger than the physical memory), by allowing the OS to "swap"
memory from disk.

• Real Mode: The 80286 could also operate in a "real mode" that emulated
the 8086, providing backwards compatibility.

• Clock Speeds: Around 6 MHz to 25 MHz.

• Impact: While the 80286 offered major advances, its protected mode wasn't
fully utilized until later with more advanced operating systems. The need to
switch between Real and Protected modes did cause some compatibility
problems.

III. The 80386: The 32-bit Revolution

Release: 1985

Significance

The 80386 (also known as the i386) was a revolutionary processor that moved
the x86 family into the 32-bit era.
Key Features

26
 • 32-bit Architecture: Introduced 32-bit registers (EAX, EBX, ECX, EDX, ESI, EDI,
ESP, EBP) and a 32-bit data bus, significantly increasing processing power and
memory access.
• Flat 32-bit Memory Model: Protected mode was enhanced to support a 32-
bit flat memory model, allowing easier access to all of the memory and doing
away with segmentation. This greatly simplified programming.
• Paging: Added support for paging, an advanced virtual memory mechanism
that allowed the OS to use even more memory, beyond the physical RAM, as
well as offer greater memory protection and management capabilities.
• Virtual 8086 Mode: Introduced a "virtual 8086 mode," allowing multiple
8086 programs to run simultaneously in a protected manner under the OS.
• Clock Speeds: Around 16 MHz to 40 MHz.
• Impact: The 80386 marked a pivotal moment, making 32-bit software and
operating systems possible for the PC.

IV. The 80486: Integrated Performance

Release: 1989

Significance
The 80486 (also known as i486) improved upon the 80

Key Features

• Integrated Math Coprocessor (FPU): The 80486 included an integrated

floating-point unit (FPU) on the same chip, dramatically speeding up floating-
point calculations.
• Level 1 Cache: Included a small on-chip cache (L1 cache) to reduce memory
latency.
• Enhanced Instruction Pipeline: Improved the processor's ability to execute
instructions quickly.
• Clock Speeds: Around 25 MHz to 100 MHz.
• Impact: The i486 offered a major boost in performance, making it a popular
processor for many years.

V. The Pentium Era (P5, P6, NetBurst):

27
 Release: 1993

Key Features

Superscalar architecture (could execute multiple instructions per cycle), wider

data bus, faster clock speeds, and improved floating point calculations.

Significance
A major leap in performance, and a departure from numerical naming.
Release: 1995
Key Features
Deep pipelining, out-of-order execution, and a focus on performance for 32-bit
code.

Significance
Introduced a new microarchitecture, better handling of complex instructions.
• Pentium II and III (P6 Derivatives):
Release: 1997 (II) and 1999 (III)

Key Features
Integrated Level 2 cache, and Streaming SIMD Extensions (SSE) instruction sets
for multimedia processing.

Significance
Further refinement of the P6 architecture, increasing performance for
applications and multimedia content.
• Pentium 4 (NetBurst):
Release: 2000

Key Features
Increased clock speeds, a very long pipeline, and the SSE2, SSE3 instruction sets.

Significance
While initially promising, the NetBurst architecture eventually became
inefficient due to its deep pipeline, and was replaced with newer architecture.

28
VI. The Core Era (and Beyond): Multi-Core and Power
Efficiency

• Pentium M and Core:

Release: 2003 (Pentium M) and 2006 (Core)

Key Features
Introduction of dual-core processors, significantly improved performance per
watt, and re-focus on power efficiency. These introduced the Core
microarchitecture which had a much shorter pipeline, which helped lower heat
output, and allowed the CPUs to perform more instructions.

Significance
Marked a shift towards multi-core CPUs as a way to increase performance and
efficiency by handling multiple tasks in parallel.

• Modern Core i-Series:

Key Features
Further improvements in power efficiency, integration of advanced graphics
capabilities, and introduction of hyperthreading technology. The i-series is now
the flagship architecture for desktop and laptop Intel processors, including the
i3, i5, i7, and i9 families, each targeted at different segments of the market.
Significance
The i-series maintains high performance, while addressing current performance
and efficiency demands.

• AMD's Contributions: While this focuses on Intel, AMD also made major
contributions, such as the Athlon and Ryzen processors, which compete with
Intel and have significantly shaped the landscape of x86 architecture.

VII. The Transition to 64-bit (x86-64 or AMD64)

29
• AMD's Innovation: AMD was the first to introduce the 64-bit extension to the
x86 architecture, called x86-64 (also known as AMD64). Intel later adopted this
and branded it as EM64T and then Intel 64.
• 64-bit Computing:
* Larger Address Space: 64-bit processors can access a massive 16 exabytes
(16 billion GB) of memory.
* Larger Registers: Introduced 64-bit registers (RAX, RBX, RCX, etc.), allowing
for faster processing of larger data sets.
*Enhanced Performance: The increased data width and address space
significantly enhanced the ability to run demanding software.
* Legacy Support: x86-64 processors maintained backwards compatibility with
32-bit x86 i

VIII. Ongoing Evolution

• Modern CPUs: Modern CPUs are far more complex, including features like:
• Multi-core processing.
• Hyperthreading.
• Advanced cache hierarchies (L1, L2, L3).
• Integrated graphics.
• Advanced power management techniques.
• Specialized instruction sets (AVX, AVX2, AVX-512).

Future

The 80x86 family continues to evolve, adapting to trends such as virtualization,

artificial intelligence, and emerging technologies, with a strong emphasis on
performance, power efficiency, and security.

The 80x86 family of CPUs has come a long way from the original 8086. It has
consistently adapted to changing needs, constantly pushing the boundaries of
performance, and has maintained backwards compatibility while adopting new
technologies. Its long history and ongoing evolution makes it one of the most
influential and widespread processor families in the history of computing. From
the original IBM PC to the powerful servers of today, the x86 architecture has
left an indelible mark on the world.

30
Conclusion
The 80x86 family of CPUs is a diverse and influential group of microprocessors
that have shaped the personal computing industry. Starting with the 8086, a 16-
bit processor, the family expanded to include the 8088, a cost-effective variant,
and then progressed through the 80286, 80386, and 80486, each introducing
significant architectural improvements, such as protected mode and enhanced
memory management. The family then transitioned to the Pentium series, which
brought about further advancements in performance and multimedia capabilities.
The 80x86 architecture continued to evolve with the introduction of 64-bit
extensions, leading to the x86-64 architecture, which is now the standard for
most desktop and server CPUs. This document will explore the key features,
innovations, and historical significance of the major processors within the 80x86
family, providing a comprehensive overview of their evolution and impact on the
computing world.

7. Compare 8085, 8086 and 8088 microprocessors

with each other .

Introduction
The 8085, 8086, and 8088 microprocessors represent significant milestones in the
evolution of computing technology. These chips, developed by Intel, played
pivotal roles in shaping the landscape of early personal computers and embedded
systems. While all three belong to the same family, they differ significantly in their
architecture, capabilities, and intended applications. This document provides a
comparative analysis of these three microprocessors, highlighting their key
features, differences, and historical significance. Understanding these differences
is crucial for appreciating the advancements in microprocessor technology and
their impact on the computing world.

31
 Comparative Analysis of the 8085, 8086, and 8088

Microprocessors

– In terms of Architectural Overview and Data Handling

The fundamental difference between the 8085, 8086, and 8088 lies in their core
architecture, particularly their data bus width and internal processing capabilities.

 8085: The 8-Bit Foundation

• The 8085 is a true 8-bit microprocessor. This means it processes data in 8-bit
chunks, using an 8-bit data bus for data transfer.

• Its 16-bit address bus allows it to access 2^16 = 65,536 (64KB) memory
locations.

• It lacks memory segmentation, addressing memory directly.

• Its instruction set is relatively simple, reflecting its design for basic control and
embedded applications.

• The 8085's architecture is characterized by its simplicity, making it easy to

learn and implement, but also limiting its processing power.

 8086: The 16-Bit Leap

• The 8086 is a 16-bit microprocessor, processing data in 16-bit chunks and

using a 16-bit data bus.

• Its 20-bit address bus allows it to access 2^20 = 1,048,576 (1MB) memory
locations.

• It introduced memory segmentation, a crucial feature that allows it to address

more than 64KB of memory.

• Its instruction set is more powerful and complex than the 8085, enabling more
sophisticated operations.

32
 • The 8086's architecture represents a significant advancement in processing
power and memory addressing capabilities.

 8088: The Cost-Effective Compromise

• The 8088 is internally a 16-bit microprocessor, sharing the same 16-bit

registers and instruction set as the 8086.

• However, it uses an 8-bit external data bus, making it cheaper to implement

and compatible with existing 8-bit systems.

• Its 20-bit address bus allows it to access 1MB of memory, similar to the 8086.

• It also utilizes memory segmentation, allowing it to address more than 64KB of

memory.

• The 8088's architecture is a clever compromise, offering 16-bit processing

power with the cost-effectiveness of an 8-bit external interface.

– In terms of Memory Management and Addressing

Memory management and addressing are critical aspects of microprocessor

architecture, directly impacting the amount of memory that can be accessed and
the efficiency of memory operations.

 8085: Direct Addressing Limitations

• The 8085's 16-bit address bus allows it to directly address 64KB of memory.

• It lacks memory segmentation, meaning that the entire 64KB memory space is
treated as a single contiguous block.

• This limitation restricts the size and complexity of programs that can be run on
the 8085.

 8086: Introduction of Memory Segmentation

• The 8086's 20-bit address bus allows it to access 1MB of memory.

33
 • It introduced memory segmentation, dividing the 1MB memory space into
segments of 64KB each.

• This allows the 8086 to address more than 64KB of memory by using segment
registers (CS, DS, ES, SS) to specify the starting address of each segment.

• Memory segmentation provides a more flexible and efficient way to manage

memory, enabling larger and more complex programs.

 8088: Shared Memory Management with 8086

• The 8088 shares the same 20-bit address bus and memory segmentation
scheme as the 8086, allowing it to access 1MB of memory.

• It also uses segment registers to manage memory segments.

• The 8088's memory management is identical to the 8086, despite its 8-bit
external data bus.

– In terms of Instruction Sets and Processing

Capabilities

The instruction set of a microprocessor determines the range of operations it can

perform, directly impacting its processing capabilities.

 8085: Simple Instruction Set

• The 8085 has a relatively simple instruction set, designed for basic control and
data manipulation tasks.

• It includes instructions for arithmetic operations, logical operations, data

transfer, and control flow.

• Its instruction set is limited compared to the 8086 and 8088, reflecting its
design for simpler applications.

 8086: Powerful and Complex Instruction Set

34
 • The 8086 has a more powerful and complex instruction set than the 8085.

• It includes instructions for more advanced arithmetic operations, string

manipulation, and bit manipulation.

• Its instruction set is designed for more complex applications and provides
greater flexibility and efficiency.

 8088: Shared Instruction Set with 8086

• The 8088 shares the same instruction set as the 8086.

• This means it can execute the same set of instructions as the 8086, providing
the same processing capabilities.

• The only difference is that the 8088 fetches data in 8-bit chunks due to its 8-
bit external data bus, which can impact performance.

– In terms of Applications and Historical Significance

The applications and historical significance of these microprocessors highlight

their impact on the computing world.

 8085: Embedded Systems and Early Control

• The 8085 was widely used in simple embedded systems, industrial control
applications, and early personal computers.

• Its simplicity, low cost, and low power consumption made it suitable for these
applications.

• It played a crucial role in the early development of microprocessor-based

systems.

 8086: Personal Computers and Complex Systems

• The 8086 was used in early personal computers, including the IBM PC, and in
more complex industrial control systems.

35
 • Its 16-bit architecture, larger memory addressing capabilities, and more
powerful instruction set made it suitable for these applications.

• It marked a significant step forward in the development of personal

computing.

 8088: The IBM PC and Widespread Adoption

• The 8088 was used in the original IBM PC, which played a pivotal role in the
widespread adoption of personal computers.

• Its lower cost and compatibility with existing 8-bit systems made it a more
attractive option than the 8086.

• The 8088's success in the IBM PC cemented its place in the history of
computing.

Conclusion
The 8085, 8086, and 8088 microprocessors each occupied a unique niche in the
history of computing. The 8085, an 8-bit processor, was designed for simplicity
and low-cost applications, making it suitable for embedded systems and early
control applications. The 8086, a true 16-bit processor, offered a significant leap
in processing power and memory addressing capabilities, paving the way for more
complex applications and personal computers. The 8088, a cost-effective variant
of the 8086, utilized an 8-bit external data bus while retaining the 16-bit internal
architecture, making it more compatible with existing 8-bit systems and

36
contributing to the widespread adoption of the IBM PC. This document will delve
into the specifics of their architectures, instruction sets, memory management,
and applications, providing a comprehensive comparison of these three
influential microprocessors.

8. What do you mean interrupt in hardware and

software? And List the types of hardware

interrupt and software in 8086.

Introduction to Interrupts
In the realm of computer systems, efficiency and responsiveness are paramount.
A key mechanism that facilitates these qualities is the interrupt. An interrupt is
essentially a signal that temporarily suspends the normal execution of a program
or task to handle a more urgent event or request. Think of it as a way for the
computer to quickly switch its attention to something important without having
to continuously check if it needs to do so. This allows the computer to be both
responsive to real-time events and efficient in using its processing power.
Interrupts are categorized into two primary types: hardware interrupts, which are
triggered by external devices or hardware conditions, and software interrupts,
which are initiated by instructions within a program. Understanding these two
types, especially in the context of processors like the 8086, is fundamental to
understanding how computer systems operate at a low level.

Hardware Interrupts

37
Hardware interrupts are signals generated by external hardware devices, such as
peripherals, to notify the CPU of an event requiring attention. These events can
include:

• I/O operations: Completion of data transfer by a device like a hard drive or

keyboard.

• Timers: Regular pulses from a timer circuit, used for timekeeping or scheduling.

• Hardware errors: Signals from memory or other hardware components

indicating a fault.

• Power failures: A signal indicating an impending power loss.

• External events: A signal from an external input device.

Types Of Hardware Interrupts in 8086

The 8086 has two dedicated pins for handling hardware interrupts:

1. Non-Maskable Interrupt (NMI)

• Pin: The NMI is signaled on the dedicated NMI pin of the 8086 processor.

• Purpose: This interrupt is designed for high-priority, critical events that the
CPU must respond to immediately. These events usually signal a serious or
catastrophic system condition.

• Examples:

* Power Failure: An impending power loss detected by a power monitoring

circuit. This interrupt would be used to initiate a graceful shutdown and save
critical data.

* Memory Parity Errors: Errors detected in memory data due to hardware

malfunctions, requiring immediate attention.

* Bus Errors: Errors on the data or address buses.

38
 • Masking: The key feature of NMI is that it cannot be masked by software. This
means that the interrupt flag (IF) in the 8086's flag register has no effect on it.
When an NMI signal is received, the CPU will interrupt its current operation
regardless of the value of the IF. This ensures that critical system issues are
addressed.

• Vector: The 8086 always uses interrupt type number 2 for NMI, corresponding
to the memory location where its ISR address is stored (0000:0008h). When the
NMI is triggered, the CPU saves the current code address (CS:IP) and flag register
on the stack, and jumps to the address specified at memory location 0000:0008h
to execute the NMI interrupt service routine (ISR).

2. Maskable Interrupt (INTR)

• Pin: The INTR signal is received on the INTR pin of the 8086.

• Purpose: This interrupt is designed for general-purpose interrupts from

peripherals, devices, and other external controllers that may require attention
from the CPU. These requests can be "masked" or ignored by the processor if they
are not urgent.

• Examples:

* Keyboard Input: When a key is pressed on the keyboard, it could trigger an

INTR to notify the CPU.

* Disk I/O: When a disk controller finishes transferring data, it triggers an INTR.

* Timer Interrupts: A timer circuit generating periodic interrupts for

timekeeping and scheduling.

* Network Data Arrival: When data arrives over a network connection, the
network card sends an INTR.

* Printer Ready: When a printer becomes ready to receive data, it can trigger
an INTR.

39
 • Masking: Maskable interrupts can be enabled or disabled by software, using
the interrupt flag (IF) in the 8086's flag register.

* When the IF is set to 1 (using STI instruction – set interrupt flag), the 8086
will acknowledge INTR signals (if the 8086 is not already processing higher-priority
interrupt).

* When IF is reset to 0 (using CLI instruction – clear interrupt flag), the 8086
ignores INTR signals (or defer processing them). This mechanism provides
flexibility and control over how the CPU responds to peripheral devices. The CPU
may defer an INTR if it’s executing a critical section of code.

• External Controller: Typically, the INTR signal is managed by an external

interrupt controller (such as the Intel 8259 Programmable Interrupt Controller
(PIC)). The PIC gathers interrupt requests from multiple devices and then sends a
single INTR signal to the 8086 when an interrupt request needs attention.

• Interrupt Vector: When the 8086 acknowledges the INTR signal, it interacts
with the external interrupt controller, asking for the interrupt type number. The
PIC provides an 8-bit interrupt type number (0-255). Based on this number, the
8086 locates the corresponding ISR address from its interrupt vector table in
memory.

Software Interrupts

Software interrupts are instructions executed within a program to initiate a

system call or request a service from the operating system (OS) or BIOS (Basic
Input/Output System).

• Signal: Triggered by specific interrupt instructions, like INT n in 8086 assembly,

where 'n' is the interrupt type number (vector).

• Purpose: For requesting services from the OS, such as I/O (reading a key,
printing to the screen), memory management, or system-level operations.

40
• Masking: Software interrupts cannot be masked (disabled) with the IF flag, but
are still a part of system programming.

• ISR Address: Like hardware interrupts, software interrupts also use the
interrupt vector table to find the appropriate ISR address based on the interrupt
type specified in the instruction

Types of Software Interrupts in 8086:

Software interrupts are triggered by executing the INT n instruction in 8086

assembly language, where n is an 8-bit interrupt type number (0-255). This
instruction causes the CPU to jump to the corresponding ISR.

• Purpose: Software interrupts provide a structured way for programs to request

services from the operating system (OS), BIOS (Basic Input/Output System), or
other system-level routines. They are synchronous, initiated by the deliberate
execution of an instruction.

• Examples:

• INT 0: Divide by Zero Error. This interrupt is automatically generated when the
CPU attempts to divide by zero. This provides a way for programs or the operating
system to detect and handle this error.

• INT 1: Single-Step Interrupt (also called Trace Interrupt). This interrupt is

triggered after every instruction, making it useful for debugging and single-
stepping through code.

• INT 2: Non-Maskable Interrupt (NMI). This is the same as the hardware NMI,
but triggered by a INT 2 instruction.

• INT 3: Breakpoint Interrupt. Debuggers often use this to set breakpoints in

code.

• INT 4: Overflow Interrupt. Generated if an arithmetic overflow occurs.

41
 • INT 10h (16 decimal): BIOS video services. Provides functions for displaying
characters and graphics. Common BIOS function for video display manipulation
(for example, set display mode, position the cursor, write characters).

• INT 16h (22 decimal): BIOS keyboard services. Provides functions for reading
keyboard input. Common BIOS function for handling keyboard input (for example,
read keypresses from keyboard buffer).

• INT 21h (33 decimal): DOS function calls. This interrupt provides access to DOS
system calls for various functions, including:

* File I/O: Creating, opening, reading, and writing to files.

* Memory Management: Allocating and freeing memory.

* Console I/O: Displaying output to the screen and reading input from the
keyboard.

* Directory Operations: Managing directories and file system navigation.

• INT 20h: Program Terminate. Terminates the current program and transfers
control to DOS.

• Vector: Software interrupts also use the same interrupt vector table as
hardware interrupts to find the address of their corresponding ISRs.

• Masking: Software interrupts cannot be masked by the Interrupt Flag (IF) like
hardware INTR. When an INT n instruction is encountered, the CPU will
immediately save the current context and jump to the corresponding ISR.

Interrupt Vector Table

Both hardware and software interrupts use the interrupt vector table (IVT). This is
a table located in the lower memory addresses of the 8086 system (starting at
address 00000h). The table holds 256 4-byte entries (total 1024 bytes), where
each entry contains:

42
• Address of the ISR: Each entry stores a 32-bit address for its interrupt handler
which contains the code segment (CS) and the instruction pointer (IP) for the
appropriate interrupt service routine (ISR).

The type number n in the INT n instruction, or the interrupt type supplied by the
external PIC for the INTR pin, is multiplied by 4 (as every entry takes 4 bytes). This
will give the offset within the IVT that contains the address of ISR for this
interrupt number.

How the 8086 Handles Interrupts

1. Interrupt Signal: An interrupt signal (either hardware or software) is received

by the 8086.

2. Interrupt Acknowledgment: For hardware interrupts, the 8086 acknowledges

the interrupt signal.

3. Flag and Context Save: The 8086 saves the current program's context by
pushing the flag register, code segment (CS), and instruction pointer (IP) onto the
stack.

4. Vector Table Lookup: Based on the interrupt type (provided by the interrupt
controller or specified in the INT instruction), the 8086 retrieves the address of
the appropriate ISR from the interrupt vector table in the memory. The interrupt
vector table is a table that contains the addresses of ISR for each interrupt type.

5. ISR Execution: The CPU jumps to the ISR's address (CS:IP).

6. ISR Service: The ISR handles the specific event that triggered the interrupt (e.g.,
a key press, data transfer complete, system call).

7. Context Restoration: When the ISR is done, it restores the original program's
context by popping the IP, CS, and flags from the stack.

43
8. Resumption: The CPU returns to where it was interrupted by the ISR with the
IRET instruction, and program execution resumes.

Conclusion
Interrupts are a core concept in computer architecture and operating systems.
They provide an essential mechanism for responsiveness, efficiency, and handling
asynchronous events in a real-time system. Hardware interrupts respond to
signals from external devices while software interrupts are used for system calls.
In the 8086, hardware interrupts are managed through the NMI and INTR lines.
Software interrupts, initiated by INT instructions, provide access to system-level
functionalities by interacting with the operating system's services. Understanding
interrupts is crucial for anyone working with embedded systems, operating
system development, or low-level programming. They are a vital part of any
computer system's ability to respond effectively to events.

9.What is purpose of using directive and their

example
Introduction
Directives in assembly language programming are essential tools that guide the
assembler in interpreting and processing the source code. Unlike executable
instructions that the CPU directly executes, directives serve as commands for the
assembler, providing crucial information about data allocation, code organization,
and overall program structure. Understanding the various purposes of directives
is fundamental for effective microprocessor programming, enabling developers to
write clear, efficient, and maintainable code.

Purposes of Using Directives

44
1. Defining Data: Directives are primarily used to define and allocate memory for
variables and constants. The .data directive is commonly employed to declare
initialized data.

Example:

.data

message db 'Hello, World!', 0 ; Define a null-terminated string

count db 10 ; Define a byte variable initialized to 10

 In this example, the db (define byte) directive allocates space for a string and
initializes it with "Hello, World!" followed by a null terminator. The variable
count is also defined as a byte with an initial value of 10.

2. Organizing Code Segments: Directives help structure the code into segments,
which is essential for maintaining organized programs. The .text directive
indicates the beginning of the code segment where executable instructions reside.

Example:

.text

start:

mov eax, 1 ; System call number for exit

xor ebx, ebx ; Exit code 0

int 0x80 ; Call kernel

 The .text directive marks the beginning of the executable code segment. The
instructions following it are part of the program's main logic.

3. Controlling the Assembly Process: Some directives control how the assembler
processes the source code. For instance, the .include directive allows
programmers to incorporate external files containing additional definitions or
routines.

45
 Example:

.include 'utilities.asm' ; Include external assembly file

 This directive tells the assembler to include the contents of utilities.asm,

which may contain useful functions or macros that can be reused across
multiple programs.

4. Conditional Assembly: Directives like .ifdef and .endif enable conditional

compilation of code based on defined symbols. This feature is particularly useful
for debugging or platform-specific code.

Example:

.ifdef DEBUG

; Debugging information and checks

mov eax, 1 ; Indicate debug mode

.endif

In this example, if DEBUG is defined (for example, using a command-line option),

the code within the ifdef block will be included in the assembly process;
otherwise, it will be ignored. This allows for easy toggling of debugging features
without altering the core logic.

5. Reserving Memory Space: Directives such as .bss are used to reserve space in
memory for variables that are not initialized. This is particularly useful for
allocating buffers or arrays.

Example:

.bss

buffer resb 128 ; Reserve 128 bytes for buffer (uninitialized)

 This example reserves 128 bytes of uninitialized memory for buffer, which can
later be used to store data during program execution.

46
6. Defining Constants: The .equ directive allows programmers to define constants
that can be used throughout the program, improving readability and
maintainability.

Example:

.equ PI, 3.14159 ; Define a constant for PI

 In this case, PI is defined as a constant that can be referenced in calculations

without repeating its value, enhancing both clarity and ease of updates if
necessary.

7. Aligning Data: The .align directive is used to align data in memory at specified
boundaries, which can improve access speed and ensure proper data structure
alignment.

Example:

.data

.align 4 ; Align next data on a 4-byte boundary

array resd 10 ; Reserve space for an array of 10 double words

 This example ensures that the subsequent data (in this case, an array) starts at
a memory address that is a multiple of 4 bytes.

Conclusion
Directives play a crucial role in assembly language programming by providing
structure and control over how source code is assembled into machine language.
They facilitate data definition, code organization, memory management,
conditional assembly, and more, ultimately leading to clearer and more efficient
programs. By understanding and effectively utilizing these directives—such as
defining data, organizing code segments, controlling assembly processes,
implementing conditional compilation, reserving memory space, defining
constants, and aligning data—programmers can create high-quality assembly

47
code that meets the needs of microprocessor architecture. Mastery of directives
not only enhances coding efficiency but also contributes significantly to effective
low-level programming practices in embedded systems and performance-critical
applications.

10.What is the difference between immediate and

indirect operand instruction

Introduction
In computer architecture and assembly language programming, operand
instructions are fundamental components that dictate how data is manipulated.
Operand instructions can be categorized into two primary types: immediate
operand instructions and indirect operand instructions.

Immediate Operand Instructions involve the use of constants or fixed values

directly specified within the instruction itself. These instructions allow the
processor to perform operations using values that are readily available,
eliminating the need to access memory to retrieve data. For example, an
instruction might add an immediate value, such as 5, to a register. This type of
instruction is efficient for operations that require constant values and can
enhance performance by reducing memory access times.

Indirect Operand Instructions, on the other hand, reference data stored in

memory through pointers or addresses rather than specifying the data directly. In
this case, the operand is an address that points to where the actual data resides.
This allows for greater flexibility in accessing data and enables the manipulation
of variables stored in different memory locations. Indirect addressing is
particularly useful for working with arrays, data structures, or when the exact
location of the data is not known at compile time.

48
Both immediate and indirect operand instructions play crucial roles in
programming and system design, influencing performance, efficiency, and the
overall capability of computing systems. Understanding these types of
instructions helps programmers optimize their code and utilize hardware
resources effectively.

immediate operand instructions

Immediate operand instructions are a type of instruction in computer

programming that use a constant value as the operand for the operation. This
value is directly specified in the instruction itself.

For example, consider an instruction to add the value 5 to a register. This

instruction would use an immediate operand of 5. The instruction would look
something like this:ADD 5

 In this example, the immediate operand is the value 5. This value is directly
specified in the instruction, and the operation is performed using this value.

Immediate operand instructions are typically used for simple operations that
involve fixed values. They are also often used in situations where the value is not
known at the time the instruction is executed, but is known to the processor.

Immediate operand instructions work by specifying the operation and the

operand in the instruction itself. The operand is a constant value that is directly
specified in the instruction. The processor then performs the operation using this
value.

Immediate operand instructions are a simple and efficient way to perform

operations on fixed values. They are also useful in situations where the value is
not known at the time the instruction is executed, but is known to the processor.

indirect operand instructions

49
Indirect operand instructions are a type of instruction in computer programming
that use a memory address as the operand for the operation. This address points
to a location in memory where the actual data can be found.

For example, consider an instruction to add the value stored in memory

location 0x100 to a register. This instruction would use an indirect operand of
0x100. The instruction would look something like this:

``ADD 0x100```

 In this example, the indirect operand is the memory address 0x100. This
address points to a location in memory where the actual data can be found.
The processor then retrieves the data from this location and performs the
operation using it.

Indirect operand instructions are typically used for more complex operations that
involve larger amounts of data or data that is not known at the time the
instruction is executed. They are also useful in situations where the data is stored
in a location that is not easily accessible or is not known at the time the
instruction is executed.

Indirect operand instructions work by specifying the operation and the memory
address in the instruction itself. The processor then retrieves the data from the
specified memory location and performs the operation using it.

Indirect operand instructions are a powerful and flexible way to perform

operations on data that is stored in memory. They are also useful in situations
where the data is not known at the time the instruction is executed, but is known
to the processor.

Difference between immediate and indirect operand

instructions

50
1. Operand source: Immediate operand instructions use a constant value as the
operand, while indirect operand instructions use a memory address as the
operand.

2. Operand specification: Immediate operand instructions specify the operand

directly in the instruction, while indirect operand instructions specify the memory
address in the instruction.

3. Operand accessibility: Immediate operand instructions are typically used for

simple operations that involve fixed values, while indirect operand instructions
are typically used for more complex operations that involve larger amounts of
data or data that is not known at the time the instruction is executed.

4. Operand flexibility: Immediate operand instructions are less flexible than

indirect operand instructions, as they are limited to the values specified in the
instruction. Indirect operand instructions are more flexible, as they can be used to
perform operations on any data stored in memory.

5. Operand location: Immediate operand instructions are typically used for

operations on data that is known at the time the instruction is executed, while
indirect operand instructions are typically used for operations on data that is
stored in memory and is not known at the time the instruction is executed.

Differences between immediate and indirect operand instructions

by using table

| Feature constraction Immediate Operand Indirect Operand

Instructions Instructions

Definition Operands are specified Operands are specified

directly within the by a memory address or
instruction itself. pointer. |

51
Data Access Accesses data Accesses data stored in
immediately available in memory, which may
the instruction require additional
memory access.

Speed Generally faster since the Typically slower due to

value is part of the the need to fetch the
instruction. operand from memory.

Usage Used for constants and Used for dynamic data

fixed values. access, such as arrays and
structures. |

Instruction Size May increase instruction Usually requires

size due to the inclusion additional bits for
of constant values. addressing, but can handle
larger datasets.

| Flexibility Less flexible; values More flexible; can access

must be known at compile various data locations at
time. runtime.

Instruction Complexity Simpler instructions; More complex, as they

often fewer cycles to may involve multiple
execute. memory accesses (first to
retrieve the address, then
to retrieve the value)

Addressing Mode Uses immediate Uses indirect addressing

addressing mode where mode, requiring an
the operand is part of the address to be fetched from
instruction. a register or memory.

Code Readability Easier to read and Can be less intuitive, as

understand since values the actual value is not
are explicit. directly visible

52
Register Usage Typically does not use Often involves registers to
registers for the operand hold addresses, which can
itself (the value is lead to more register
embedded usage in programs

Storage Efficiency Less efficient for large More efficient for large
datasets since each datasets as it can
instruction carries its own reference a single address
data. that points to multiple
data items.

Modification The immediate value The address can be

cannot be changed at modified at runtime,
runtime; it is fixed at allowing dynamic data
compile time. manipulation.

Use Cases Commonly used for Commonly used in data

initializing variables or structures like linked lists,
constants. arrays, and for function
parameters

Debugging Information Immediate values provide Indirect references may

clearer context in obscure the source of
debugging since they are errors, making debugging
explicitly stated. more challenging as the
actual data location can
vary.

Use in Loops Less common in loops . | Commonly used in

where variable values loops for iterating over
change frequently arrays or linked lists
where data changes
dynamically.

Error Handling Easier to debug since More challenging to

53
 values are explicitly debug due to the
stated in the code. indirection; errors may
arise from incorrect
addresses rather than
values.

Memory Access Patterns Directly accesses the Involves an extra step of

operand in a single fetching the address
memory operation. before accessing the
operand, leading to more
complex memory access
patterns. |

These differences highlight the distinct roles that immediate and indirect operand
instructions play in assembly language programming and computer architecture.

conclusion

In conclusion, immediate operand instructions and indirect operand instructions

serve distinct purposes in computer architecture and programming, each with its
own advantages and disadvantages.

Immediate operand instructions are characterized by their simplicity and

efficiency in accessing fixed values directly within the instruction itself. They are
ideal for scenarios where constants or fixed parameters are needed, leading to
faster execution and easier decoding. However, they are limited by the size of the
immediate field and can increase code size when multiple constants are required.

On the other hand, indirect operand instructions provide greater flexibility and
are well-suited for accessing dynamic data structures and larger data types. They
allow for more complex addressing modes, enabling programmers to manipulate
data in a more versatile manner. However, this flexibility comes at the cost of

54
increased complexity in instruction decoding, potential security vulnerabilities,
and a greater demand for register usage.

Ultimately, the choice between immediate and indirect operand instructions

depends on the specific requirements of the application, such as performance
needs, memory management, and the nature of the data being processed.
Understanding these differences is crucial for optimizing code and making
informed decisions in system design and programming.s

11.How do the following parameter passing

mechanisms work?

a)Pass by value

b)Pass by reference

c) Pass by value-returned

d) Pass by name

Introduction
Parameter passing is a fundamental concept in programming that determines
how data is transferred between a calling function (or method) and a called

55
function. The mechanism used for parameter passing significantly impacts how
changes made to parameters within the called function affect the original data in
the calling function. Understanding these mechanisms is crucial for writing correct
and efficient code. This document will explore four common parameter passing
mechanisms: pass by value, pass by reference, pass by value-returned, and pass
by name, detailing how each works and their implications for program behavior.

A. Pass by value

 Concept:

• In pass by value, a copy of the actual argument's value is made and passed to
the formal parameter of the called function.

• The called function works with this copy, not the original variable.

 Mechanism:

1. When a function is called, the value of each actual argument is copied into the
corresponding formal parameter.

2. The formal parameter becomes a local variable within the called function.

3. Any changes made to the formal parameter within the function do not affect
the original variable in the calling function.

 Analogy:

• Imagine you have a photo (the original variable). You make a photocopy of it
(the copy). You can write on the photocopy, but the original photo remains
unchanged.

• Example (Python):

def modify_value(x):

x = x + 10

56
 print("Inside function:", x)

a=5

modify_value(a)

print("Outside function:", a)

Output

Inside function: 15

Outside function: 5

Explanation: The value of a (5) is copied to x. Inside modify_value, x is

changed to 15, but a remains 5.

 Advantages:

• Protects the original data from accidental modification within the function.

• Simple and easy to understand.

 Disadvantages:

• Can be inefficient for large data structures, as copying can be time-consuming

and memory-intensive.

• Changes made within the function do not affect the original variable.

B. Pass by Reference

 Concept:

• In pass by reference, the memory address (or reference) of the actual

argument is passed to the formal parameter of the called function.

• The called function works directly with the original variable through this
reference.

 Mechanism:

57
 1. When a function is called, the address of each actual argument is passed to
the corresponding formal parameter.

2. The formal parameter becomes an alias for the original variable.

3. Any changes made to the formal parameter within the function directly affect
the original variable in the calling function.

 Analogy:

• Imagine you have a house (the original variable). You give someone the
address of the house (the reference). They can go to the house and make changes
to it directly.

Example (C++):

#include <iostream>

void modify_reference(int &x) {

x = x + 10;

std::cout << "Inside function: " << x << std::endl;

int main() {

int a = 5;

modify_reference(a);

std::cout << "Outside function: " << a << std::endl;

return 0;

Output:

Inside function: 15

58
 Outside function: 15

Explanation: The address of a is passed to x. Inside modify_reference, x (which

is an alias for a) is changed to 15, and this change is reflected in a.

 Advantages:

• Efficient for large data structures, as no copying is involved.

• Allows the function to modify the original variable.

 Disadvantages:

• Can lead to unintended side effects if the function modifies the original
variable unexpectedly.

• Requires careful programming to avoid errors.

C. Pass by Value-Returned

 Concept:

• Pass by value-returned is a hybrid approach that combines aspects of both

pass by value and pass by reference.

• It begins by passing a copy of the actual argument's value to the formal

parameter of the called function (like pass by value).

• However, unlike pass by value, the function can modify this copy, and the
modified copy is then explicitly returned to the calling function.

 Mechanism:

1. Copying: When a function is called, the value of each actual argument is

copied into the corresponding formal parameter.

59
 2. Local Modification: The formal parameter becomes a local variable within the
called function. Any changes made to this local variable do not directly affect the
original variable in the calling function.

3. Returning the Modified Value: The function may modify the local copy and
then uses a return statement to send the modified value back to the calling
function.

4. Assignment: The calling function receives this returned value and can assign it
to the original variable or another variable. This assignment is what effectively
updates the original data.

 Analogy:

• Imagine you have a document (the original variable). You make a photocopy of
it. You edit the photocopy and then give the edited photocopy back to the original
owner. The original document is only updated if the owner chooses to replace it
with the edited copy.

• Example (C++)

#include <iostream>

int modify_value_returned(int x) {

x = x + 10;

std::cout << "Inside function: " << x << std::endl;

return x;

int main() {

int a = 5;

a = modify_value_returned(a); // Assign the returned value back to 'a'

std::cout << "Outside function: " << a << std::endl;

60
 return 0;

Output:

Inside function: 15

Outside function: 15

Explanation: The value of a (5) is copied to x. Inside modify_value_returned, x

is changed to 15, and this value is returned and assigned back to a.

 Advantages:

• Provides a controlled way to modify data. The original variable is only updated
if the returned value is explicitly assigned back to it.

• Protects the original data from accidental modification within the function,
unless the returned value is used to update it.

• Can be more efficient than pass by value for large data structures when only a
modified copy is needed.

 Disadvantages:

• Requires an explicit return statement.

• Can be less efficient than pass by reference if the function needs to modify the
original variable directly and frequently.

• The calling function must remember to assign the returned value to update
the original variable.

D.Pass by Name

 Concept:

61
 • Pass by name (also known as call by name) is a more advanced and less
common mechanism where the actual argument is not evaluated until it is
actually used within the function.

• Instead of passing a value or a reference, the function receives a textual

representation (or a thunk, a piece of code that can evaluate the argument) of the
argument.

 Mechanism:

1. Textual Representation: When a function is called, the textual representation

of each actual argument is passed to the corresponding formal parameter.

2. Delayed Evaluation: Whenever the formal parameter is used within the

function, the textual representation is evaluated in the context of the calling
function.

3. Multiple Evaluations: This evaluation can occur multiple times, and each time,
it may produce a different result if the argument involves variables that change
within the calling function.

 Analogy:

• Imagine you have a recipe that says "add the number of apples in the basket."
You don't count the apples until you actually need to add them. If someone adds
or removes apples from the basket before you add them, the number you use will
change.

Example (Conceptual, as not directly supported in many common

languages):

function modify_name(x) {

x = x + 10; // x is evaluated each time it's used

print("Inside function:", x);

62
 a = 5;

modify_name(a); // 'a' is not evaluated until inside the function

print("Outside function:", a);

Explanation (Conceptual): The textual representation of a is passed to x. Inside

modify_name, x is evaluated, which is a, and a is changed to 15. If a were
modified after the function call but before* x was used, the value of x would
reflect that change.

 Advantages:

• Allows for more flexible and sometimes surprising behavior.

• Can be useful for certain types of programming techniques, such as lazy

evaluation and creating custom control structures.

• Can be used to implement things like infinite lists or streams.

 Disadvantages:

• Can be difficult to understand and debug due to the delayed evaluation.

• Can lead to unexpected side effects if the argument involves variables that
change within the calling function.

• Not directly supported in many common programming languages (often

simulated through other mechanisms like closures or lambda functions).

• Can be less efficient than other mechanisms due to repeated evaluation.

• Use Cases:

• Historically used in languages like Algol 60.

• Can be simulated in modern languages using closures or lambda functions.

• Used in some functional programming paradigms for lazy evaluation.

63
Conclusion
Parameter passing mechanisms dictate how arguments are passed to functions
and how changes within those functions affect the original variables. Pass by
value creates a copy of the argument, ensuring that modifications within the
function do not affect the original variable. Pass by reference, on the other hand,
passes a reference (or address) to the original variable, allowing the function to
directly modify it. Pass by value-returned combines aspects of both, passing a
copy of the value but returning a potentially modified copy back to the caller.
Finally, pass by name (also known as call by name) is a more complex mechanism
that delays evaluation of the argument until it is actually used within the function,
allowing for more flexible and sometimes surprising behavior. This document will
provide a detailed explanation of each of these mechanisms, highlighting their
differences, advantages, and disadvantages.

REFERENCES

https://www.tutorialspoint.com

https://www.sciencedirect.com

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https://www.docisty.com

https://www.geeksforgeeks.com

https://www.studoc.com

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