Arba Minch University

Institute of Technology
Faculty of Computing and Software Engineering
Course title: Microprocessors and Assembly Language
Course code: SEng-3231
Group Assignment
Group : 2
Section : B
No Group members Id
1 Dagim Kibru NSR/252/15
2 Efrata Wesen NSR/308/15
3 Ibtisam Kedir NSR/517/15
4 Jewhar Nasr NSR/531/15
5 Wendmagegn Tadesse NSR/961/15
6 Fayza Shemesu NSR/385/15
7 Selam Feyisa NSR/833/15
8 Sofonyas Mebratu NSR/860/15
9 Abrham Tadesse NSR/059/15
10 Khalid Daniel NSR/563/15

Submitted to instructor Aamnuel

January,2025
Arba Minch, Ethiopia
Table of Contents
1. List various Instructions of 8086 and write how they are working. .................................................... 1
Introduction ......................................................................................................................................... 1
Data Transfer instruction ...................................................................................................................... 1
Arithmetic instruction .......................................................................................................................... 2
Logical Instruction ............................................................................................................................... 3
Rotate Instructions ............................................................................................................................... 4
Shift Instructions .................................................................................................................................. 4
Branch Instructions .............................................................................................................................. 4
Flag Manipulation and Processor Control Instructions .......................................................................... 6
String Instructions ................................................................................................................................ 6
Conclusion........................................................................................................................................... 7
2. Explain Various Control Instructions................................................................................................. 8
Introduction ......................................................................................................................................... 8
1. Jump Instructions: ........................................................................................................................ 8
2. Call and Return Instructions: ........................................................................................................ 8
3. Loop Instructions: ........................................................................................................................ 8
4. Conditional Jump Instructions: ..................................................................................................... 8
5. Compare Instructions.................................................................................................................... 8
6. Control Flags ............................................................................................................................... 9
Conclusion........................................................................................................................................... 9
3. Explain various Addressing modes of 8086. ...................................................................................... 9
Introduction ......................................................................................................................................... 9
1. Register mode: ........................................................................................................................... 10
2. Immediate mode:........................................................................................................................ 10
3. Displacement or direct mode: ..................................................................................................... 10
4. Register indirect mode ................................................................................................................ 10
5. Based indexed mode:.................................................................................................................. 10
6. Indexed mode:............................................................................................................................ 11
7. Indexed mode:............................................................................................................................ 11
8. Based indexed displacement mode:............................................................................................. 11
 9. Based indexed displacement mode:............................................................................................. 11
10. Based indexed displacement mode: ......................................................................................... 11
11. Relative mode: ....................................................................................................................... 11
Conclusion......................................................................................................................................... 12
4. Write the difference between 8087 Intel-co processor and 8086 microprocessors ............................. 12
Introduction ....................................................................................................................................... 12
Difference between 8087 Intel-co processor and 8086 microprocessors............................................... 12
Conclusion......................................................................................................................................... 13
5. What is the function of Ready, ALE, HOLD, DEN and RESET pins of 8086 microprocessor? ......... 13
Introduction ....................................................................................................................................... 13
Ready (RDY)..................................................................................................................................... 13
Address Latch Enable (ALE): ............................................................................................................ 14
HOLD ............................................................................................................................................... 14
Data Enable (DEN) ............................................................................................................................ 14
RESET .............................................................................................................................................. 14
Conclusion......................................................................................................................................... 14
6. Discuss the 80X86 family of CPU’s................................................................................................ 15
Introduction ....................................................................................................................................... 15
80X86 family of CPU’s...................................................................................................................... 15
Conclusion......................................................................................................................................... 16
7. Compare 8085, 8086 and 8088 microprocessors with each other ..................................................... 16
Introduction ....................................................................................................................................... 16
Conclusion......................................................................................................................................... 17
8. What do you mean interrupt in hardware and software? And list the types of hardware interrupt and
software in 8086. ................................................................................................................................... 17
Introduction ....................................................................................................................................... 17
Hardware Interrupts: .......................................................................................................................... 18
Types of Hardware Interrupts in 8086 ............................................................................................. 18
Software Interrupts:............................................................................................................................ 18
Types of Software Interrupts in 8086: ............................................................................................. 18
Consclusion ....................................................................................................................................... 18
9. What are the purposes of using directives? Show by giving different kinds of examples. ................. 19
Introduction ....................................................................................................................................... 19
 Conclusion......................................................................................................................................... 20
10. Explain the difference between immediate and indirect operand instructions. .............................. 20
Introduction ....................................................................................................................................... 20
The difference between immediate and indirect operand instructions .................................................. 20
Conclusion......................................................................................................................................... 21
11. How do the following parameter passing mechanisms work? Pass by value, pass by reference,
pass by value-returned, Pass by name ..................................................................................................... 21
Introduction ....................................................................................................................................... 21
1. Pass by Value: ............................................................................................................................ 22
1. Pass by Reference ...................................................................................................................... 22
2. Pass by Value-Returned .............................................................................................................. 23
3. Pass by name .............................................................................................................................. 23
Conclusion......................................................................................................................................... 24
Reference .............................................................................................................................................. 25
Table 1: Data Transfer instruction............................................................................................................. 2
Table 2: Arithmetic instruction ................................................................................................................. 3
Table 3 Logical Instruction....................................................................................................................... 4
Table 4: Rotate Instructions ...................................................................................................................... 4
Table 5: Shift Instructions ........................................................................................................................ 4
Table 6: Branch Instructions ..................................................................................................................... 5
Table 7: Flag Manipulation and Processor Control Instructions ................................................................. 6
Table 8: String Instructions ...................................................................................................................... 7
Table 9: 7. Comparison of 8085, 8086 and 8088 microprocessors ........................................................... 17
 1. List various Instructions of 8086 and write how they are working.
Introduction
In the 8086 architectures, instructions are the fundamental units of operation. They are the
commands that a processor reads and executes, each designed to perform a specific function. These
functions can be broadly classified into several categories, including data transfer, arithmetic
operations, logical operations and etc. This document will delve into the specifics of these
categories, providing a detailed overview of the various instructions that fall under each type.

Instructions are classified on the basis of functions they perform. They are categorized into the
following main types:

Data Transfer instruction

All the instructions which perform data movement come under this category. The source data may
be a register, memory location, port etc. the destination may be a register, memory location or port.
The following instructions come under this category:

Instruction Description
MOV Moves data from register to register, register to memory, memory to register,
memory to accumulator, accumulator to memory, etc.
LDS Loads a word from the specified memory locations into specified register. It
also loads a word from the next two memory locations into DS register.
LES Loads a word from the specified memory locations into the specified
register. It also loads a word from next two memory locations into ES
register.
LEA Loads offset address into the specified register.
LAHF Loads low order 8-bits of the flag register into AH register.
SAHF Stores the content of AH register into low order bits of the flags register.
XLAT/XLATB Reads a byte from the lookup table.
XCHG Exchanges the contents of the 16-bit or 8-bit specified register with the
contents of AX register, specified register or memory locations.

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 PUSH Pushes (sends, writes or moves) the content of a specified register or
memory location(s) onto the top of the stack.
POP Pops (reads) two bytes from the top of the stack and keeps them in a
specified register, or memory location(s).
POPF Pops (reads) two bytes from the top of the stack and keeps them in the flag
register.
IN Transfers data from a port to the accumulator or AX, DX or AL register.
OUT Transfers data from accumulator or AL or AX register to an I/O port
identified by the second byte of the instruction.
Table 1: Data Transfer instruction
Arithmetic instruction
Instructions of this group perform addition, subtraction, multiplication, division, increment,
decrement, comparison, ASCII and decimal adjustment etc.

Instruction Description
ADD Adds data to the accumulator i.e. AL or AX register or memory locations.
ADC Adds specified operands and the carry status (i.e. carry of the previous
stage).
SUB Subtract immediate data from accumulator, memory or register.
SBB Subtract immediate data with borrow from accumulator, memory or register.
MUL Unsigned 8-bit or 16-bit multiplication.
IMUL Signed 8-bit or 16-bit multiplication.
DIV Unsigned 8-bit or 16-bit division.
IDIV Signed 8-bit or 16-bit division.
INC Increment Register or memory by 1.
DEC Decrement register or memory by 1.
DAA Decimal Adjust after BCD Addition: When two BCD numbers are added, the
DAA is used after ADD or ADC instruction to get correct answer in BCD
DAS Decimal Adjust after BCD Subtraction: When two BCD numbers are added,
the DAS is used after SUB or SBB instruction to get correct answer in BCD.

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 AAA ASCII Adjust for Addition: When ASCII codes of two decimal digits are
added, the AAA is used after addition to get correct answer in unpacked
BCD
AAD Adjust AX Register for Division: It converts two unpacked BCD digits in
AX to the equivalent binary number. This adjustment is done before dividing
two unpacked BCD digits in AX by an unpacked BCD byte.
AAM Adjust result of BCD Multiplication: This instruction is used after the
multiplication of two unpacked BCD.
AAS ASCII Adjust for Subtraction: This instruction is used to get the correct
result in unpacked BCD after the subtraction of the ASCII code of a number
from ASCII code another number.
CBW Convert signed Byte to signed Word.
CWD Convert signed Word to signed Doubleword.
NEG Obtains 2's complement (i.e. negative) of the content of an 8-bit or 16-bit
specified register or memory location(s).
CMP Compare Immediate data, register or memory with accumulator, register or
memory location(s).
Table 2: Arithmetic instruction

Logical Instruction
Instruction of this group perform logical AND, OR, XOR, NOT and TEST operations. The
following instructions come under this category:

Instruction Description
AND Performs bit by bit logical AND operation of two operands and places the
result in the specified destination.
OR Performs bit by bit logical OR operation of two operands and places the
result in the specified destination.
XOR Performs bit by bit logical XOR operation of two operands and places the
result in the specified destination.
NOT Takes one's complement of the content of a specified register or memory
location(s).

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 TEST Perform logical AND operation of a specified operand with another specified
operand.
Table 3 Logical Instruction

Rotate Instructions
The following instructions come under this category:

Instruction Description
RCL Rotate all bits of the operand left by specified number of bits through carry
flag.
RCR Rotate all bits of the operand right by specified number of bits through carry
flag.
ROL Rotate all bits of the operand left by specified number of bits.
ROR Rotate all bits of the operand right by specified number of bits.
Table 4: Rotate Instructions

Shift Instructions

The following instructions come under this category:

Instruction Description
SAL or SHL Shifts each bit of operand left by specified number of bits and put zero in
LSB position.
SAR Shift each bit of any operand right by specified number of bits. Copy old
MSB into new MSB.
SHR Shift each bit of operand right by specified number of bits and put zero in
MSB position.
Table 5: Shift Instructions

Branch Instructions

It is also called program execution transfer instruction. Instructions of this group transfer program
execution from the normal sequence of instructions to the specified destination or target. The
following instructions come under this category:

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Instruction Description
JA or JNBE Jump if above, not below, or equal i.e. when CF and ZF = 0
JAE/JNB/JNC Jump if above, not below, equal or no carry i.e. when CF = 0
JB/JNAE/JC Jump if below, not above, equal or carry i.e. when CF = 0
JBE/JNA Jump if below, not above, or equal i.e. when CF and ZF = 1
JCXZ Jump if CX register = 0
JE/JZ Jump if zero or equal i.e. when ZF = 1
JG/JNLE Jump if greater, not less or equal i.e. when ZF = 0 and CF = OF
JGE/JNL Jump if greater, not less or equal i.e. when SF = OF
JL/JNGE Jump if less, not greater than or equal i.e. when SF ≠ OF
JLE/JNG Jump if less, equal or not greater i.e. when ZF = 1 and SF ≠ OF
JMP Causes the program execution to jump unconditionally to the memory
address or label given in the instruction
CALL Calls a procedure whose address is given in the instruction and saves
their return address to the stack.
RET Returns program execution from a procedure (subroutine) to the next
instruction or main program.
IRET Returns program execution from an interrupt service procedure
(subroutine) to the main program.
INT Used to generate software interrupt at the desired point in a program.
INTO Software interrupts to indicate overflow after arithmetic operation
LOOP Jump to defined label until CX = 0
LOOPZ/LOOPE Decrement CX register and jump if CX ≠ 0 and ZF = 1.
LOOPNZ/LOOPNE Decrement CX register and jump if CX ≠ 0 and ZF = 0.
Table 6: Branch Instructions

Here, CF = Carry Flag

ZF = Zero Flag
OF = Overflow Flag
SF = Sign Flag
CX = Register

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Flag Manipulation and Processor Control Instructions
Instructions of this instruction set are related to flag manipulation and machine control. The
following instructions come under this category:

Instruction Description
CLC Clear Carry Flag: This instruction resets the carry flag CF to 0.
CLD Clear Direction Flag: This instruction resets the direction flag DF to 0.
CLI Clear Interrupt Flag: This instruction resets the interrupt flag IF to 0.
CMC This instruction takes complement of carry flag CF.
STC Set carry flag CF to 1.
STD Set direction flag to 1.
STI Set interrupt flag IF to 1.
HLT Halt processing. It stops program execution.
NOP Performs no operation.
ESC Escape: makes bus free for external master like a coprocessor or peripheral
device.
WAIT When WAIT instruction is executed, the processor enters an idle state in
which the processor does no processing.
LOCK It is a prefix instruction. It makes the LOCK pin low till the execution of the
next instruction
Table 7: Flag Manipulation and Processor Control Instructions
String Instructions
String is series of bytes or series of words stored in sequential memory locations. The 8086
provides some instructions which handle string operations such as string movement, comparison,
scan, load and store.

The following instructions come under this category:

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 Instruction Description
MOVS/MOVSB/MOVSW Moves 8-bit or 16-bit data from the memory location(s)
addressed by SI register to the memory location addressed by DI
register.
CMPS/CMPSB/CMPSW Compares the content of memory location addressed by DI
register with the content of memory location addressed by SI
register.
SCAS/SCASB/SCASW Compares the content of accumulator with the content of
memory location addressed by DI register in the extra segment
ES.
LODS/LODSB/LODSW Loads 8-bit or 16-bit data from memory location addressed by SI
register into AL or AX register.
STOS/STOSB/STOSW Stores 8-bit or 16-bit data from AL or AX register in the memory
location addressed by DI register.
REP Repeats the given instruction until CX ≠ 0
REPE/ REPZ Repeats the given instruction till CX ≠ 0 and ZF = 1
REPNE/REPNZ Repeats the given instruction till CX ≠ 0 and ZF = 0
Table 8: String Instructions

Conclusion
In conclusion, the classification of instructions based on their functions provides a structured way
to understand the operations that a processor can perform. Whether it's transferring data,
performing arithmetic operations, or executing logical operations, each instruction plays a vital
role in the overall functioning of the system. Understanding these instructions and their
categorization is key to comprehending how a processor works and how it executes the various
tasks it is given. This knowledge is fundamental to fields like computer science and engineering,
where processor architecture and design are crucial components.

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 2. Explain Various Control Instructions.
Introduction
In the intricate domain of Intel 8086 microprocessor assembly language programming, effective
control of program execution is paramount. Control instructions play a pivotal role in managing
the flow of a program, determining the sequence in which instructions are executed. Among these,
the Intel 8086 architecture provides a diverse set of control instructions that enable programmers
to alter the normal sequential flow and implement conditional branching, loops, subroutine calls,
and more. This section will delve into some key control instructions that define the dynamic
behavior of programs on the Intel 8086 microprocessor.

In the Intel 8086 microprocessor assembly language programming, control instructions are used
to manage the flow of execution in a program. Here are some of the key control instructions in the
Intel 8086 architecture:

1. Jump Instructions: Jump instructions alter the normal sequential flow of program
execution by transferring control to a different part of the code.
1.1. JMP: Unconditional jump to a specified address.
1.2. JE (Jump if Equal), JNE (Jump if Not Equal), JZ (Jump if Zero), JNZ (Jump if Not
Zero): Conditional jumps based on the flags.

2. Call and Return Instructions:

2.1. CALL: Calls a subroutine or a procedure by transferring control to a specified
address and saves the return address on the stack.
2.2. RET: Returns control from a subroutine, popping the return address from the stack.
3. Loop Instructions: These instructions are used for looping or repetitive operations.
3.1. LOOP: Decrements the CX register and jumps to the specified address if CX is not
zero.
4. Conditional Jump Instructions: Various instructions are available for conditional jumps
based on the status of the flags (like Zero, Carry, Sign, etc.). Example: JC (Jump if Carry),
JNC (Jump if No Carry), JG (Jump if Greater), JL (Jump if Less), etc.
5. Compare Instructions:
5.1. CMP: Compares two operands and sets the flags accordingly, which is often used
in conjunction with conditional jumps.

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 6. Control Flags: The HLT (Halt) instruction is used to stop the microprocessor and put it in
a halt state until a reset occurs.

Conclusion
In conclusion, the precise orchestration of program execution is achieved through the strategic use
of control instructions on the Intel 8086 microprocessor. Jump instructions allow for unconditional
or conditional transfers of control, facilitating the creation of branching structures within code.
Call and Return instructions enable the organization of code into subroutines, enhancing
modularity and maintainability. Loop instructions provide a mechanism for repetitive operations,
contributing to the efficiency of program logic. Conditional jump instructions, based on the status
of flags, offer the flexibility to tailor program behavior to specific conditions. The CMP (Compare)
instruction, coupled with conditional jumps, empowers programmers to implement decision-
making logic. Finally, the HLT (Halt) instruction provides a means to gracefully stop program
execution when needed. Through a nuanced understanding and application of these control
instructions, programmers can craft robust and dynamic programs tailored to the specific
requirements of the Intel 8086 microprocessor architecture.

3. Explain various Addressing modes of 8086.

Introduction
In assembly language programming for the Intel 8086 microprocessor, the specification of data to
be manipulated by an instruction is encapsulated within addressing modes. These modes define
whether the given data is immediate or an address and also identify whether the operand is a
register or a register pair. Addressing modes are essential for shaping the behavior of instructions
and are integral to the versatility of programming. This section will explore various addressing
modes and their significance in influencing the execution of instructions on the Intel 8086
architecture

The way of specifying data to be operated by an instruction is known as addressing modes. This
specifies that the given data is an immediate data or an address. It also specifies whether the given
operand is register or register pair.

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Types of addressing modes:

1. Register mode: In this type of addressing mode both the operands are registers.
Example:
MOV AX, BX
XOR AX, DX
ADD AL, BL
2. Immediate mode: In this type of addressing mode the source operand is a 8 bit or 16 bit
data. Destination operand can never be immediate data. Example:
MOV AX, 2000
MOV CL, 0A
ADD AL, 45
AND AX, 0000
3. Displacement or direct mode: In this type of addressing mode the effective address is
directly given in the instruction as displacement.
Example:
MOV AX, [DISP]
MOV AX, [0500]
4. Register indirect mode: In this addressing mode the effective address is in SI, DI or BX.
Example: Physical Address = Segment Address + Effective Address
MOV AX, [DI]
ADD AL, [BX]
MOV AX, [SI]
5. Based indexed mode: In this the effective address is sum of base register and index
register.
Base register: BX, BP
Index register: SI, DI
The physical memory address is calculated according to the base register.
Example:
MOV AL, [BP+SI]
MOV AX, [BX+DI]

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6. Indexed mode: In this type of addressing mode the effective address is sum of index
register and displacement.
Example:
MOV AX, [SI+2000]
MOV AL, [DI+3000]
7. Indexed mode: In this type of addressing mode the effective address is sum of index
register and displacement.
Example:
MOV AX, [SI+2000]
MOV AL, [DI+3000]
8. Based indexed displacement mode: In this type of addressing mode the effective address
is the sum of index register, base register and displacement.
Example:
MOV AL, [SI+BP+2000]
9. Based indexed displacement mode: In this type of addressing mode the effective address
is the sum of index register, base register and displacement.
Example:
MOV AL, [SI+BP+2000]
10. Based indexed displacement mode: In this type of addressing mode the effective address
is the sum of index register, base register and displacement.
Example:
MOV AL, [SI+BP+2000]
11. Relative mode: In this the effective address is calculated with reference to instruction
pointer.
Example:
JNZ 8 bit address
IP=IP+8 bit address

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Conclusion
In conclusion, addressing modes serve as a critical element in Intel 8086 assembly language
programming, dictating how data is accessed and manipulated. The diversity of addressing modes,
ranging from register and immediate modes to displacement, register indirect, based indexed, and
relative modes, provides programmers with a rich set of tools for crafting efficient and flexible
code. Register mode facilitates operations between registers, immediate mode involves immediate
data, and displacement mode allows for the direct specification of an effective address. Register
indirect mode utilizes SI, DI, or BX for effective address determination, while based indexed and
indexed modes involve the sum of base and index registers. The intricacies of based indexed
displacement mode further enhance flexibility. Finally, relative mode leverages the instruction
pointer for effective address calculation, enabling dynamic branching. A nuanced understanding
of these addressing modes empowers programmers to tailor their code to the specific requirements
of the Intel 8086 microprocessor, fostering efficient and effective assembly language
programming.

4. Write the difference between 8087 Intel-co processor and 8086

microprocessors.
Introduction
Within the Intel 8086 microprocessor and the Intel 8087 numeric coprocessor play distinctive
roles, each tailored to specific computational tasks. The 8086 serves as a versatile, general-purpose
microprocessor designed to handle a broad spectrum of tasks, emphasizing integer arithmetic,
logic operations, and control flow. In contrast, the 8087, also known as the Math Coprocessor,
specializes in accelerating floating-point calculations. This section will delve into the unique
characteristics and functionalities of both processors, highlighting their respective contributions to
computational capabilities.

Difference between 8087 Intel-co processor and 8086 microprocessors

The Intel 8086 microprocessor and the Intel 8087 numeric coprocessor serve distinct roles in
computer systems. The 8086 is a general-purpose microprocessor designed for a broad range of
tasks, focusing on integer arithmetic, logic operations, and control flow. It lacks dedicated support
for floating-point arithmetic. In contrast, the 8087, known as the Math Coprocessor, is specifically
crafted for accelerating floating-point calculations. Operating in tandem with the 8086, the 8087
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introduces a specialized instruction set for operations like floating-point addition, subtraction,
multiplication, and division. Unlike the standalone 8086, the 8087 is an optional coprocessor that
enhances computational efficiency in applications requiring intensive floating-point computations,
such as scientific and engineering simulations or graphics processing. While the 8086 relies on
software routines for floating-point operations, the 8087 offloads these tasks to dedicated
hardware, providing a notable boost in speed and precision for real-number calculations.

Conclusion
In conclusion, the Intel 8086 and 8087 represent a symbiotic relationship within computer systems,
each fulfilling specialized roles. The 8086, as a general-purpose microprocessor, excels in integer-
based operations and control flow, providing a foundation for diverse applications. On the other
hand, the 8087 Math Coprocessor caters specifically to floating-point arithmetic, enhancing
computational efficiency in tasks that demand high precision, such as scientific simulations or
graphics processing. While the 8086 relies on software routines for floating-point operations, the
8087 introduces dedicated hardware support, offering a significant leap in both speed and accuracy.
Together, they form a powerful combination, allowing computer systems to seamlessly execute a
wide array of applications with optimal efficiency and precision.

5. What is the function of Ready, ALE, HOLD, DEN and RESET pins of
8086 microprocessor?
Introduction
The Intel 8086 microprocessor relies on several crucial control pins to orchestrate its operation
effectively. This includes the Ready (RDY), Address Latch Enable (ALE), HOLD, Data Enable
(DEN), and RESET pins, each serving specific functions to facilitate communication and
coordination with external devices.

The Intel 8086 microprocessor has several control pins that play crucial roles in its operation. Here
are the functions of the Ready (RDY), ALE (Address Latch Enable), HOLD, DEN (Data Enable),
and RESET pins:

Ready (RDY): The Ready pin is an input pin that is used to indicate the readiness of external
devices such as memory or peripherals to respond to data or address signals. When the RDY pin
is low, it means that the external device is not ready to proceed with the data transfer or

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acknowledge the address signals. The 8086 microprocessor waits until RDY goes high before
continuing with the operation.

Address Latch Enable (ALE): The ALE pin is an output pin used to signal the availability of a
valid address on the address bus during the first clock cycle of a machine cycle. ALE is activated
during the T1 (time 1) state of the machine cycle, allowing external latch circuits to capture the
address from the address bus.

HOLD: The HOLD pin is an input pin used for external hardware to request the microprocessor
to enter a "hold" state. When the HOLD pin is asserted (LOW), the 8086 microprocessor releases
the address and data buses, stops executing instructions, and enters a "hold acknowledge" state.
This allows external devices to gain control of the buses.

Data Enable (DEN): The DEN pin is an output pin that indicates the availability of valid data on
the data bus during the T2 (time 2) and T3 (time 3) states of the machine cycle. It is used to enable
external latch circuits to capture the data from the data bus during these states.

RESET: The RESET pin is an input pin used to reset the microprocessor. When the RESET pin is
activated (LOW), the 8086 microprocessor is forced to reset its internal registers and restart its
operation from a predefined address. The RESET pin is typically used during system initialization
or in response to a system-level reset command.

Conclusion
In conclusion, the RDY pin signals the readiness of external devices, while ALE activates during
the first clock cycle to indicate a valid address. The HOLD pin allows external hardware to request
a "hold" state, and DEN signals the availability of valid data during specific machine cycle states.
Finally, the RESET pin, when activated, initiates a microprocessor reset, ensuring a controlled
restart of operations. Together, these control pins contribute to the seamless functioning of the Intel
8086 microprocessor in various computing environments.

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 6. Discuss the 80X86 family of CPU’s
Introduction
The term x86 denotes a family of instruction set architectures originating from the Intel 8086 CPU,
which debuted in 1978 as a 16-bit extension of Intel's 8-bit 8080 microprocessor. The x86
architecture introduced segmentation to overcome addressing limitations and has been widely
implemented by Intel, Cyrix, AMD, VIA, and others. Initially developed for embedded systems
and small computers, the x86 line evolved into a dominant force in personal computers, servers,
and workstations, with extensive software support, including popular operating systems like DOS,
Windows, Linux, BSD, Solaris, and Mac OS X.

80X86 family of CPU’s

The term x86 refers to a family of instruction set architectures based on the Intel 8086 CPU. The
8086 was launched in 1978 as a fully 16-bit extension of Intel's 8-bit based 8080 microprocessor
and also introduced segmentation to overcome the 16-bit addressing barrier of such designs. The
term x86 derived from the fact that early successors to the 8086 also had names ending in "86".
The architecture has been implemented in processors from Intel, Cyrix, AMD, VIA, and many
others.

As the term became common after the introduction of the 80386, it usually implies binary
compatibility with the 32-bit instruction set of the 80386. This may sometimes be emphasized as
x86-32 to distinguish it either from the original 16-bit "x86-16" or from the 64-bit x86-64.
Although most x86 processors used in new personal computers and servers have 64-bit
capabilities, to avoid compatibility problems with older computers or systems, the term x86-64 (or
x64) is often used to denote 64-bit software, with the term x86 implying only 32-bit.

Although the 8086 was primarily developed for embedded systems and small single-user
computers, largely as a response to the successful 8080-compatible Zilog Z80, the x86 line soon
grew in features and processing power. Today, x86 is ubiquitous in both stationary and portable
personal computers and has replaced midrange computers and RISC-based processors in a majority
of servers and workstations as well. A large amount of software, including operating systems (OSs)
such as DOS, Windows, Linux, BSD, Solaris, and Mac OS X supports x86-based hardware.

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Modern x86 is relatively uncommon in embedded systems, however, and small low power
applications (using tiny batteries) as well as low-cost microprocessor markets, such as home
appliances and toys, lack any significant x86 presence. Simple 8-bit and 16-bit based architectures
are common here, although the

x86-compatible VIA C7, VIA Nano, AMD's Geode, Athlon Neo, and Intel Atom are examples of
32- and 64-bit designs used in some relatively low power and low-cost segments.

Conclusion
While x86 processors are pervasive in personal computers, servers, and workstations, their
presence is less common in embedded systems and low-power applications, where simpler 8-bit
and 16-bit architectures prevail. The term x86-32 signifies 32-bit compatibility, while x86-64
denotes 64-bit software, with the generic term x86 implying 32-bit. Notable examples of 32- and
64-bit x86 designs in low-power segments include VIA C7, VIA Nano, AMD's Geode, Athlon Neo,
and Intel Atom. Overall, the x86 architecture's journey from its 8086 roots to modern iterations
underscores its widespread adoption and adaptability across diverse computing environments.

7. Compare 8085, 8086 and 8088 microprocessors with each other.

Introduction
The 8085, 8086, and 8088 Microprocessors represent distinct milestones in microprocessor
technology. The 8085 is an 8-bit microprocessor with an 8-bit data bus, while the 8086 and 8088
are 16-bit microprocessors with 16-bit and 8-bit data buses, respectively. These differences extend
to memory banking, data transfer rates, support for pipeline architecture, and the pins used to
differentiate between memory and I/O operations. This concise comparison sheds light on their
fundamental distinctions.

8085 Microprocessor 8086 Microprocessor 8088 Microprocessor

Is an 8-bit Microprocessor Is a 16-bit Microprocessor Is a 16-bit microprocessor
It has 8-bit data bus It has 16-bit data bus It has 8-bit data bus
8085 does not require Does not require memory
Requires memory banking to
memory banking as it has an banking as it has an 8-bit data
transfer 16-bit data at a time.
8-bit data bus bus.

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 8085 performs slower
Performs faster memory Perform slower memory
memory operations as it can
operation as it can transfer 16 operation as it can transfer
transfer only 8 bits in one
bits in one cycle only 8 bits in one cycle
cycle
8085 does not support
Support pipeline architecture Support pipeline architecture
pipeline architecture
8085 has an IO/pin to Has an M/pin to differentiate Has an I/O pin to differentiate
differentiate between memory between memory and I/O between memory and I/O
and I/O operation operation operation
Table 9: Comparison of 8085, 8086 and 8088 microprocessors

Conclusion
In conclusion, the 8085, 8086, and 8088 Microprocessors embody varied architectures, with
differing data bus widths, memory banking requirements, and memory transfer speeds. The 8086
and 8088's 16-bit architectures enable faster data transfers, while the 8085, as an 8-bit processor,
operates at a comparatively slower pace. Additionally, the support for pipeline architecture in the
8086 and 8088 enhances their processing efficiency. The nuances in their specifications cater to
diverse computing needs, illustrating the evolution and versatility of microprocessor technology.

8. What do you mean interrupt in hardware and software? And list the
types of hardware interrupt and software in 8086.
Introduction
Interrupts constitute a pivotal component of computer systems, temporarily diverting the standard
program execution to address critical events and enhance multitasking. Hardware interrupts,
originating from external devices, and software interrupts, intentionally triggered by specific
instructions, collectively contribute to system responsiveness and functionality. This overview
delves into the categories of interrupts, highlighting their roles and significance in computer
architecture.

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Interrupts in computer systems refer to mechanisms that temporarily halt the normal execution of
a program to transfer control to another part of the system. They play a crucial role in handling
events, responding to external devices, and facilitating multitasking. Interrupts can be broadly
categorized into hardware interrupts and software interrupts:

Hardware Interrupts: Hardware interrupts are signals generated by external hardware devices to
request attention from the CPU. These interrupts can occur asynchronously and are typically used
to indicate events that require immediate attention, such as input from a keyboard, mouse, or disk
I/O.

Types of Hardware Interrupts in 8086:

- INTR (Interrupt Request): This is a maskable interrupt that is initiated by external
devices. The INTR pin is activated when a device requests an interrupt. It is enabled or
disabled using the IF (Interrupt Flag) in the FLAGS register.
- NMI (Non-Maskable Interrupt): This is a non-maskable interrupt that has a higher
priority than INTR. It is used for critical system events that cannot be ignored.

Software Interrupts: Software interrupts, also known as traps or exceptions, are generated by
executing specific software instructions. They are intentional and are used to invoke specific
services or functions provided by the operating system.

Types of Software Interrupts in 8086:

- INT (Interrupt): This is a software interrupt instruction that transfers control to a
predefined interrupt service routine (ISR). The type of service routine is specified by the
interrupt vector number. There are both hardware and software interrupt vectors.
- INT 21h (DOS Services): Within the INT instruction, INT 21h is commonly used to
invoke various DOS (Disk Operating System) services. Different functions are specified
by the AH register.

Consclusion
In summary, interrupts, whether hardware or software, are integral to computer systems, providing
a mechanism for handling external events and invoking essential services. Hardware interrupts,
exemplified by INTR and NMI in the 8086 microprocessors, cater to immediate attention

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requirements. On the software side, the INT instruction, including specific variants like INT 21h
for DOS services, enables intentional interruption for invoking predefined routines. Understanding
and effectively managing interrupts are key aspects of optimizing system performance and
responsiveness in diverse computing environments.

9. What are the purposes of using directives? Show by giving different

kinds of examples.
Introduction
In Intel 8086 microprocessor assembly language programming, directives play a crucial role in
organizing and configuring programs. Unlike high-level languages, assembly language employs
assembler directives to control aspects of the assembly process. This overview explores the various
purposes served by directives, showcasing their significance in enhancing program structure and
functionality.

In the context of the Intel 8086 microprocessor assembly language programming, directives serve
specific purposes related to the organization and configuration of the program. Unlike high-level
programming languages, assembly language does not have traditional directives like those in C or
C++, but it includes assembler directives that control aspects of the assembly process. Here are
some purposes of using directives in 8086 assembly language, along with examples:

1. Define Constants: Define symbolic constants to represent values that are used repeatedly
in the code.
2. Reserve Storage Space: Allocate memory space for variables or data structures.
3. Set the Origin (ORIG) or Start Address: Specify the starting address for the program or a
code segment.
4. Include External Files: Include external files or libraries into the current source code.
5. Conditional Assembly: Conditionally assemble or exclude portions of code based on
specified conditions.
6. Define Segments: Define segments for organizing code, data, and stack.

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Conclusion
In conclusion, directives in 8086 assembly language programming offer essential tools for program
organization and configuration. From defining constants and reserving memory space to setting
program origins, including external files, and enabling conditional assembly, these directives
empower programmers to optimize code structure and functionality. Understanding and effectively
utilizing directives are key aspects of proficient 8086 assembly language programming, allowing
for streamlined and well-organized code development.

10. Explain the difference between immediate and indirect operand

instructions.
Introduction
In Intel 8086 assembly language programming, the distinction between immediate and indirect
operand instructions revolves around how operands are specified within instructions. Immediate
operand instructions encode constants directly in the instruction, facilitating straightforward
manipulation of known values. On the other hand, indirect operand instructions employ memory
addresses or registers pointing to memory locations, introducing flexibility for dynamic data access
and intricate operations involving memory. This exploration delves into the key differences, use
cases, and flexibility offered by these approaches, essential for efficient and flexible code
development on the 8086.

The difference between immediate and indirect operand instructions

The distinction between immediate operand instructions and indirect operand instructions lies in
how operands are specified within instructions. Immediate operand instructions involve encoding
a constant or literal value directly within the instruction itself. For instance, using the MOV
instruction to load an immediate value into a register or performing arithmetic operations with
constants provides a straightforward means of manipulating data with known values.

On the other hand, indirect operand instructions take a different approach by specifying operands
indirectly, often utilizing memory addresses or registers pointing to the memory locations where
operands reside. This method introduces a level of flexibility, allowing for dynamic data access
and more intricate operations involving memory. Using instructions like MOV with square

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brackets ([ ]) allows the processor to fetch data from or store data to the memory locations pointed
to by registers, offering versatility in handling data stored at varying locations in memory.

The key differences between these approaches include how operands are encoded within
instructions, the use cases they are well-suited for, and the flexibility they offer. Immediate operand
instructions are efficient for operations with known values, while indirect operand instructions are
advantageous when dealing with dynamic data access and more complex memory-related
operations. Understanding the characteristics of both immediate and indirect operand instructions
is pivotal for crafting efficient and flexible assembly language code on the 8086 microprocessors,
aligning the chosen method with the specific requirements of the task at hand.

Conclusion
In conclusion, the choice between immediate and indirect operand instructions in 8086 assembly
language programming is guided by the nature of the task at hand. Immediate operand instructions
excel in operations with known values, providing efficiency. In contrast, indirect operand
instructions shine in scenarios requiring dynamic data access and complex memory-related
operations, offering versatility. A comprehensive understanding of these approaches empowers
programmers to craft code that aligns precisely with the specific requirements of their applications,
optimizing performance and functionality on the 8086 microprocessors.

11. How do the following parameter passing mechanisms work? Pass by

value, pass by reference, pass by value-returned, Pass by name
Introduction
In parameter passing mechanisms in programming, understanding how values are exchanged
between procedures is fundamental. This discussion revolves around four prominent methods: pass
by value, pass by reference, pass by value-returned, and pass by name. Each mechanism serves
distinct purposes and presents unique considerations, influencing the efficiency and behavior of
procedures. The choice of a specific parameter passing method depends on the nature of the data
being transferred and the desired outcome within the programming context.

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1. Pass by Value: A parameter passed by value is just that – the caller passes a value to the
procedure. Pass by value parameters are input only parameters. That is, you can pass them
to a procedure but the procedure cannot return them. In HLLs, like Pascal, the idea of a
pass by value parameter being an input only parameter makes a lot of sense. Given the
Pascal procedure call:

Call Proc(I);

If you pass I by value, the Call Proc does not change the value of I, regardless of what hap-
pens to the parameter inside CallProc.

Since you must pass a copy of the data to the procedure, you should only use this method for
passing small objects like bytes, words, and double words. Passing arrays and strings by value
is very inefficient (since you must create and pass a copy of the structure to the procedure)

1. Pass by Reference: To pass a parameter by reference, you must pass the address of a
variable rather than its value. In other words, you must pass a pointer to the data. The
procedure must dereference this pointer to access the data. Passing parameters by reference
is useful when you must modify the actual parameter or when you pass large data structures
between procedures.
Passing parameters by reference can produce some peculiar results. The following Pascal
procedure provides an example of one problem you might encounter:

program main (input, output);

var m: integer;

procedure bletch(var i, j:integer);

begin
i := i+2;
j := j-i; writeln(i,’ ‘,j);
end;
begin {main}
m := 5;
bletch(m, m);

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 end.
This particular code sequence will print “00” regardless of m’s value. This is because the
parameters i and j are pointers to the actual data and they both point at the same object.
Therefore, the statement j:=j-i; always produces zero since i and j refer to the same variable.
Pass by reference is usually less efficient than pass by value. You must dereference all pass
by reference parameters on each access; this is slower than simply using a value. However,
when passing a large data structure, pass by reference is faster because you do not have to
copy a large data structure before calling the procedure.
2. Pass by Value-Returned: Pass by value-returned (also known as value-result) combines
features from both the pass by value and pass by reference mechanisms. You pass a value-
returned parameter by address, just like pass by reference parameters. However, upon entry,
the procedure makes a temporary copy of this parameter and uses the copy while the
procedure is executing. When the procedure finishes, it copies the temporary copy back to
the original parameter.
The Pascal code presented in the previous section would operate properly with pass by
value- returned parameters. Of course, when Bletch returns to the calling code, m could
only contain one of the two values, but while Bletch is executing, i and j would contain
distinct values.
In some instances, pass by value-returned is more efficient than pass by reference, in others
it is less efficient. If a procedure only references the parameter a couple of times, copying
the parameter’s data is expensive. On the other hand, if the procedure uses this parameter
often, the procedure amortizes the fixed cost of Pass by Name
3. Pass by name: is the parameter passing mechanism used by macros, text equates, and the
#define macro facility in the C programming language. This parameter passing mechanism
uses textual substitution on the parameters. Consider the following MASM macro:
PassByName macro Parameter1, Parameter2
Mov ax, Parameter1
add ax, Parameter2
endm
If you have a macro invocation of the form:

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 PassByName bx, I
MASM emits the following code, substituting bx for Parameter1andI for Parameter2:
mov ax, bx
addax, I
Some high-level languages, such as ALGOL-68 and Panacea, support pass by name
parameters. However, implementing pass by name using textual substitution in a com-piled
language (like ALGOL- 68) is very difficult and inefficient. Basically, you would have to
recompile a function every time you call it. So, compiled languages that support pass by
name parameters generally use a different technique to pass those parameters copying the
data over many inexpensive accesses to the local copy.

Conclusion
In conclusion, the selection of a parameter passing mechanism plays a crucial role in shaping the
behavior and efficiency of procedures. Pass by value ensures input-only parameters, suitable for
small data objects. Pass by reference allows for modification of actual parameters and efficient
handling of large data structures. Pass by value-returned combines elements of both, offering
efficiency with distinct values during execution. Pass by name, used in macros and certain
programming languages, relies on textual substitution, introducing flexibility and specific use
cases. Understanding the nuances of each method empowers programmers to make informed
choices based on the requirements of their programming tasks.

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http://ndl.ethernet.edu.et/bitstream/123456789/90320/4/microprocessor%20and%20assembly%2
0language%20prepared%20for%20upload.pdf

https://www.ques10.com/p/10837/compare-8085-8086-and-8088-
microprocessors/#:~:text=8085%20performs%20slower%20memory%20operations,8%20bits%2
0in%20one%20cycle.

https://www.docsity.com/en/8085-8086-and-8088-microprocessors-differences/4273423/

https://www.javatpoint.com/instruction-set-of-8086

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