2017/5/31

● Overlays (重疊)

Overlays
0 While memory sizes are increasing rapidly, software sizes
are increasing much faster.
0 There is a need to run programs that are too large to fit in
memory.
0 There is a need to have systems that can support multiple
programs running simultaneously.
0 Overlays
0 Splitting had to be done by programmer
0 Supporting by linker

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Virtual Memory
0 Each program has its own address space, which is
broken up into chunks called pages.
0 Each page is a contiguous range of addresses.
0 These pages are mapped onto physical memory, but
not all pages have to be in physical memory to run the
program.
0 Supporting by the operating system

Paging
0 The OS divide programs into pages which are blocks of
small and fixed size.
0 Then, it divides the physical memory into frames which are
blocks of size equal to page size. (page size = frame size)
0 The OS uses a page table to map program pages to memory
frames.
0 Page size is defined by the hardware.
0 Generally page size is chosen as a power of 2
0 Usually 512 bytes to 64K bytes

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Paging
0 The memory mapping will be done by MMU

Page Table
0 The purpose of the page table is to map virtual pages
onto frames.

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Example
0 Page size = 4KB
0 16 pages
0 8 frames
0 For page 0, the MMU has
effectively mapped all virtual
addresses between 0 and
4095 onto physical addresses
8192 to 12287.

Address Mapping
0 Given a virtual address addr, how to translate it into
physical address
0 (1) compute the page number and offset
0 addr/page size = page number …… offset
0 (2) Lookup the page table to find out the mapped frame
number
0 (3) physical address = frame number * page size + offset

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Example
0 How to translate virtual
address 20500 to physical
address?

Address Mapping
0 Operations inside the
MMU
0 How many bits are
required for virtual
address and physical
address?
0 Virtual address
8196 being mapped
to physical address
24580.

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Exercise
0 Consider a simple paging system with the following
parameters: 230 bytes of physical memory; page size of 211
bytes; 214 pages of logical address space.
0 1. How many bytes are there in a frame?
0 2. How many bits are there in a logical address?
0 3. How many bits are there in the physical address specify
the frame?
0 4. How many entries are there in the page table?
0 5. How many bits are there in each page table entry?
Assume each page table entry includes a present/absent
bit.

Page Faults
0 An attempts to access a page that’s not in physical
memory causes a page fault
0 Page table must include a present bit for each page
0 An attempt to access a page without the present bit set
results in a page fault, an exception which causes a
trap to the OS
0 When a page fault occurs:
0 OS must page in the page — bring it from disk into a free
frame in physical memory
0 OS must update page table & present bit
0 Faulting process continues execution

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Performance of Paging
0 Effective memory access time (EMAT) for paging can be computed as:
0 EMAT = (1–p)(MAT) + (p)(pfault)
0 where:
0 p = probability that page fault will occur
0 MAT = memory access time
0 pfault = time needed to service page fault
0 With typical numbers:
0 EMAT = (1–p)(100) + (p)(25,000,000)
= 100 + (p)(24,999,800)
0 If p is 1 in 1000, EMAT = 25,099 ns (250 times slower!)
0 To keep overhead under 10%, 100 + (p)(24,999,800) < 110
0 p must be less than 0.0000004
0 Less than 1 in 2,5000,000 memory accesses must page fault!

Page Table Implementation

0 (1) Using fast registers
0 Keep page table in fast dedicated registers.
0 Disadvantage: if the page table is large, this method
becomes very expensive since requires too many
registers.

EMAT = RAT + MAT

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Page Table Implementation

0 (2) Keep the page table in main memory
0 The OS keeps a page table in the memory.
0 This is a time consuming method, because for every logical memory reference, two memory
accesses are required:
0 1. To access the page table in the memory, in order to find the corresponding frame number.
0 2. To access the memory word in that frame

EMAT = 2*MAT

Page Table Implementation

0 (3) Translation Lookaside Buffers (TLB)
0 When a logical memory reference is made, first the corresponding page
number is searched in associative registers.
0 If that page number is found in one associative register (hit) then the
corresponding frame number is get, else (miss) the page table in memory
is accessed to find the frame number
0 Then < page number, frame number > pair is stored into associative
registers.
0 Once the frame number is obtained, the memory word is accessed.

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EMAT = h * EMAThit + (1-h) * EMATmiss

where
h = The hit ratio
EMAThit = effective memory access time when there is a hit = rat + mat
EMATmiss = effective memory access time when there is a miss = rat + mat + mat

Exercise
0 Assume we have a paging system which uses
associative registers. These associative registers have
an access time of 30 ns, and the memory access time
is 470 ns. The system has a hit ratio of 90 %. Please
compute the EMAT.

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Page Tables for Large Memories

0 Multilevel Page Tables: to avoid keeping all the page
tables in memory all the time

Page Tables for Large Memories

0 Inverted Page Tables:
0 there is one entry per frame in real memory, rather than one entry
per page of virtual address.
0 Uses hash functions to map virtual page to inverted page table
entry

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0 Searching time is an overhead for inverted page table

0 TLB + hash table

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