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Exp 2 - MC

The document outlines an assembly language program for performing logical operations on two 8-bit numbers using the 8051 microcontroller. It includes objectives, algorithms, and detailed instructions for logical AND, OR, EXOR, and complement operations. The conclusion confirms the successful execution of these logical operations.

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vivan.ubale
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0% found this document useful (0 votes)
10 views9 pages

Exp 2 - MC

The document outlines an assembly language program for performing logical operations on two 8-bit numbers using the 8051 microcontroller. It includes objectives, algorithms, and detailed instructions for logical AND, OR, EXOR, and complement operations. The conclusion confirms the successful execution of these logical operations.

Uploaded by

vivan.ubale
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as DOCX, PDF, TXT or read online on Scribd
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EXPERIMENT NO.

2
WRITE AND EXECUTE AN ASSEMBLY LANGUAGE PROGRAM TO
PERFORM LOGICAL OPERATIONS ON TWO 8 BIT NUMBERS
USING 8051

Name: VARUN UBALE


Roll no:123A2057
Div : A (SE-EXTC)

AIM : WRITE AND EXECUTE AN ASSEMBLY LANGUAGE PROGRAM


TO PERFORM LOGICAL OPERATIONS ON TWO 8 BIT NUMBERS
USING 8051

OBJECTIVE:
· Students will be able to write program for performing logical operations on
two 8 bit numbers using 8051 Microcontroller .
· Students will be able to verify the result of logical operations along with the
status of flag bits in the PSW register.

EQUIPMENT: 8051 Kit

ALGORITHM:
1. Load the two 8-bit numbers in the memory/registers
2. Perform logical operations
3. Check the result

Theory :
1. The ANL instruction performs a bitwise logical AND operation
between the specified byte or bit operands and stores the result in the
destination operand.
2. The ORL instruction performs a bitwise logical OR operation on the
specified operands, the result of which is stored in the destination
operand.

Department of Electronics & Telecommunication Engineering, SIES Graduate School of Technology


3. The XRL instruction performs a logical exclusive OR operation
between the specified operands. The result is stored in the destination
operand
4. The CPL instruction logically complements the value of the specified
destination operand and stores the result back in the destination
operand
5. Bits that previously contained a 1 will be changed to a 0 and bits that
previously contained a 0 will be changed to a 1.

PROGRAM :
1.For logical AND
`Address:OPCODE INSTRUCTIONS COMMENTS

AC000 To locate the specific


address
C000:F8 MOV DPTR, #D000H Moving the program to
DPTR
C001:A3 MOV A, @DPTR Take the value in
variable A
C002:00 MOV R0, A Moving the value in A
to R0 in register bank
C003:58 INC DPTR Incrementing the DPTR
for next instruction
C004:A3 MOV A, @DPTR Take the value in
variable A
C005:F0 ANL A,R0 Perform logical AND
operation between A ,
R0
C006:021770 INC DPTR Incrementing the DPTR
for next instruction i.e
output value
MOVX @DPTR R0, A Moving the value in
register bank for
displaying the output
LJMP 6000 3-byte instruction in
which the first byte

Department of Electronics & Telecommunication Engineering, SIES Graduate School of Technology


represents opcode, and
the second and third
bytes represent the 16-
bit address of the target
location

2.For logical or
`Address:OPCODE INSTRUCTIONS COMMENTS

AC000 To locate the specific


address
C000:90D000 MOV DPTR, #D000H Moving the program to
DPTR
C003:E0 MOV A, @DPTR Take the value in
variable A
C004:F8 MOV R0, A Moving the value in A
to R0 in register bank
C005:A3 INC DPTR Incrementing the DPTR
for next instruction
C006:E0 MOV A, @DPTR Take the value in
variable A
C007:48 ORL A,R0 Perform logical OR
operation between A ,
R0
C008:A3 INC DPTR Incrementing the DPTR
for next instruction i.e
output value
C009:F0 MOVX @DPTR R0, A Moving the value in
register bank for
displaying the output
C00A:021770 LJMP 6000 3-byte instruction in
which the first byte
represents opcode, and
the second and third
bytes represent the 16-
bit address of the target
location

Department of Electronics & Telecommunication Engineering, SIES Graduate School of Technology


3.For logical EXOR
`Address:OPCODE INSTRUCTIONS COMMENTS

AC000 To locate the specific


address
C000:90D000 MOV DPTR, #D000H Moving the program to
DPTR
C003:E0 MOV A, @DPTR Take the value in
variable A
C004:F8 MOV R0, A Moving the value in A
to R0 in register bank
C005:A3 INC DPTR Incrementing the DPTR
for next instruction
C006:E0 MOV A, @DPTR Take the value in
variable A
C007:68 XRL A,R0 Perform logical EXOR
operation between A ,
R0
C008:A3 INC DPTR Incrementing the DPTR
for next instruction i.e
output value
C009:F0 MOVX @DPTR R0, A Moving the value in
register bank for
displaying the output
C00A:021770 LJMP 6000 3-byte instruction in
which the first byte
represents opcode, and
the second and third
bytes represent the 16-
bit address of the target
location

4. For complement

Department of Electronics & Telecommunication Engineering, SIES Graduate School of Technology


`Address:OPCODE INSTRUCTIONS COMMENTS

AC000 To locate the specific


address
C000:90D000 MOV DPTR, #D000H Moving the program to
DPTR
C003:E0 MOV A, @DPTR Take the value in
variable A
C004:F4 CPL A Perform logical
complement
operationon A
C005:A3 INC DPTR Incrementing the DPTR
for next instruction
C006:F0 MOV A, @DPTR Take the value in
variable A
C00A:021770 LJMP 6000 3-byte instruction in
which the first byte
represents opcode, and
the second and third
bytes represent the 16-
bit address of the target
location

OUTPUT:

Department of Electronics & Telecommunication Engineering, SIES Graduate School of Technology


Department of Electronics & Telecommunication Engineering, SIES Graduate School of Technology
Department of Electronics & Telecommunication Engineering, SIES Graduate School of Technology
Department of Electronics & Telecommunication Engineering, SIES Graduate School of Technology
CONCLUSION:
We have performed successfully the logical operations on 8-bit number using
logical AND , OR , EXOR , COMPLEMENT and understood how the program
works

Department of Electronics & Telecommunication Engineering, SIES Graduate School of Technology

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