Computer Organization and Architecture

Chapter Five

BASIC COMPUTER ORGANIZATION AND DESIGN

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 Introduction
❑ In this chapter we will introduce a basic computer and show how its
operations can be specified with RTL statements.
❑ Every different processor type has its own design (different registers, buses,
micro operations, machine instructions, etc)
❑ We will introduce processor organization and the relationship of the RTL
Instruction Codes
Computer Registers
Computer Instructions
Timing & Control
Instruction Cycle
Memory Reference Instructions
Input-Output & Interrupts
Design of Basic Computer 12/10/2024 2
5.1 Instruction Codes
Program: A set of instructions that specifies operation, operands, and sequence of
processing has to occur, S/W = Program + Data
✓ The instructions of a program, along with any needed data are stored in memory.
✓ The CPU reads the next instruction from memory.
✓ It is placed in an Instruction Register(IR)
✓ Control circuitry in control unit then translates the instruction into the sequence of
micro-operations necessary to implement it.
Computer Instruction: A binary code that specifies a sequence of micro-operations for the
computer.
➢ Every computer has its own unique instruction set.
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Instruction code: is a group of bits instructing the computer to perform a specific operation.
→ It is divided into two parts, each with particular meaning..
I. Operation code(Opcode): the most important part of instruction code and it
defines the type operation like add, subtract, multiply, shift, and complement.

→ that specifies the operation for that instruction.

II. An address: that specifies the registers and/or locations in memory to
use for that operation
Example: The Basic Computer has two components, a processor and memory
and, the memory contains 4096 (= 212) words in it.

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 4096= 212 , so it takes 12 bits to select a word in memory or to specify
which memory address for this instruction will use.
➢ Each words is 16 bits long

Fig 5.1
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✓ In the Basic Computer, bit 15 of the instruction specifies the addressing
mode(0: direct addressing, 1: indirect addressing)
✓ Since the memory words, and hence the instructions, are 16 bits long, that
leaves 3 bits for the instruction’s opcode

Fig 5.2
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ADDRESSING MODES:
❑ By looking at previous figure we can say that we can have those 3 addressing modes
1. Immediate operand: when the second part of the instruction code specifies an
operand.
2. Direct address: when the second part of the instruction code specifies the
address of the operand.
3. Indirect address: when this part specifies an address in a memory where we
can find the true address of the operand.
The (I) bit of the instruction code specifies direct addressing If I=0 or Indirect
addressing if I=1.
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Effective Address (EA):
❖ The address that can be directly used without modification to access an
operand for a computation-type instruction, or as the target address for a
branch-type instruction.

Fig 5.3
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❑ The previous figure, fig 4.3 shows an example of addressing mode.
✓In location 22 there is an ADD instruction that adds the AC with operand
in location 457 as an indication for direct addressing mode as I=0.
✓The second part of the figure shows in location 35 and ADD instruction
between AC and the address of operand found in location 300.
✓ Location 300 contains the operand address of 1350.
✓ In 1350 the operand will be read and added to the AC register, as I=1
Accumulator Register (AC): exist in single register processors (AC) and all
operations are performed with memory operand and this register.
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5.2 Computer Registers
➢A processor has many registers
▪ to hold instructions after it has been fetched from memory,
▪ addresses of operands need to be accessed data manipulated with
accumulator,
▪ general purpose register, and others.
➢ The processor contain the following a register,
I. Program Counter(PC): that holds the memory address of the next
instruction to get (i.e. holds the address of the instruction)
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 ➢ PC has 12 bits register .
Example : the memory in the Basic Computer only has 4096 locations, the PC

only needs to be in 12 bits.

II. Address Register (AR):
✓ In a direct or indirect addressing, the processor needs to keep track of
what locations in memory it is addressing, then it uses AR.
✓ AR holds the address of the memory.
✓ The AR is a 12 bit register in the Basic Computer

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 III. Data Registers (DR):
▪ When an operand is found, using either direct or indirect
addressing, it is placed in the Data Register(DR).
▪ The processor then uses this value as data for its operation (i.e.
DR holds memory operands).
▪ DR is a 16 bit register.

IV. Accumulator Register (AC):

✓ it is the general purpose processor register.
✓ It is 16 bit register.
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 ➢ The significance of a general purpose register is that it can be
referred to in instructions.
E.g. load AC with the contents of a specific memory location; store the
contents of AC into a specified memory location
V. Temporary Register(TR):
❖ Often the processor will need a scratch register to store
intermediate results or other temporary data, then it uses TR.
❖ It is 16 bit register and holds temporary data.

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VI. Input Register(INPR):
holds an 8 bit character gotten from an input device,
Input devices are considered to send 8 bits of character data to the
processor.
VII. Output Register(OUTR) :
o holds an 8 bit character to be send to an output device.
o The processor can send 8 bits of character data to output devices
VIII. Instruction Register (IR):
❖ holds the instruction code. It is 16 bit register.
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Fig 5.4
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COMMON BUS SYSTEML:
➢A path is needed to transfer data between 8 registers beside memory
unit and registers.
➢The next figure shows the common bus consisting of a multiplexer or 3
state buffers with decoder.
➢This gives a savings in circuitry over complete connections between
registers.

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Fig 5.5
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From the above fig 5.5,
✓The Three control lines, S2, S1, and S0 control which register the bus
selects as its input and so the selected register will issue its output to the
bus.
✓The lines from the common bus are connected to the input of each
register. Either one of the registers will have its load signal activated, or
the memory will have its read signal activated. And this will determine
where the data from the bus gets loaded to during next clock transition.
✓The memory will put its content to the bus when S2S1S0 =111 and its
read control signal is activated. 12/10/2024 18
• In the same manner, the memory will save the content of the bus . when
its write control signal is activated.
• We have in this basic computer 4 registers of 16-bit each, DR, AC, IR,
and TR. Also we have two registers PC and AR are 12 bits each. The 12-bit
registers, AR and PC, have 0’s loaded onto the bus in the high order 4 bit
positions.
• OUTR and INPR are 8-bit each and are connected to the lower 8 bits of
the bus.

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 Table 1: Control selection line

o Five registers have 3 control inputs, LD, INC, CLR; those are AC, AR,
TR, PC, and DR.
o 2 registers, OUTR, and IR will only have a LD input.
o The data coming to the AC register comes from ALU unit which accepts
operands from AC register, INPR register, or DR register.
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Fig 5.6 12/10/2024 21
➢Any and only one source of those register can be selected to apply its
content to the bus and during the same clock cycle the bus content could be
directed to one or many destinations of registers or memory unit.
➢For example we can do the next micro-operation:
▪ DR  AC and AC  DR
▪ S2S1S0 = 100
▪ LD of DR is enabled
▪ Transferring DR through ALU to AC
▪ LD of AC is enabled
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5.3 Computer Instruction
▪ The Basic Computer has 3 instruction code formats as shown in next figure.
▪ Each format has 16 bits.
▪ The op-code of the instruction contains 3 bits and the meaning of the
remaining 13 bits depends on the operation code encountered.
1. Memory reference instruction: uses 12 bits to specify the operand
address and one bit for indirect address.
2. The register reference instruction: are recognized by op-code 111
with 0 in left most bit (Bit 15) of the instruction.
• The 12 bits are used in to specify the operation done with AC register.
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3. Input-Output instruction: is recognized by op-code 111 and with 1
in bit 15. The remaining 12 bits are used to specify type of Input-
Output instruction type.

Fig 5.7
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❑ A computer should have a set of instructions so that the user can construct
machine language programs to evaluate any function that is known to be
computable.
❑ Instruction Types will be:
➢Functional Instructions includes
• Arithmetic, logic, and shift instructions
• ADD, CMA, INC, CIR, CIL, AND, CLA
➢Transfer Instructions
▪ Data transfers between the main memory and the processor
registers
➢ LDA, STA 12/10/2024 25
 ➢ Control Instructions
• Program sequencing and control
• BUN, BSA, ISZ
➢ Input-Output Instructions
• Input and output
• INP, OUT
5.4 Timing & Control
❖The timing for all registers is controlled by a master clock.
❖The clock pulses generated do not change the state of a register unless it
is enabled by a control signal. 12/10/2024 26
CONTROL UNIT
Control unit (CU) of a processor translates from machine instructions to
the control signals for the micro operations that implement them.
The control signals are generated in the control unit and provides control
inputs to:
• All register
• Multiplexers
• Common bus
• And micro-operation indicators
Control units are implemented in one of two ways
1. Hardwired Control
2. Micro programmed control 12/10/2024 27
1. Hardwired Control
• CU is made up of sequential and combinational circuits to generate
the control signals.
2. Micro programmed Control
• A control memory on the processor contains micro programs that
activate the necessary control signals.

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5.5 INSTRUCTION CYCLE:
• In Basic Computer, a machine instruction is executed in the following cycle:
1. Fetch an instruction from memory
2. Decode the instruction
3. Read the effective address from memory if the instruction has an
indirect address
4. Execute the instruction
• After an instruction is executed, the cycle starts again at step 1, for the next
instruction
NB: Every different processor has its own (different) instruction cycle
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5.6 Input Output & Interrupts
❑ Computer must communicate with external device to receive and send data
with it.
❑ Instructions and data must come to computer from external input device.
❑ Computational result must be transmitted to user through an output device.
❑Input Output Configuration:
❑ The terminal sends and receives 8 bit data converted to serial
information and receives serial information and convert it back to parallel
8 bits.
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 ❑ The serial info from the keyboard is received serially and shifted into
INPR.
❑ The serial info for the printer is stored in the OUTR and converted to
serial and sends to the printer.
Interrupt Initiated IO and Interrupt
o For slow device transfer it can be considered wasting a lot of time
(different data transfer rate between IO and processor).
o The solution will be the device can interrupt and tell processor when it
wants to be served.
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5.7 Design of Basic Computer
❑ Hardware Components of Basic Computer should contain:
✓ A memory unit: 4096 x 16.
✓ Registers: AR, PC, DR, AC, IR, TR, OUTR, INPR, and SC
Flip-Flops(Status): I, S, E, R, IEN, FGI, and FGO
✓ Decoders: a 3x8 Op-code decoder and a 4x16 timing decoder
✓ Common bus: 16 bits
✓ Control logic gates:
✓ Adder and Logic circuit: Connected to AC
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❑ Control Logic Gates
✓ Input Controls of the nine registers
✓ Read and Write Controls of memory
✓Set, Clear, or Complement Controls of the flip-flops
✓ S2, S1, S0 Controls to select a register for the bus
✓ AC, and Adder and Logic circuit

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