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Question Patterns

The document outlines question patterns for a course on Digital Design and Computer Organization, covering topics such as logic gates, truth tables, Boolean algebra, multiplexers, and decoders. It includes specific tasks like writing truth tables, simplifying Boolean expressions, and designing various multiplexers and decoders. The questions are structured to test understanding of digital logic design principles and their applications.

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29 views1 page

Question Patterns

The document outlines question patterns for a course on Digital Design and Computer Organization, covering topics such as logic gates, truth tables, Boolean algebra, multiplexers, and decoders. It includes specific tasks like writing truth tables, simplifying Boolean expressions, and designing various multiplexers and decoders. The questions are structured to test understanding of digital logic design principles and their applications.

Uploaded by

nandanhs.146
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd

Digital Design and Computer Organization - 23CS302

Question Patterns
Chapter -1 :
 Write Truth table for 2-input OR, AND, NOR, and NAND gates.
 Given a logic circuit, write its truth table

 Find the Boolean equation for a given logic circuit –

 Which are the universal gates? Prove that NOR and NAND are universal gates.
 Realize a given Boolean equation using only i) NOR gates ii) NAND gates
Chapter -2
 Using Boolean algebra ,

 Find the sum-of-products equation, simplify it & draw the logic circuit for the below truth
table:

 Solve the above problem using K-Map


 Find the simplified boolean expression for
Y=F(A,B,C,D) = ∑ m(0,1,2,7,8) + d(3,5,9,10)
Multiplexer
 Draw 4-to-1 Multiplexer block diagram, truth table, its logic circuit
 Draw the logic circuit of 8-to-1 multiplexer
 Realize the given 4 variable Truth table using 74150 mux.
 Show how 4-to-l multiplexer can be obtained using only 2-to-l multiplexer.
 Realize Y=A'B + B'C' + ABC using 8-to-l multiplexer.
 Design a 32-to-l multiplexer using two 16-to-l multiplexers and one 2-to-l multiplexer.
Decoder
 Draw 1-of-16 decoder (Decimal to Binary) logic circuit.
 Show how using a 3-to-8 decoder and multi-input OR gates following Boolean expressions can
be realized simultaneously.
F1(A, B, C) = ∑m(0, 4, 6); F2(A, B, C) = ∑m(0, 5); F3(A, B, C) = ∑m(l, 2, 3, 7)
 Draw BCD-to-Decimal Decoder (1-of-10 Decoder) logic circuit and truth table.
 Draw and explain 7-segment common anode decoder (7446 decoder-driver)

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