Unit – 1

ARCHITECTURE OF 8085 MICROPROCESSOR

1. Introduction:-
1.1. Microcomputer:-
 With the development of VLSI & ULSI technology it became possible to build a digital
computer on a single IC. A digital computer build on an IC is called microcomputer or
microcontrollers.
 Such computers are used in instrumentation, automatic industrial control, process control,
consumer and home appliance etc.
 As it is used for control applications it is also called microcontrollers or embedded
microcontroller. It contains CPU, ROM or EPROM, RAM and I/O lines embedded in it.
Some powerful microcontrollers may contain A/D converters, DMA channels, watch dog
timer, pulse width modulator etc.

Fig: Block diagram of microcomputer

1.1.1. Interface: The microprocessor communicates with the outside world though this
interface section.
1.1.2. System bus: A bus is physically a bunch of conducting wires over which the electrical
signals of the data are transmitted basically. It is a communication path between the
microprocessor and I/O devices and memory.
1.1.3. Input: The input unit transfer the processed data from the microprocessor to the
output devices like keyboard, LED etc.
1.1.4. Output: The output unit transfer the processed data from the microprocessor to the
output devices such as monitors, printers etc.
1.1.5. Microprocessor:-
 Microprocessor is a multipurpose programmable device that reads binary
(instructions/data) as input and processes data according to these instructions and
produces result as output.
 A programmable machine can be represented with 3 component like
 1. Processor
2. Memory
3. Input & output
 Microprocessor is also a clock driven semiconductor device consisting of electronic logic
circuits manufactured by using either LSI or VLSI technique.
 It is capable of performing various computing functions and making decisions to change
the sequence of program execution.
 The no. of bits a microprocessor can operate in one operation is called the word length of
that processor.
e.g 8-bit, 16-bit, 32-bit, 64-bit etc.
e.g 8085 microprocessor is an 3-bit processor.
8086 microprocessor is an 16-bit processor.
1.2. How does a Microprocessor Work?
 The microprocessor follows a sequence: Fetch, Decode, and then Execute.
 Initially, the instructions are stored in the memory in a sequential order. The
microprocessor fetches those instructions from the memory, then decodes it and
executes those instructions till STOP instruction is reached. Later, it sends the result in
binary to the output port. Between these processes, the register stores the temporarily
data and ALU performs the computing functions.
1.3. List of Terms Used in a Microprocessor

Here is a list of some of the frequently used terms in a microprocessor −

 Instruction Set − It is the set of instructions that the microprocessor can understand.
 Bandwidth − It is the number of bits processed in a single instruction.
 Clock Speed − It determines the number of operations per second the processor can
perform. It is expressed in megahertz (MHz) or gigahertz (GHz).It is also known as
Clock Rate.

 Word Length − It depends upon the width of internal data bus, registers, ALU, etc. An
8-bit microprocessor can process 8-bit data at a time. The word length ranges from 4 bits
to 64 bits depending upon the type of the microcomputer.

 Data Types − The microprocessor has multiple data type formats like binary, BCD,
ASCII, signed and unsigned numbers.

1.4. Features of a Microprocessor

Here is a list of some of the most prominent features of any microprocessor −

 Cost-effective − The microprocessor chips are available at low prices and results its low
cost.
  Size − The microprocessor is of small size chip, hence is portable.
 Low Power Consumption − Microprocessors are manufactured by using metaloxide
semiconductor technology, which has low power consumption.

 Versatility − The microprocessors are versatile as we can use the same chip in a number
of applications by configuring the software program.

 Reliability − The failure rate of an IC in microprocessors is very low, hence it is reliable.

1.5. Configuration:-
8085 is pronounced as "eighty-eighty-five" microprocessor. It is an 8-bit microprocessor
designed by Intel in 1977 using NMOS technology.
It has the following configuration −

 8-bit data bus

 16-bit address bus, which can address upto 64KB
 A 16-bit program counter
 A 16-bit stack pointer
 Six 8-bit registers arranged in pairs: BC, DE, HL
 Requires +5V supply to operate at 3.2 MHZ single phase clock
It is used in washing machines, microwave ovens, mobile phones, etc.

2. Functional or Architecture block diagram of intel 8085:-

The architecture of 8085 with this following image –

 Fig: Functional or Architecture of 8085

2.1. Functional Units:-

8085 consists of the following functional units −

1. Accumulator

It is an 8-bit register used to perform arithmetic, logical, I/O & LOAD/STORE operations. It is
connected to internal data bus & ALU.

2. Arithmetic and logic unit

As the name suggests, it performs arithmetic and logical operations like Addition, Subtraction,
AND, OR, etc. on 8-bit data.

3. General purpose register

There are 6 general purpose registers in 8085 processor, i.e. B, C, D, E, H & L. Each register
can hold 8-bit data.
These registers can work in pair to hold 16-bit data and their pairing combination is like B-C,
D-E & H-L.
 4. Program counter

It is a 16-bit register used to store the memory address location of the next instruction to be
executed. Microprocessor increments the program whenever an instruction is being executed, so
that the program counter points to the memory address of the next instruction that is going to be
executed.

5. Stack pointer

It is also a 16-bit register works like stack, which is always incremented/decremented by 2

during push & pop operations.

6. Temporary register

It is an 8-bit register, which holds the temporary data of arithmetic and logical operations.

7. Flag register

It is an 8-bit register having five 1-bit flip-flops, which holds either 0 or 1 depending upon the
result stored in the accumulator.
These are the set of 5 flip-flops −

 Sign (S)
 Zero (Z)
 Auxiliary Carry (AC)
 Parity (P)
 Carry (C)
Its bit position is shown in the following table −
D7 D6 D5 D4 D3 D2 D1 D0

S Z AC P CY

8. Instruction register and decoder

It is an 8-bit register. When an instruction is fetched from memory then it is stored in the
Instruction register. Instruction decoder decodes the information present in the Instruction
register.

9. Timing and control unit

It provides timing and control signal to the microprocessor to perform operations. Following are
the timing and control signals, which control external and internal circuits −

 Control Signals: READY, RD’, WR’, ALE

 Status Signals: S0, S1, IO/M’
 DMA Signals: HOLD, HLDA
 RESET Signals: RESET IN, RESET OUT

10. Interrupt control

As the name suggests it controls the interrupts during a process. When a microprocessor is
executing a main program and whenever an interrupt occurs, the microprocessor shifts the
control from the main program to process the incoming request. After the request is completed,
the control goes back to the main program.
There are 5 interrupt signals in 8085 microprocessor: INTR, RST 7.5, RST 6.5, RST 5.5,
TRAP.

11. Serial Input/output control

It controls the serial data communication by using these two instructions: SID (Serial input
data) and SOD (Serial output data).

12. Address buffer and address-data buffer

The content stored in the stack pointer and program counter is loaded into the address buffer
and address-data buffer to communicate with the CPU. The memory and I/O chips are
connected to these buses; the CPU can exchange the desired data with the memory and I/O
chips.

13. Address bus and data bus

Data bus carries the data to be stored. It is bidirectional, whereas address bus carries the location
to where it should be stored and it is unidirectional. It is used to transfer the data & Address I/O
devices.
3. Pin diagram of 8085 Microprocessor:-
The following image depicts the pin diagram of 8085 Microprocessor
 Fig: Pin diagram of 8085 microprocessor
The pins of a 8085 microprocessor can be classified into seven groups −

3.1. Address bus

A15-A8, it carries the most significant 8-bits of memory/IO address.

3.2. Data bus

AD7-AD0, it carries the least significant 8-bit address and data bus.

3.3. Control and status signals

These signals are used to identify the nature of operation. There are 3 control signal and 3 status
signals.
Three control signals are RD, WR & ALE.
 RD − This signal indicates that the selected IO or memory device is to be read and is
ready for accepting data available on the data bus.
  WR − This signal indicates that the data on the data bus is to be written into a selected
memory or IO location.
 ALE − It is a positive going pulse generated when a new operation is started by the
microprocessor. When the pulse goes high, it indicates address. When the pulse goes
down it indicates data.
Three status signals are IO/M, S0 & S1.

3.4. IO/M

This signal is used to differentiate between IO and Memory operations, i.e. when it is high
indicates IO operation and when it is low then it indicates memory operation.

3.5. S1 & S0

These signals are used to identify the type of current operation.

3.6. Power supply

There are 2 power supply signals − VCC & VSS. VCC indicates +5v power supply and VSS
indicates ground signal.

3.7. Clock signals

There are 3 clock signals, i.e. X1, X2, CLK OUT.

 X1, X2 − A crystal (RC, LC N/W) is connected at these two pins and is used to set
frequency of the internal clock generator. This frequency is internally divided by 2.
 CLK OUT − This signal is used as the system clock for devices connected with the
microprocessor.

3.8. Interrupts & externally initiated signals

Interrupts are the signals generated by external devices to request the microprocessor to perform
a task. There are 5 interrupt signals, i.e. TRAP, RST 7.5, RST 6.5, RST 5.5, and INTR. We will
discuss interrupts in detail in interrupts section.
 INTA − It is an interrupt acknowledgment signal.
 RESET IN − This signal is used to reset the microprocessor by setting the program
counter to zero.
 RESET OUT − This signal is used to reset all the connected devices when the
microprocessor is reset.
 READY − This signal indicates that the device is ready to send or receive data. If
READY is low, then the CPU has to wait for READY to go high.
 HOLD − This signal indicates that another master is requesting the use of the address
and data buses.
  HLDA (HOLD Acknowledge) − It indicates that the CPU has received the HOLD
request and it will relinquish the bus in the next clock cycle. HLDA is set to low after
the HOLD signal is removed.

3.9. Serial I/O signals

There are 2 serial signals, i.e. SID and SOD and these signals are used for serial
communication.
 SOD (Serial output data line) − The output SOD is set/reset as specified by the SIM
instruction.
 SID (Serial input data line) − The data on this line is loaded into accumulator whenever a
RIM instruction is executed.

4. Addressing Modes in 8085

These are the instructions used to transfer the data from one register to another register, from
the memory to the register, and from the register to the memory without any alteration in the
content. Addressing modes in 8085 is classified into 5 groups
4.1. Immediate addressing mode
In this mode, the 8/16-bit data is specified in the instruction itself as one of its operand. For
example: MVI K, 20F: means 20F is copied into register K.

4.2. Register addressing mode

In this mode, the data is copied from one register to another. For example: MOV K, B: means
data in register B is copied to register K.

4.3. Direct addressing mode

In this mode, the data is directly copied from the given address to the register. For
example: LDB 5000K: means the data at address 5000K is copied to register B.

4.4. Indirect addressing mode

In this mode, the data is transferred from one register to another by using the address pointed by
the register. For example: MOV K, B: means data is transferred from the memory address
pointed by the register to the register K.

4.5. Implied addressing mode

This mode doesn’t require any operand; the data is specified by the opcode itself. For
example: CMP.

5. Interrupts in 8085
Interrupts are the signals generated by the external devices to request the microprocessor to
perform a task. There are 5 interrupt signals, i.e. TRAP, RST 7.5, RST 6.5, RST 5.5, and INTR.
Interrupt are classified into following groups based on their parameter −
 Vector interrupt − In this type of interrupt, the interrupt address is known to the
processor. For example: RST7.5, RST6.5, RST5.5, TRAP.
 Non-Vector interrupt − In this type of interrupt, the interrupt address is not known to
the processor so, the interrupt address needs to be sent externally by the device to
perform interrupts. For example: INTR.
 Maskable interrupt − In this type of interrupt, we can disable the interrupt by writing
some instructions into the program. For example: RST7.5, RST6.5, RST5.5.
 Non-Maskable interrupt − In this type of interrupt, we cannot disable the interrupt by
writing some instructions into the program. For example: TRAP.
 Software interrupt − In this type of interrupt, the programmer has to add the
instructions into the program to execute the interrupt. There are 8 software interrupts in
8085, i.e. RST0, RST1, RST2, RST3, RST4, RST5, RST6, and RST7.
 Hardware interrupt − There are 5 interrupt pins in 8085 used as hardware interrupts,
i.e. TRAP, RST7.5, RST6.5, RST5.5, INTA.
Note − NTA is not an interrupt, it is used by the microprocessor for sending acknowledgement.
TRAP has the highest priority, then RST7.5 and so on.

5.1. Interrupt Service Routine (ISR)

A small program or a routine that when executed, services the corresponding interrupting source
is called an ISR.

5.2. TRAP

It is a non-maskable interrupt, having the highest priority among all interrupts. Bydefault, it is
enabled until it gets acknowledged. In case of failure, it executes as ISR and sends the data to
backup memory. This interrupt transfers the control to the location 0024H.

5.3. RST7.5

It is a maskable interrupt, having the second highest priority among all interrupts. When this
interrupt is executed, the processor saves the content of the PC register into the stack and
branches to 003CH address.

5.4. RST 6.5

It is a maskable interrupt, having the third highest priority among all interrupts. When this
interrupt is executed, the processor saves the content of the PC register into the stack and
branches to 0034H address.

5.5. RST 5.5

It is a maskable interrupt. When this interrupt is executed, the processor saves the content of the
PC register into the stack and branches to 002CH address.

5.6. INTR

It is a maskable interrupt, having the lowest priority among all interrupts. It can be disabled by
resetting the microprocessor.
When INTR signal goes high, the following events can occur −
 The microprocessor checks the status of INTR signal during the execution of each
instruction.
 When the INTR signal is high, then the microprocessor completes its current instruction
and sends active low interrupt acknowledge signal.
 When instructions are received, then the microprocessor saves the address of the next
instruction on stack and executes the received instruction.
6. Instruction Sets:-
Instruction sets are instruction codes to perform some task. It is classified into five categories.
6.1. Control instruction
6.2. Logical instructions
6.3. Branching instructions
6.4. Arithmetic instructions
6.5. Data-transfer instructions
6.1. Control instruction:-
Opcode Operand Meaning Explanation

NOP None No operation No operation is performed, i.e., the instruction is

fetched and decoded.

Halt and enter The CPU finishes executing the current instruction
HLT None
wait state and stops further execution. An interrupt or reset is
necessary to exit from the halt state.

DI None Disable The interrupt enable flip-flop is reset and all the
interrupts interrupts are disabled except TRAP.

EI None Enable The interrupt enable flip-flop is set and all the
interrupts interrupts are enabled.

Read interrupt This instruction is used to read the status of

RIM None
mask interrupts 7.5, 6.5, 5.5 and read serial data input bit.
 Set interrupt
SIM None This instruction is used to implement the interrupts
mask
7.5, 6.5, 5.5, and serial data output.

6.2. Logical instructions:-

Opcod Operand Meaning Explanation

e

Compare the
R The contents of the operand (register or memory)
CMP register or memory
are M compared with the contents of the
M with the
accumulator.
accumulator

Compare immediate
The second byte data is compared with the contents
CPI 8-bit data with the
of the accumulator.
accumulator

Logical AND
R The contents of the accumulator are logically AND
register or memory
ANA with M the contents of the register or memory, and
M with the
the result is placed in the accumulator.
accumulator

Logical AND The contents of the accumulator are logically AND

ANI 8-bit data immediate with the with the 8-bit data and the result is placed in the
accumulator accumulator.

Exclusive OR
R The contents of the accumulator are Exclusive OR
register or memory
XRA with M the contents of the register or memory, and
M with the
the result is placed in the accumulator.
accumulator

Exclusive OR The contents of the accumulator are Exclusive OR

XRI 8-bit data immediate with the with the 8-bit data and the result is placed in the
accumulator accumulator.

R Logical OR register The contents of the accumulator are logically OR

ORA or memory with the with M the contents of the register or memory, and
M accumulator result is placed in the accumulator.

Logical OR The contents of the accumulator are logically OR

ORI 8-bit data immediate with the with the 8-bit data and the result is placed in the
accumulator accumulator.

RLC None Rotate the Each binary bit of the accumulator is rotated left by
 one position. Bit D7 is placed in the position of D0
accumulator left as well as in the Carry flag. CY is modified
according to bit D7.

Each binary bit of the accumulator is rotated right

Rotate the by one position. Bit D0 is placed in the position of
RRC None
accumulator right D7 as well as in the Carry flag. CY is modified
according to bit D0.

Each binary bit of the accumulator is rotated left by

Rotate the one position through the Carry flag. Bit D7 is placed
RAL None accumulator left in the Carry flag, and the Carry flag is placed in the
through carry least significant position D0. CY is modified
according to bit D7.

Each binary bit of the accumulator is rotated right

Rotate the by one position through the Carry flag. Bit D0 is
RAR None accumulator right placed in the Carry flag, and the Carry flag is placed
through carry in the most significant position D7. CY is modified
according to bit D0.

Complement The contents of the accumulator are complemented.

CMA None
accumulator No flags are affected.

Complement carry The Carry flag is complemented. No other flags are

CMC None
affected.

STC None Set Carry Set Carry

6.3. Branching instructions:-

Opcode Operand Meaning Explanation

16-bit The program sequence is

JMP Jump
address transferred to the memory
unconditionally
address given in the operand.

16-bit Jump The program sequence is

Opcode Description Flag
address conditionally transferred to the memory
Status
address given in the operand
based on the specified flag of
JC Jump on
CY=1 the PSW.
Carry

JNC Jump on no CY=0

 Carry

JP Jump on S=0
positive

JM Jump on S=1
minus

JZ Jump on Z=1
zero

JNZ Jump on no Z=0

zero

JPE Jump on P=1

parity even

JPO Jump on P=0

parity odd

16-bit Unconditional The program sequence is

Opcode Description Flag
address subroutine call transferred to the memory
Status
address given in the operand.
Before transferring, the
CC Call on CY=1
address of the next
Carry
instruction after CALL is
pushed onto the stack.
CNC Call on no CY=0
Carry

CP Call on S=0
positive

CM Call on S=1
minus

CZ Call on zero Z=1

CNZ Call on no Z=0

zero

CPE Call on P=1

parity even
 CPO Call on P=0
parity odd

The program sequence is

Return from
None transferred from the
RET subroutine
subroutine to the calling
unconditionally
program.

Opcode Description Flag

Status

RC Return on CY=1
Carry

RNC Return on CY=0

no Carry

RP Return on S=0 The program sequence is

positive transferred from the
Return from subroutine to the calling
RM Return on S=1 None subroutine program based on the
minus conditionally specified flag of the PSW
and the program execution
RZ Return on Z=1 begins at the new address.
zero

RNZ Return on Z=0

no zero

RPE Return on P=1

parity even

RPO Return on P=0

parity odd

The contents of registers H

Load the & L are copied into the
program program counter. The
PCHL None
counter with contents of H are placed as
HL contents the high-order byte and the
contents of L as the loworder
byte.

RST 0-7 Restart The RST instruction is used

 as software instructions in a
program to transfer the
program execution to one of
the following eight locations.
Instruction Restart
Address

RST 0 0000H

RST 1 0008H

RST 2 0010H

RST 3 0018H

RST 4 0020H

RST 5 0028H

RST 6 0030H

RST 7 0038H
The 8085 has additionally 4
interrupts, which can
generate RST instructions
internally and doesn’t
require any external
hardware. Following are
those instructions and their
Restart addresses −
Interrupt Restart
Address

TRAP 0024H

RST 5.5 002CH

RST 6.5 0034H

RST 7.5 003CH

6.4. Arithmetic instructions:-

Opcode Operand Meaning Explanation
 The contents of the register or memory
are added to the contents of the
R Add register or
ADD accumulator and the result is stored in
memory, to the
M the accumulator.
accumulator
Example − ADD K.

The contents of the register or memory

R Add register to the & M the Carry flag are added to the
ADC accumulator with contents of the accumulator and the
M carry result is stored in the accumulator.
Example − ADC K

The 8-bit data is added to the contents

Add the immediate of the accumulator and the result is
ADI 8-bit data stored in the accumulator.
to the accumulator
Example − ADI 55K

The 8-bit data and the Carry flag are

Add the immediate added to the contents of the
ACI 8-bit data to the accumulator accumulator and the result is stored in
with carry the accumulator.
Example − ACI 55K

The instruction stores 16-bit data into

Reg. pair, 16bit Load the register the register pair designated in the
LXI operand.
data pair immediate
Example − LXI K, 3025M

The 16-bit data of the specified register

Add the register pair pair are added to the contents of the
DAD Reg. pair HL register.
to H and L registers
Example − DAD K

The contents of the register or the

Subtract the register memory are subtracted from the
R
SUB or the memory from contents of the accumulator, and the
M the accumulator result is stored in the accumulator.
Example − SUB K

The contents of the register or the

SBB R Subtract the source
memory & M the Borrow flag are
and borrow from the
M subtracted from the contents of the
accumulator
accumulator and the result is placed in
 the accumulator.
Example − SBB K

The 8-bit data is subtracted from the

Subtract the contents of the accumulator & the
SUI 8-bit data immediate from the result is stored in the accumulator.
accumulator
Example − SUI 55K

The contents of register H are

Subtract the exchanged with the contents of register
immediate from the D, and the contents of register L are
SBI 8-bit data exchanged with the contents of register
accumulator with
borrow E.
Example − XCHG

The contents of the designated register

Increment the or the memory are incremented by 1
R
INR register or the and their result is stored at the same
M memory by 1 place.
Example − INR K

The contents of the designated register

Increment register pair are incremented by 1 and their
INX R result is stored at the same place.
pair by 1
Example − INX K

The contents of the designated register

R Decrement the or memory are decremented by 1 and
DCR register or the their result is stored at the same place.
M memory by 1
Example − DCR K

The contents of the designated register

Decrement the pair are decremented by 1 and their
DCX R result is stored at the same place.
register pair by 1
Example − DCX K

The contents of the accumulator are

DAA None Decimal adjust
changed from a binary value to two 4-
accumulator
bit BCD digits.
If the value of the low-order 4-bits in
the accumulator is greater than 9 or if
AC flag is set, the instruction adds 6 to
 the low-order four bits.
If the value of the high-order 4-bits in
the accumulator is greater than 9 or if
the Carry flag is set, the instruction
adds 6 to the high-order four bits.
Example − DAA
6.5. Data-transfer instructions:-

Opcode Operand Meaning Explanation

This instruction copies the contents of the

Rd, Sc Copy from the source register into the destination register
MOV source (Sc) to
M, Sc without any alteration.
the
Dt, M destination(Dt) Example − MOV K, L

The 8-bit data is stored in the destination

Rd, data Move register or memory.
MVI
M, data immediate 8-bit
Example − MVI K, 55L

The contents of a memory location,

Load the specified by a 16-bit address in the operand,
LDA 16-bit address are copied to the accumulator.
accumulator
Example − LDA 2034K

The contents of the designated register pair

Load the point to a memory location. This instruction
LDAX B/D Reg. pair accumulator copies the contents of that memory location
indirect into the accumulator.
Example − LDAX K

The instruction loads 16-bit data in the

Load the
Reg. pair, 16-bit register pair designated in the register or the
LXI register pair
data memory.
immediate
Example − LXI K, 3225L

The instruction copies the contents of the

LHLD 16-bit address Load H and L
memory location pointed out by the address
registers direct
into register L and copies the contents of the
next memory location into register H.
 Example − LHLD 3225K

The contents of the accumulator are copied

into the memory location specified by the
operand.
STA 16-bit address 16-bit address This is a 3-byte instruction, the second byte
specifies the low-order address and the third
byte specifies the high-order address.
Example − STA 325K

The contents of the accumulator are copied

Store the into the memory location specified by the
STAX 16-bit address accumulator contents of the operand.
indirect
Example − STAX K

The contents of register L are stored in the

memory location specified by the 16-bit
address in the operand and the contents of H
register are stored into the next memory
Store H and L location by incrementing the operand.
SHLD 16-bit address
registers direct
This is a 3-byte instruction, the second byte
specifies the low-order address and the third
byte specifies the high-order address.
Example − SHLD 3225K

The contents of register H are exchanged

Exchange H with the contents of register D, and the
XCHG None and L with D contents of register L are exchanged with the
and E contents of register E.
Example − XCHG

The instruction loads the contents of the H

and L registers into the stack pointer
Copy H and L register. The contents of the H register
SPHL None registers to the provide the high-order address and the
stack pointer contents of the L register provide the low-
order address.
Example − SPHL

The contents of the L register are exchanged

XTHL None Exchange H
with the stack location pointed out by the
and L with top
contents of the stack pointer register.
of stack
 The contents of the H register are exchanged
with the next stack location (SP+1).
Example − XTHL

The contents of the register pair designated

in the operand are copied onto the stack in
the following sequence.
The stack pointer register is decremented
Push the and the contents of the high order register
PUSH Reg. pair register pair (B, D, H, A) are copied into that location.
onto the stack The stack pointer register is decremented
again and the contents of the low-order
register (C, E, L, flags) are copied to that
location.
Example − PUSH K

The contents of the memory location pointed

out by the stack pointer register are copied to
the low-order register (C, E, L, status flags)
of the operand.
The stack pointer is incremented by 1 and
Pop off stack to the contents of that memory location are
POP Reg. pair
the register pair copied to the high-order register (B, D, H,
A) of the operand.
The stack pointer register is again
incremented by 1.
Example − POPK

The contents of the accumulator are copied

Output the data
into the I/O port specified by the operand.
from the
OUT 8-bit port address accumulator to Example − OUT K9L
a port with 8bit
address

Input data to The contents of the input port designated in

accumulator the operand are read and loaded into the
IN 8-bit port address from a port accumulator.
with 8-bit
Example − IN5KL
address
7. Registers of 8085 microprocessor

A microprocessor is a multipurpose, programmable, clock-driven, register-based electronic

device that reads binary instructions from a storage device called memory, accepts binary data as
input and processes data according to those instructions and provide results as output. A 8085
microprocessor, is a second generation 8-bit microprocessor and is the base for studying and using
all the microprocessor available in the market.

Registers in 8085:
(a) General Purpose Registers –
The 8085 has six general-purpose registers to store 8-bit data; these are identified as- B, C, D, E, H,
and L. These can be combined as register pairs – BC, DE, and HL, to perform some 16-bit
operation. These registers are used to store or copy temporary data, by using instructions, during
the execution of the program.
(b) Specific Purpose Registers –
 Accumulator:
The accumulator is an 8-bit register (can store 8-bit data) that is the part of the arithmetic
and logical unit (ALU). After performing arithmetical or logical operations, the result is
stored in accumulator. Accumulator is also defined as register A.
 Flag registers:

The flag register is a special purpose register and it is completely different from other
registers in microprocessor. It consists of 8 bits and only 5 of them are useful. The other three
are left vacant and are used in the future Intel versions.These 5 flags are set or reset (when
value of flag is 1, then it is said to be set and when value is 0, then it is said to be reset) after
an operation according to data condition of the result in the accumulator and other registers.
The 5 flag registers are:
1. Sign Flag: It occupies the seventh bit of the flag register, which is also known as the
most significant bit. It helps the programmer to know whether the number stored in
the accumulator is positive or negative. If the sign flag is set, it means that number
stored in the accumulator is negative, and if reset, then the number is positive.
2. Zero Flag:: It occupies the sixth bit of the flag register. It is set, when the operation
performed in the ALU results in zero(all 8 bits are zero), otherwise it is reset. It helps
in determining if two numbers are equal or not.
 3. Auxiliary Carry Flag: It occupies the fourth bit of the flag register. In an arithmetic
operation, when a carry flag is generated by the third bit and passed on to the fourth
bit, then Auxiliary Carry flag is set. If not flag is reset. This flag is used internally for
BCD(Binary-Coded decimal Number) operations.
Note – This is the only flag register in 8085 which is not accessible by user.
4. Parity Flag: It occupies the second bit of the flag register. This flag tests for number
of 1’s in the accumulator. If the accumulator holds even number of 1’s, then this flag
is set and it is said to even parity. On the other hand if the number of 1’s is odd, then
it is reset and it is said to be odd parity.
5. Carry Flag: It occupies the zeroth bit of the flag register. If the arithmetic operation
results in a carry(if result is more than 8 bit), then Carry Flag is set; otherwise it is
reset.
(c) Memory Registers –
There are two 16-bit registers used to hold memory addresses. The size of these registers is 16 bits
because the memory addresses are 16 bits. They are :-
 Program Counter: This register is used to sequence the execution of the instructions. The
function of the program counter is to point to the memory address from which the next byte
is to be fetched. When a byte (machine code) is being fetched, the program counter is
incremented by one to point to the next memory location.
 Stack Pointer: It is used as a memory pointer. It points to a memory location in read/write
memory, called the stack. It is always incremented/decremented by 2 during push and pop
operation.
Example –
Here two binary numbers are added. The result produced is stored in the accumulator. Now lets
check what each bit means. Refer to the below explanation simultaneously to connect them with
the example.
  Sign Flag (7th bit): It is reset(0), which means number stored in the accumulator is
positive.
 Zero Flag (6th bit): It is reset(0), thus result of the operations performed in the ALU is
non-zero.
 Auxiliary Carry Flag (4th bit): We can see that b3 generates a carry which is taken by b4,
thus auxiliary carry flag gets set (1).
 Parity Flag (2nd bit): It is reset(0), it means that parity is odd. The accumulator holds odd
number of 1’s.
 Carry Flag (0th bit): It is set(1), output results in more than 8 bit.
8. Multiplexing and de multiplexing of address/data bus:
Let us consider the instruction to be executed as “MOV A, C”. Here in this case the value of
8 bit in the register C must be moved to the register. The given set of registers namely B, C, D,
E, H, and L must be connected to the internal bus by means of a multiplexer (many input but
only one output) or demultiplexer the reverse of multiplexer. The register meant to carry the
work selects the specific unit and sends the appropriate code to the multiplexer such that the
contents of register C are sent out to the multiplexer through the internal bus. The data from the
internal bus is thereafter received by the Accumulator.

Let us consider the entire execution process of the given instruction “MOV D, A”. Here in
this case, the bit value of the Accumulator gets moved to the register D. The bit value of 8 is sent
to the accumulator. The registers B, C, D, E, H, and L are connected to the internal bus through a
multiplexer/demultiplexer. The given register selects the unit for the appropriate code to the
demultiplexer such that the register named D receives all the contents from the internal bus to the
demultiplexer. Actually the basic concept lies in the fact that in the multiplexer many inputs
merges to form one output. Whereas the reverse process is applicable for the demultiplexer.
Hence in the address buffer we find The operations of arithmetic and logical sequence carried
out involves two operands, among which one is operand is provided by the accumulator, and the
other operand is provided by the Temp register. For example, in the addition process the
instruction to the B register, all the contents are deliberately moved to the Temp register and then
ultimately the Arithmetic Logical Unit performs the addition of register A and Temp register. In
similarity with the W and Z.
9. Priority concept:-
9.1. TRAP

It is a non-maskable interrupt, having the highest priority among all interrupts. Bydefault, it is
enabled until it gets acknowledged. In case of failure, it executes as ISR and sends the data to
backup memory. This interrupt transfers the control to the location 0024H.

9.2. RST7.5

It is a maskable interrupt, having the second highest priority among all interrupts. When this
interrupt is executed, the processor saves the content of the PC register into the stack and
branches to 003CH address.

9.3. RST 6.5

It is a maskable interrupt, having the third highest priority among all interrupts. When this
interrupt is executed, the processor saves the content of the PC register into the stack and
branches to 0034H address.

9.4. RST 5.5

It is a maskable interrupt. When this interrupt is executed, the processor saves the content of the
PC register into the stack and branches to 002CH address.

9.5. INTR

It is a maskable interrupt, having the lowest priority among all interrupts. It can be disabled by
resetting the microprocessor.
When INTR signal goes high, the following events can occur −
 The microprocessor checks the status of INTR signal during the execution of each
instruction.
 When the INTR signal is high, then the microprocessor completes its current instruction
and sends active low interrupt acknowledge signal.
 When instructions are received, then the microprocessor saves the address of the next
instruction on stack and executes the received instruction.

Unit 2
Memory