COMPUTER ORGANIZATION (21ISE34)

MODULE – 1
Basic Structure of Computers: Basic Operational of Concepts, Bus Structures, Performance– Processor
Clock, Basic Performance Equation, Clock Rate, Performance Measurement.
Machine Instructions and Programs: Memory Location and Addresses, Memory Operations,
Instructions and Instruction Sequencing, Addressing Modes, Assembly Language, Additional
Instructions.
Textbook 1: Ch 1: 1.3, 1.4, 1.6.1, 1.6.2, 1.6.4, 1.6.7. Ch 2: 2.2, 2.3, 2.4, 2.5, 2.6, 2.10

BASIC OPERATIONAL CONCEPTS

With a neat diagram, Explain the basic operational concept of a computer. (or)
Explain the function of processor register with a block diagram. (or)
Explain the steps involved in the execution of instruction: Add LOCA,R0

To perform a given task, program consist of list of instructions is stored in memory.

• An Instruction consists of 2 parts, 1) Operation code (Opcode) and 2) Operands.
OPCODE OPERANDS
• The data/operands are stored in memory.
• The individual instruction is brought from the memory to the processor.
• Then, the processor performs the specified operation.
• Let us see a typical instruction
ADD LOCA, R0
• This instruction is an addition operation. The following are the steps to execute the instruction: Step 1:
Fetch the instruction from main-memory into the processor.
Step 2: Fetch the operand at location LOCA from main-memory into the processor.
Step 3: Add the memory operand (i.e. fetched contents of LOCA) to the contents of register R0. Step 4: Store
the result (sum) in R0.
• The same instruction can be realized using 2 instructions as:
Load LOCA, R1;
ADD R1,R2
• The following are the steps to execute the instruction:
Step 1: Fetch the instruction from main-memory into the processor.
Step 2: Fetch the operand at location LOCA from main-memory into the register R1.
Step 3: Add the content of Register R1 and the contents of register R0.
Step 4: Store the result (sum) in R0.

Figure: Connection between the processor and the memory

Dept. of ISE / GAT Page 1

 COMPUTER ORGANIZATION (21ISE34)

Main Parts of Processor (Processor registers)

• The processor contains ALU, control-circuitry and many registers.
• The instruction-register(IR) holds the instruction that is currently being executed.
• The instruction is then passed to the control-unit, which generates the timing-signals that determine when a given action is to
take place
• The PC(Program Counter) contains the memory-address of the next-instruction to be fetched & executed. It keeps track
execution of the program.
• During the execution of an instruction, the contents of PC are updated to point to next instruction.
• The processor also contains „n‟ general-purpose registers R0 through Rn-1.
• The MAR (Memory Address Register) holds the address of the memory-location to be accessed.
• The MDR (Memory Data Register) contains the data to be written into or read out of the addressed location.
Operating steps are
1. Programs reside in the memory & usually get these through the I/P unit.
2. Execution of the program starts when the PC is set to point at the first instruction of the program.
3. Contents of PC are transferred to MAR and a Read Control Signal is sent to the memory.
4. After the time required to access the memory elapses, the address word is read out of the memory and loaded into the MDR.
5. Now contents of MDR are transferred to the IR & now the instruction is ready to be decoded and executed.
6. If the instruction involves an operation by the ALU, it is necessary to obtain the required operands.
7. An operand in the memory is fetched by sending its address to MAR & Initiating a read cycle.
8. When the operand has been read from the memory to the MDR, it is transferred from MDR to the ALU.
9. After one or two such repeated cycles, the ALU can perform the desired operation.
10. If the result of this operation is to be stored in the memory, the result is sent to MDR.
11. Address of location where the result is stored is sent to MAR & a write cycle is initiated.
12. The contents of PC are incremented so that PC points to the next instruction that is to be executed.
_________________________________________________________
BUS STRUCTURES
Explain in brief the single bus structure.
• To achieve a reasonable speed of operation, a computer must be organized so that all its units can handle one full word of
data at a given time. A bus is a group of lines that serves as a connecting path for several devices.
• A bus may be lines or wires.
• The lines carry data or address or control signal.
• There are 2 types of Bus structures: 1) Single Bus Structure and 2) Multiple Bus Structure.
1) Single Bus Structure
➢ Because the bus can be used for only one transfer at a time, only 2 units can actively use the bus at any
given time.
➢ Bus control lines are used to arbitrate multiple requests for use of the bus.
➢ Advantages:
1) Low cost &
2) Flexibility for attaching peripheral devices.
2) Multiple Bus Structure
➢ Systems that contain multiple buses achieve more concurrency in operations.
➢ Two or more transfers can be carried out at the same time.
➢ Advantage: Better performance.
➢ Disadvantage: Increased cost.

• The devices connected to a bus vary widely in their speed of operation.

• To synchronize their operational-speed, buffer-registers can be used.
• Buffer Registers
→ are included with the devices to hold the information during transfers.
→ prevent a high-speed processor from being locked to a slow I/O device during data transfers.

Dept. of ISE / GAT Page 2

 COMPUTER ORGANIZATION (21ISE34)

PERFORMANCE
What are the factors that affect performance? Explain any four.
The most important measure of the performance of a computer is how quickly it can execute programs. The speed with which a
computer executes program is affected by the design of its hardware and its machine level instructions, compiler that translates
program into machine level language. For best performance, it is necessary to design the compiler, the machine instruction set,
and the hardware in a coordinated way.
The total time required to execute the program is elapsed time is a measure of the performance of the entire computer
system. It is affected by the speed of the processor, the disk and the printer. The time needed to execute an instruction is called the
processor time.
Just as the elapsed time for the execution of a program depends on all units in a computer system, the processor time
depends on the hardware involved in the execution of individual machine instructions. This hardware comprises the processor and
the memory which are usually connected by the bus as shown in the fig c.

The pertinent parts of the fig. c are repeated in figure which includes the cache memory as part of the processor unit.
Let us examine the flow of program instructions and data between the memory and the processor. At the start of
execution, all program instructions and the required data are stored in the main memory. As the execution proceeds, instructions
are fetched one by one over the bus into the processor, and a copy is placed in the cache later if the same instruction or data item is
needed a second time, it is read directly from the cache.
The processor and relatively small cache memory can be fabricated on a single IC chip. The internal speed of performing
the basic steps of instruction processing on chip is very high and is considerably faster than the speed at which the instruction and
data can be fetched from the main memory. A program will be executed faster if the movement of instructions and data between
the main memory and the processor is minimized, which is achieved by using the cache
For example:- Suppose a number of instructions are executed repeatedly over a short period of time as happens in a
program loop. If these instructions are available in the cache, they can be fetched quickly during the period of repeated use. The
same applies to the data that are used repeatedly.

PROCESSOR CLOCK
Define processor clock.
• The processor circuits are controlled by timing signals called as Clock.
• It defines constant time intervals and are called as Clock Cycles.
• To execute one instruction there are 3 basic steps namely (fetch, decode and execute).
• The performance of the processor depends on the length of the clock cycle. To obtain high performance reduce the
length of the clock cycle. Let ‘ P ’ be the number of clock cycles generated by the Processor and ‘ R ‘ be the Clock rate .
• The Clock rate is inversely proportional to the number of clock cycles.i.e R = 1/P.

Explain basic performance equation. Explain the role of parameters in the equation of the computer.
BASIC PERFORMANCE EQUATION
• Let ‘ T ‘ be total time required to execute the program.
‘N ‘ be the number of instructions contained in the program.
S ‘ be the average number of steps required to one instruction.
R’ be number of clock cycles per second generated by the processor to execute one program.
T=N*S/R
This equation is called as Basic Performance Equation.
• For the programmer the value of T is important. To obtain high performance it is necessary to reduce the values of N and
S and to increase the value of R.
CLOCK RATE
Define clock rate.
There are 2 possibilities for increasing the clock rate R.

Dept. of ISE / GAT Page 3

 COMPUTER ORGANIZATION (21ISE34)

i)Improving the integrated circuit technology(IC) makes logic circuit faster , which reduce the time needed to complete
basic step. This allows clock period P to be reduced and clock rate R to be R to be increased.
ii) Reducing the amount of processing done in one basic step , also makes it possible to reduce the clock period P.
• In the presence of a cache , the percentage of accesses to the main memory is small.Hence , much of the performance
gain expected from the use of faster technology can be realized. The value of T will be reduced by the same factor as R
is increased because S and N are not affected.

PERFORMANCE MEASUREMENT
Explain performance measurement? (OR) Explain the overall SPEC rating for the computer in a
program suite.
• The performance measure is the time taken by the computer to execute a given bench mark.
• A non profit organization called SPEC( system performance evaluation corporation) selects and publishes bench marks.

If the SPEC rating = 50 Means that the computer under test is 50 times as fast as the ultra sparc 10
• The SPEC repeated for all the programs in the SPEC suit, and the geometric mean of the result is computed.
• Let SPECi be the rating for program ‘i’ in the suite. The overall SPEC rating for the computer is given by

(Where ‘n’ = number of programs in suite.

__________________________________________________________________________________________________________________________________

MEMORY LOCATIONS AND ADDRESS

• The memory consists of many millions of storage cells(flip-flop), each of which can store a bit of information having the
value 0 or 1.
• The memory is organized so that a group of n bits can be stored or retrieved in a single, basic operation. Each group of n
bits is referred to as a word of information, and n is called the word length.
• A unit of 8 bits is called a byte.
• Modern computers have word lengths that typically range from 16 to 64 bits. If the word length of a computer is 32 bits,
a single word can store a 32-bit 2’s complement number or four ASCII characters, each occupying 8 bits.
• Accessing the memory to store or retrieve a single item of information, either a word or a byte, requires distinct names
or addresses for each item location( It is customary to use numbers from 0 through 2 K-1) for some suitable values of k, as
the addresses of successive locations in the memory.

Figure: Memory words

Dept. of ISE / GAT Page 4

 COMPUTER ORGANIZATION (21ISE34)

• The 2k addresses constitute the address space of the computer, and the memory can have up to 2 k addressable locations.
24-bit address generates an address space of 2 24 (16,777,216) locations. A 32-bit address creates an address space of 232
or 4G (4 giga) locations.

BYTE ADDRESSABILITY
Each• byte of addressable
In byte the memory aresuccessive
memory, addressed, thisrefer
addresses addressing usedbyteinlocations
to the successive most computers
in the memory.are called byte
• Byte locations
addressability. Hencehave addresses 0,1,2……
Byte Addressability is the process of assignment of address to successive
• If the word length of the machine is 32 bits, successive words are located at addresses 0,4,8,…., with each word
bytes consisting
of the memory. The successive bytes have the addresses 1, 2, 3, 4………….2n-1. The
of four bytes.
BIG-ENDIAN AND LITTLE-ENDIAN ASIGNMENTS
memory is accessed in words.
Define byte addressability. Explain Big-endian and Little –endian with an example.
There are two ways in which byte addresses are arranged
1) BIG-ENDIAN: lower byte addresses are used for the more significant bytes (the leftmost bytes) of the word.
2) LITTLE-ENDIAN: lower byte addresses are used for the less significant bytes (the rightmost bytes) of the word.
The same ordering is also used for labeling bits within a byte, that is, b7, b6, …., b0, from left to right.

• Consider a 32-bit integer (in hex): 0x12345678 which consists of 4 bytes: 12, 34, 56, and 78.
➢ Hence this integer will occupy 4 bytes in memory.
➢ Assume, we store it at memory address starting 1000.
➢ On little-endian, memory will look like
Address Value
1000 78
1001 56
1002 34
1003 12

➢ On big-endian, memory will look like

Address Value
1000 12
1001 34
1002 56
1003 78

Byte and word addressing

Dept. of ISE / GAT Page 5

 COMPUTER ORGANIZATION (21ISE34)

WORD ALLIGNMENT
• Words are said to be aligned in memory if they begin at a byte address that is a multiple of the number of bytes in a
word. The memory of bytes in a word is a power of 2.
• For example
(a) , if the word length is 16 (2 bytes), aligned words begin at byte addresses 0,2,4,…,
(b) a word length of 64 (23 bytes), aligned words begin at bytes addresses 0,8,16 ….
Words are said to have unaligned addresses, if words can begin at an arbitrary byte address.

ACCESSING NUMBERS, CHARACTERS, AND CHARACTER STRINGS:-

• A number usually occupies one word. It can be accessed in the memory by specifying its word address. Similarly,
individual characters can be accessed by their byte address.
• The beginning of the string is indicated by giving the address of the byte containing its first character.
• There are two ways to indicate the length of the string.
(i) A special control character with the meaning “end of string” can be used as the last character in the
string,
(ii) a separate memory word location or processor register can contain a number indicating the length of
the string in bytes
_________________________________________________________________________________

MEMORY OPERATIONS
Two basic operations involving the memory are needed,
• LOAD (Read or Fetch): The load operation transfers a copy of the contents of a specific memory location to the
processor. The memory contents remain unchanged.
• STEPS
(1) Processor sends the address of the desired location to the memory
(2) Processor issues “read‟ signal to memory to fetch the data .
(3) Memory reads the data stored at that address.
(4) Memory sends the read data to the processor processor sends the address of the desired location to the memory
and requests that its contents be read.
(5) The memory reads the data stored at that address and sends them to the processor.
• STORE(Write): The store operation transfers an item of information from the processor to a
specific memory location, destroying the former contents of that location.
• STEPS
(a) Processor sends the address of the memory location where it wants to store data.
(b) Processor issues „write‟ signal to memory to store the data.
(c) Content of register(MDR) is written into the specified memory location The processor sends the address of
the desired location to the memory.
______________________________________________________________________________________________________

INSTRUCTIONS & INSTRUCTION SEQUENCING

A computer must have instructions capable of performing 4 types of operations:
1) Data transfers between the memory and the processor registers (MOV, PUSH, POP, XCHG),
2) Arithmetic and logic operations on data (ADD, SUB, MUL, DIV, AND, OR, NOT),
3) Program sequencing and control (CALL.RET, LOOP, INT),
4) I/0 transfers (IN, OUT)

REGISTER TRANSFER NOTATION (RTN)

• Possible locations which transfers of information occurs memory locations, processor registers, or registers in the I/O
subsystem.
• We identify a memory location by a symbolic name (in uppercase alphabets).
For example, LOC, PLACE, NUM etc indicate memory locations.R0, R5 etc indicate processor register.
DATAIN, OUTSTATUS etc indicate I/O registers.
• For example,
R<-[LOC] means that the contents of memory location LOC are transferred into processor register R1 (The contents of a location
are denoted by placing square brackets around the name of the location).
R3<-[R1]+[R2] indicates the operation that adds the contents of registers R1 and R2 ,and then places their sum into
register R3.
• This type of notation is known as RTN(Register Transfer Notation).

Dept. of ISE / GAT Page 6

 COMPUTER ORGANIZATION (21ISE34)

ASSEMBLY LANGUAGE NOTATION

To represent machine instructions and programs, assembly language format can be used.
• For example,
i) Move LOC, R1;
This instruction transfers data from memory-location LOC to processor-register R1. The contents of LOC are
unchanged by the execution of this instruction, but the old contents of register R1 are overwritten.
ii) Add R1, R2, R3;
This instruction adds 2 numbers contained in processor-registers R1 and R2, and places their sum in R3.
• A computer performs its task according to the program stored in memory. A program is a collection of instructions which
tell the processor to perform a basic operation like addition, reading from keyboard etc.
• Possible locations that may be involved in data transfers are memory locations, processor registers or registers in the I/O
subsystem.
BASIC INSTRUCTION TYPES
Explain basic types of instruction to be carried out C=A+B,(OR)
With suitable example, explain 3 address, 2 address,1 address and zero address machine instructions.
C=A+B; This statement is a command to the computer to add the current values of the two variables A and B, and to assign the
sum to a third variable C.
✓ When the program is compiled, each variable is assigned a distinct address in memory.
✓ The contents of these locations represent the values of the three variables
✓ The statement C<-[A]+[B] indicates that the contents of memory locations A and B are fetched from memory,
transferred to the processor, sum is computed and then result is stored in memory location C.
i) Three-Address Instruction
✓ The instruction has general format Operation Source1, Source2, Destination
✓ For example, Add A, B, C; operands A and B are called the source operands, C is called the destination operand, and Add
is the operation to be performed.
✓
ii)Two-Address Instruction
✓ The instruction has general format Operation Source, Destination
✓ For example, Add A, B; performs the operation B<-[A]+[B].
✓ When the sum is calculated, the result is sent to the memory and stored in location B, replacing the original contents of
this location. This means that operand B is both a source and a destination.
✓ The operation C<-[A]+[B] can be performed by the two-instruction sequence
Move B, C
Add A, C

iii) One-Address Instruction

✓ The instruction has general format Operation Source/Destination
✓ For example, Add A ; Add the contents of memory location A to the contents of the accumulator register and place the
sum back into the accumulator.
✓ Load A; This instruction copies the contents of memory location A into the accumulator and
Store A; This instruction copies the contents of the accumulator into memory location A.
The operation C<-[A]+[B] can be performed by executing the sequence of instructions .
Load A
Add B Store C
✓ The operand may be a source or a destination depending on the instruction. In the Load instruction, address A specifies
the source operand, and the destination location, the accumulator, is implied. On the other hand, C denotes the destination
location in the Store instruction, whereas the source, the accumulator, is implied.

iv) Zero-Address Instruction

1) The locations of all operands are defined implicitly. The operands are stored in a structure called pushdown stack. In this
case, the instructions are called zero-address instructions.
2) Access to data in the registers is much faster than to data stored in memory locations because the registers are inside the
processor.
3) Let Ri represent a general-purpose register. The instructions
Load A,Ri
Store Ri,A
Add A,Ri
are generalizations of the Load, Store and Add Instructions for the single-accumulator case, in which register Ri performs
the function of the accumulator.
4) In processors where arithmetic operations as allowed only on operands that are in processor registers, the C=A+B task
can be performed by the instruction sequence.

Dept. of ISE / GAT Page 7

 COMPUTER ORGANIZATION (21ISE34)

INSTRUCTION EXECUTION & STRAIGHT LINE SEQUENCING

Explain instruction execution and Straight line Sequencing
The program is executed as follows:
1) Initially, the address of the first instruction is loaded into PC (Program counter is a register which holds the address of
the next instruction to be executed)
2)Then, the processor control circuits use the information in the PC to fetch and execute instructions, one at a time, in the
order of increasing addresses. This is called straight-line sequencing (Figure)
3) During the execution of each instruction, the PC is incremented by 4 to point to the next instruction.

✓ Executing given instruction is a two-phase procedure

i)In fetch phase, the instruction is fetched from the memory location (whose address is in the PC) and placed in the
IR of the processor
ii) In execute phase, the contents of IR is examined to determine which operation is to be performed. The specified
operation is then performed by the processor.

BRANCHING
• Consider the task of adding a list of n numbers.
• The number of entries in the list n is stored in memory location N. (Figure 2.10).
• Register R1 is used as a counter to determine the number of time the loop is executed.
• The contents of location N are loaded into register R1 at the beginning of the program.
• The loop is a straight line sequence of instructions executed as many times as needed. It starts at location LOOP and ends
at the instruction Branch>0.
• During each pass through this loop,
▪ the address of the next list entry is determined
• entry is fetched and added to R0. .
• The instruction Decrement R1 reduces the contents of R1 by 1 each time through the loop.
Then Branch instruction loads a new value into the program counter. As a result, the processor fetches and executes the
instruction at this new address called the branch target.
✓ A conditional branch instruction causes a branch only if a specified condition is satisfied. If the condition is not satisfied,
the PC is incremented in the normal way, and the next instruction in sequential address order is fetched and executed.

Dept. of ISE / GAT Page 8

 COMPUTER ORGANIZATION (21ISE34)

CONDITION CODES
What are condition code flags? Explain four commonly used flags.
The processor keeps track of information about the results of various operations. This is accomplished by recording the required
information in individual bits, called condition code flags.
✓ These flags are grouped together in a special processor-register called the condition code register (or statue register).
✓ Four commonly used flags are
→ N (negative) set to 1 if the result is negative, otherwise cleared to 0
→ Z (zero) set to 1 if the result is 0; otherwise, cleared to 0
→ V (overflow) set to 1 if arithmetic overflow occurs; otherwise, cleared to 0
→ C (carry) set to 1 if a carry-out results from the operation; otherwise cleared to 0.

ADDRESSING MODES
*****What is an addressing mode? Explain different generic addressing mode with an example for each.
The different ways in which the location of an operand is specified in an instruction are referred to as addressing modes.

Dept. of ISE / GAT Page 9

 COMPUTER ORGANIZATION (21ISE34)

IMPLEMENTATION OF VARIABLE AND CONSTANTS

• Variable is represented by allocating a register or memory location to hold its value.
• The value can be changed as needed using appropriate instructions.
• There are 2 accessing modes to access the variables.
i) Register mode
ii) Absolute mode
Register mode
✓ The operand is the contents of a register.
✓ The name (or address) of the register is given in the instruction.
✓ Registers are used as temporary storage locations where the data in a register are accessed.
✓ For example, the instruction,
Move R1, R2 Copy content of register R1 into register R2
Absolute mode
✓ The operand is in a memory-location.
✓ The address of memory-location is given explicitly in the instruction.
✓ For example, the instruction,
Move LOC, R2 ; Copy content of memory-location LOC into register R2
Immediate Mode
✓ The operand is given explicitly in the instruction.
✓ For example, the instruction,
Move #200, R0 ;Place the value 200 in register R0
✓ Clearly, the immediate mode is only used to specify the value of a source-operand.
INDIRECTION AND POINTERS
✓ The instruction does not give the operand or its address explicitly.
✓ It provides information from which the memory-address of the operand can be determined.
✓ This address as the effective address(EA) of the operand.
Indirect Mode
✓ The EA of the operand is the contents of a register(or memory-location) whose address appears in the instruction.
✓ The register (or memory-location) that contains the address of an operand is called a pointer. {The indirection s denoted
by ( ) sign around the register or memory-location.
E.g: Add (R1),R0;The operand is in memory. Register R1 gives the effective-address(B) of the operand. The data is read
from location B and added to contents of register R0

✓ To execute the Add instruction in fig (a), the processor uses the value which is in register R1, as the EA of the operand.
✓ It requests a read operation from the memory to read the contents of location B. The value read is the desired operand,
which the processor adds to the contents of register R0.
✓ Indirect addressing through a memory location is also possible as shown in fig (b). In this case, the processor first reads
the contents of memory location A, then requests a second read operation using the value B as an address to obtain the
operand.

Dept. of ISE / GAT Page 10

 COMPUTER ORGANIZATION (21ISE34)

➢ In above program, Register R2 is used as a pointer to the numbers in the list, and the operands are accessed indirectly
through R2.
➢ The initialization-section of the program loads the counter-value n from memory-location N into R1 and uses the
immediate addressing-mode to place the address value NUM1, which is the address of the first number in the list, into
R2. Then it clears R0 to 0.
➢ The first two instructions in the loop implement the unspecified instruction block starting at LOOP.
➢ The first time through the loop, the instruction Add (R2), R0 fetches the operand at location NUM1 and adds it to R0.
➢ The second Add instruction adds 4 to the contents of the pointer R2, so that it will contain the address value NUM2 when
the above instruction is executed in the second pass through the loop.
INDEXING AND ARRAYS
✓ A different kind of flexibility for accessing operands is useful in dealing with lists and arrays.
Index mode
✓ The operation is indicated as X(Ri)
where X=the constant value contained in the instruction
Ri=the name of the index register
✓ The effective-address of the operand is given by EA=X+[Ri] .
✓ The contents of the index-register are not changed in the process of generating the effective-address.
✓ In an assembly language program, the constant X may be given either
→ as an explicit number or
→ as a symbolic-name representing a numerical value.

✓ Fig(a) illustrates two ways of using the Index mode. In fig(a), the index register, R1, contains the address of a memory
location, and the value X defines an offset(also called a displacement) from this address to the location where the
operand is found.
✓ An alternative use is illustrated in fig(b). Here, the constant X corresponds to a memory address, and the contents of the
index register define the offset to the operand. In either case, the effective address is the sum of two values; one is given
explicitly in the instruction, and the other is stored in a register.

Dept. of ISE / GAT Page 11

 COMPUTER ORGANIZATION (21ISE34)

Base with Index Mode

➢ Another version of the Index mode uses 2 registers which can be denoted as (Ri, Rj)
➢ Here, a second register may be used to contain the offset X.
➢ The second register is usually called the base register.
➢ The effective-address of the operand is given by EA=[Ri]+[Rj]
➢ This form of indexed addressing provides more flexibility in accessing operands, because both components of the
effective address can be changed.
Base with Index & Offset Mode
➢ Another version of the Index mode uses 2 registers plus a constant, which can be denoted as X(Ri, Rj)
➢ The effective-address of the operand is given by EA=X+[Ri]+[Rj]
➢ This added flexibility is useful in accessing multiple components inside each item in a record, where the beginning of an
item is specified by the (Ri, Rj) part of the addressing-mode. In other words, this mode implements a 3-dimensional
array.

RELATIVE ADDRESSING MODE

➢ This is similar to index-mode with an exception: The effective address is determined using the PC in place of the general
purpose register Ri.
➢ The operation is indicated as X(PC).
➢ X(PC) denotes an effective-address of the operand which is X locations above or below the current contents of PC.
➢ Since the addressed-location is identified "relative" to the PC, the name Relative mode is associated with this type of
addressing.
➢ This mode is used commonly in conditional branch instructions.
➢ An instruction such as Branch > 0 LOOP ; Causes program execution to go to the branch target
location identified by name LOOP if branch condition is satisfied.

ADDITIONAL ADDRESSING MODES

The following 2 modes are useful for accessing data items in successive locations in the memory.
Auto-increment Mode
➢ The effective-address of operand is the contents of a register specified in the instruction (Fig: 2.16).
➢ After accessing the operand, the contents of this register are automatically incremented to point to the next item in a list.
➢ Implicitly, the increment amount is 1.
➢ This mode is denoted as
(Ri)+ ;where Ri=pointer register

Dept. of ISE / GAT Page 12

 COMPUTER ORGANIZATION (21ISE34)

Auto-decrement Mode
➢ The contents of a register specified in the instruction are first automatically decremented and are then used as the
effective address of the operand.
➢ This mode is denoted as
-(Ri) ;where Ri=pointer register
➢ These 2 modes can be used together to implement an important data structure called a stack.

__________________________________________________________________________________________________________________________________
ASSEMBLY LANGUAGE
➢ A complete set of symbolic names and rules for their use constitute an assembly language.
➢ The set of rules for using the mnemonics in the specification of complete instructions and programs is called the syntax
of the language.
➢ Programs written in an assembly language can be automatically translated into a sequence of machine instructions by a
program called an assembler.
➢ The user program in its original alphanumeric text formal is called a source program, and the assembled machine
language program is called an object program.
➢ Move instruction is written is MOVE R0,SUM ;The mnemonic MOVE represents the binary pattern, or OP code, for the
operation performed by the instruction.
➢ The instruction ADD #5,R3 ;Adds the number 5 to the contents of register R3 and puts the result back into register R3.

ASSEMBLER DIRECTIVES
What is an assembler directive? Explain some of commands in assembler directive.

➢ EQU informs the assembler about the value of an identifier (Figure: 2.18).
Ex: SUM EQU 200 ; This statement informs the assembler that the name SUM should be replaced by the value 200
wherever it appears in the program.
➢ ORIGIN tells the assembler about the starting-address of memory-area to place the data block.

➢ DATAWORD directive tells the assembler to load a value (say 100) into the location (say 204). Ex: N DATAWORD 100

➢ RESERVE directive declares that a memory-block of 400 bytes is to be reserved for data and that the name NUM1 is to
be associated with address 208.
Ex: NUM1 RESERVE 400

➢ END directive tells the assembler that this is the end of the source-program text.
➢ RETURN directive identifies the point at which execution of the program should be terminated.

Dept. of ISE / GAT Page 13

 COMPUTER ORGANIZATION (21ISE34)

➢ Any statement that makes instructions or data being placed in a memory-location may be given a label. The label(say N
or NUM1) is assigned a value equal to the address of that location.
General format of a statement
➢ Most assembly languages require statements in a source program to be written in the form:
Label Operation Operands Comment
➢ Label is an optional name associated with the memory-address where the machine language instruction produced from
the statement will be loaded.

➢ The Operation field contains the OP-code mnemonic of the desired instruction or assembler → The

➢ Operand field contains addressing information for accessing one or more operands, depending on the type of instruction.

➢ Comment field is used for documentation purpose to make the program easier to understand.

ASSEMBLY AND EXECUTION OF PRGRAMS

➢ Programs written in an assembly language are automatically translated into a sequence of machine instructions by the
assembler.

➢ Assembler program
→ replaces all symbols denoting operations & addressing-modes with binary-codes used in machine instructions.
→ replaces all names and labels with their actual values.
→ assigns addresses to instructions & data blocks, starting at the address given in the ORIGIN directive.
→ inserts constants that may be given in DATAWORD directives.
→ reserves memory-space as requested by RESERVE directives.
• Two Pass Assembler has 2 passes:
1) First Pass: Work out all the addresses of labels.
➢ As the assembler scans through a source-program, it keeps track of all names of numerical- values that
correspond to them in a symbol-table.
2) Second Pass: Generate machine code, substituting values for the labels.
➢ When a name appears a second time in the source-program, it is replaced with its value from the table
➢ The assembler stores the object-program on a magnetic-disk. The object-program must be loaded into the memory of the
computer before it is executed. For this, a Loader program is used.
➢ Debugger program is used to help the user find the programming errors.
➢ Debugger program enables the user
→ to stop execution of the object-program at some points of interest and
→ to examine the contents of various processor registers and memory-location .
Dept. of ISE / GAT Page 14
 COMPUTER ORGANIZATION (21ISE34)

_________________________________________________________________________________________________________________________________
ADDITIONAL INSTRUCTIONS
LOGIC INSTRUCTIONS
• Logic operations such as AND, OR, and NOT applied to individual bits.
• These are the basic building blocks of digital-circuits.

• This is also useful to be able to perform logic operations is software, which is done using instructions that apply these operations
to all bits of a word or byte independently and in parallel.
• For example, the instruction
Not dst
SHIFT AND ROTATE INSTRUCTIONS
• There are many applications that require the bits of an operand to be shifted right or left some specified number of bit positions.
• The details of how the shifts are performed depend on whether the operand is a signed number or some more general binary-
coded information.
• For general operands, we use a logical shift.
For a number, we use an arithmetic shift, which preserves the sign of the number.
Logical Shifts
• Two logical shift instructions are needed, one for shifting left(LShiftL) and another for shifting right(LShiftR).
• These instructions shift an operand over a number of bit positions specified in a count operand contained in the instruction.

Explain shift , rotate and logical operation with an example?

ROTATE OPERATIONS
• In shift operations, the bits shifted out of the operand are lost, except for the last bit shifted out which is retained in the Carry-
flag C.
• To preserve all bits, a set of rotate instructions can be used.
• They move the bits that are shifted out of one end of the operand back into the other end.
• Two versions of both the left and right rotate instructions are usually provided.
In one version, the bits of the operand are simply rotated.
In the other version, the rotation includes the C flag.

Dept. of ISE / GAT Page 15

 COMPUTER ORGANIZATION (21ISE34)

Problem 1:

List the steps needed to execute the machine instruction:

Load R2, LOC
in terms of transfers between the components of processor and some simple control commands. Assume that the
address of the memory-location containing this instruction is initially in register PC.
Solution:
1. Transfer the contents of register PC to register MAR.
2. Issue a Read command to memory.
And, then wait until it has transferred the requested word into register MDR.
3. Transfer the instruction from MDR into IR and decode it.
4. Transfer the address LOCA from IR to MAR.
5. Issue a Read command and wait until MDR is loaded.
6. Transfer contents of MDR to the ALU.
7. Transfer contents of R0 to the ALU.
8. Perform addition of the two operands in the ALU and transfer result into R0.
9. Transfer contents of PC to ALU.
10. Add 1 to operand in ALU and transfer incremented address to PC.

Problem 2:
List the steps needed to execute the machine instruction:
Add R4, R2, R3

Dept. of ISE / GAT Page 16

 COMPUTER ORGANIZATION (21ISE34)

in terms of transfers between the components of processor and some simple control commands. Assume that the
address of the memory-location containing this instruction is initially in register PC. Solution:
1. Transfer the contents of register PC to register MAR.
2. Issue a Read command to memory.
And, then wait until it has transferred the requested word into register MDR.
3. Transfer the instruction from MDR into IR and decode it.
4. Transfer contents of R1 and R2 to the ALU.
5. Perform addition of two operands in the ALU and transfer answer into R3.
6. Transfer contents of PC to ALU.
7. Add 1 to operand in ALU and transfer incremented address to PC.

Problem 3:
(a) Give a short sequence of machine instructions for the task “Add the contents of memory-location A
to those of location B, and place the answer in location C”. Instructions:
Load Ri, LOC and
Store Ri, LOC
are the only instructions available to transfer data between memory and the general purpose registers. Add instructions
are described in Section 1.3. Do not change contents of either location A or B.
(b) Suppose that Move and Add instructions are available with the formats:
Move Location1,
Location2 and
Add Location1, Location2
These instructions move or add a copy of the operand at the second location to the first location, overwriting the
original operand at the first location. Either or both of the operands can be in the memory or the general-purpose
registers. Is it possible to use fewer instructions of these types to accomplish the task in part (a)? If yes, give the
sequence.
Solution:
(a)
Load A, R0 Load B, R1 Add R0, R1
Store R1, C
(b) Yes;
Move B, C Add A, C

Problem 4:
A program contains 1000 instructions. Out of that 25% instructions requires 4 clock cycles,40% instructions requires 5
clock cycles and remaining require 3 clock cycles for execution. Find the total time required to execute the program
running in a 1 GHz machine.
Solution:
N = 1000
25% of N= 250 instructions require 4 clock cycles.
40% of N =400 instructions require 5 clock cycles.
35% of N=350 instructions require 3 clock cycles.
T = (N*S)/R= (250*4+400*5+350*3)/1X109 =(1000+2000+1050)/1*109= 4.05 μs.

Problem 5:
For the following processor, obtain the performance.
Clock rate = 800 MHz
No. of instructions executed = 1000
Average no of steps needed / machine instruction = 20
Solution:

Dept. of ISE / GAT Page 17