Optimizing Traffic Flow Fpga Prototype Implementation of Real Time Traffic Light Control System Copy 20231204171745NINL
Optimizing Traffic Flow Fpga Prototype Implementation of Real Time Traffic Light Control System Copy 20231204171745NINL
Mentor- Dr.Manoj Kumar, Asst Professor, Dept. Presented by-Ringchamdinliu Ngaomei 20105011,
of Electronics and Communication Engineering Zianlu Agape Gonmei 20105029
Introduction
Objective
Literature review
Proposed method
Conclusion and future work
References
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Introduction
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Objective
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Literature Review
Pranajit Kumar Das[1] implemented a traffic light system for a simple intersection with VHDL
using Quartus II. The real world road intersection are not considered because of simple design
and easy implementetion. The traffic controller uses sensor to initiate the schedule of traffic
light.
Saumil Sachdeva, Sarthak Chowdhury, Sushant Shekhar and Gaurav Verma[2] designed and
developed the Traffic Light Controller on FPGA using VHDL with the use of Clock gating
technique which helps in power reduction.
Parag Burhade, Shubham Sonar and Onkar Kulkarni[3] proposed to design and
implement TLC using FPGA, where coding is done using VHDL and simulated on
spartan-6 FPGA development kit.
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Literature Review
Prof. Rahul Bansode, Ms. Teena Padavi[5] implemented FPGA based smart traffic light
controller system using MATLAB software for image processing to determine the density of
vehicles, they also implement day mode and night mode and also use real time system.
S.L.Qaddori and N.T.Gadawe[7] implemented and simulated the real time traffic controller
system based on FPGA and Ardino to manage street traffic control and assist walkers to
move freely to prevent automobile clashes.
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Proposed Method
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Designing of Traffic Light Controller System
In this section, the simulation of TLC using FPGA and Arduino are demonstrated.
The design is composed of Moore Finite State machine, 53 LUTs(Look-Up Table) and 141
FFs(Flip Flops) .
Look-Up Table(LUT): A table that determines the output for any given input(s).
Flip Flop(FF): It is a circuit with two table state that can use to store binary data. It is
the basic storage element in sequential logic.
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Designing of Traffic Light Controller System
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Designing of Traffic Light Controller System
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Designing of Traffic Light Controller System
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Conclusion
2. Saumil Sachdeva, Sarthak Chowdhury, Sushant Shekhar and Gaurav Verma, Design and
Implementation of a Green Traffic Light Controller on FPGA Using VHDL. System and
Architecture, Proceedings of CSI 2015, Editor Sunil Kumar Muttoo, Advances in Intelligent
Systems and Computing, Volume 732, 187-192.
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References
5. Prof. Rahul Bansode, Ms. Teena Padavi(May 2021). FPGA based smart traffic light controller
system. International Journal for Advance Scientific Research and Engineering Trends, Volume 6,
126-127.
6. SheetalBohra, Himanshu Kumawat, Nakul Audeechya. Design and implementation of
Intelligent Traffic Jam Control System. International Journal of Engineering Research &
Technology (IJERT), NCETECE` 14 Conference Proceedings, 256- 259.
7. S.L.Qaddori and N.T.Gadawe. Real Time Traffic Controller System Based on FPGA and
Ardino, IMDC-SDSP 2020, June 28-30, Cyberspace.
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Thank You!
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