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Hardware and Virtual Machines - Notes 1

The document discusses various processor architectures, focusing on RISC and CISC, and their impact on instruction execution. It explains the benefits of RISC, particularly with pipelining and the use of registers, which enhance processing efficiency. Additionally, it outlines the four basic computing architectures (SISD, SIMD, MISD, MIMD) and the concept of massively parallel computing, where multiple processors collaborate to complete tasks.

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10 views12 pages

Hardware and Virtual Machines - Notes 1

The document discusses various processor architectures, focusing on RISC and CISC, and their impact on instruction execution. It explains the benefits of RISC, particularly with pipelining and the use of registers, which enhance processing efficiency. Additionally, it outlines the four basic computing architectures (SISD, SIMD, MISD, MIMD) and the concept of massively parallel computing, where multiple processors collaborate to complete tasks.

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7wqgczy5nt
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© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Hardware and Virtual Machines

• RISC and CISC Processors


• Pipelining in RISC Processors
• 4 Basic Computing Architecture (SISD, SIMD, MISD, MIMD)
• Massively Parallel Computing
• Virtual Machines
Processor Architectures (CISC and RISC)
• Processor design affect how instructions must be framed and are
executed by processors.
• Different architectures have different types and sizes of instruction
sets (the set of all commands that can be executed by the CPU)
• Architecture can lead to certain operations being executed much
more quickly than others
CISC vs RISC
• CISC instructions can be used on Desktops and laptops
• RISC instructions are often used in mobile phones and embedded devices
like in a car or refrigerator.
• RISC takes shorter time to be executed because it’s used for simple
operations.
RISC + Pipelining
• Allows several instructions to be simultaneously processed.
• Processing cycle divided into several stages (Fetch, Decode, Execute,
Memory Access, Results written to register).
• While one instruction is in one stage, the next instruction is in the
previous stage.
• At each clock cycle, multiple instructions are going through different
stages.
• Reduces CPU downtime, more instructions processed in a given
period of time, instructions executed more quickly.
RISC + Registers
• Use general purpose registers – can hold multiple data types
• Reduces need to fetch data from memory, which decreases
execution time.
• Can be used as temporary storage for intermediate results during
execution, which makes pipelining easy.
Parallel Computing
• When a large number of computers/processors are connected to
each other to collaboratively complete a large task.
• Pass messages to each other to coordinate operations.
• Connected by some type of network infrastructure.
• On a massive scale, hundreds or thousands of computers can work
together.
4 Basic Computer Architectures
• Refers to how multiple processors are organized to collectively
process instructions.
• SISD (Single Instruction, Single Data) – Single Instruction used to
process single data input by single processor, one at a time [Most
common]. Common in embedded systems.
• SIMD (Single Instruction, Multiple Data) – Same operation
simultaneously performed by multiple processors on different data
inputs from the same data set [Graphical applications].
• MISD (Multiple Instruction, Single Data) – Multiple different
operations on the same data input on multi processors.
• MIMD (Multiple Instruction, Multiple Data) – Multiple different
operations on data from different data inputs simultaneously
[Multicore systems].
SISD (Single Instruction, Single Data
Single Instruction, Multiple Data
Multiple Instruction, Single
Data
Multiple Instruction, Multiple Data

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