Chapter 5

Computer System Architecture

Objective:-
 To know the different layers of a computer system
 To know the basic building blocks of computer and how they work
1.1 Hierarchical Structuring of a Computer System Architecture
Actually a computer system is composed of many layers of software and hardware. But
for simplicity we see the computer in Abstract way. This avoids details and makes the
user to concern about the outer layer that is easy for the user to communicate with the
computer.
Generally modern computers consist of multi-layers or levels. The following figure
shows the different levels.

Language depends on application program

7 Application level
Hide operational details of lower levels
Machine-independent programming language
6 High-order languages level Program can transfer from one to another comp. easily
Software
level 5 Assembly language
Assembly level

4 Operating system level Masks details of hardware from programmer and

responsible for program creation, execution,
access to I/O and access to a file
Machine level
3 Machine language

Micro programming level Basic hardware component

2 construction and their interaction
Hardware
part Logic gate level
1 Basic component for microprogramming

0 Device level Transistors, capacitors & resistors

Fig. The level structure of a typical computer system

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1.2 Logic gates (elements)

In the hierarchical structuring of a computer, the logic gate level is above the device
level. These logical elements are primary components of the computer hardware. Given a
desired function, Boolean algebra can be applied to develop a simplified implementation
of that function using interconnection of logical gates.
A gate is an electronic circuit that produces an output signal that is a simple Boolean
operation on its input signals. The basic gates used in digital logic are AND, OR, NOT,
NAND, and NOR. We have also XOR gate for defining Boolean algebra with other
gates. Each gate is defined in three ways: graphical symbols, algebraic notation, and
truth table. A truth table is a table that shows the output of a logical function for all
possible combinations of input values.
Each gate has one or two or more inputs and only one-output signals. The signals are
either 0 or 1. When the values at the input are changed, the correct output signal appear
almost instantaneously, delayed by the propagation time of signals through the gate
(known as gate delay)
1. NOT gate: The NOT gate performs a basic logic function called inversion or
complementation. The purpose of this gate to change one logic level (HIGH/LOW) to
the opposite logic level.
Algebraic notation: X
Logic symbol of NOT gate:

Truth table of NOT gate:

X X

1 0
0 1

2. OR gate: The OR gate is composed of two or more inputs and a single output and
performs Logical addition. The logical operation of the OR gate is such that the
output is HIGH (1) when any of the inputs are HIGH; otherwise it is LOW (0).A plus
(+) is used to show the OR operation. In other words, the OR gate is an electronic
circuit that gives a high output if one or more of its inputs are high.

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 Algebraic notation: X+Y X
Logic symbol of OR gate: Z=X +Y
Y

Truth table of OR gate:

x Y Z=x +y
0 0 0
0 1 1
1 0 1
1 1 1

3. AND gate: The AND gate is composed of two or more inputs and a single output
and performs logical multiplication. The logical operation of the AND gate is such
that the output is HIGH (1) when all the input are HIGH, otherwise it is LOW (0). A
dot (.) is used to show the AND operation.
Algebraic notation: X.Y
Logic symbol of AND gate:

x Y Z= x.y
0 0 0
0 1 0
1 0 0
1 1 1
Combination of logic gates
Using combination of logic gates, complex operation can be performed. Some basic
combinations of gates include:
 NAND gate
 NOR gate
 Exclusive-OR(XOR)
 Exclusive-NOR(XNOR)

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NAND gate The NAND gate is formed by the combination of NOT-AND and implies
and AND function with an inverted output. The logical operation of the NAND gate is
such that the output is LOW (0) only when all the inputs are HIGH (1).
Algebraic notation: (X.Y)’
Logic symbol of AND gate:

X
(X.Y)’
Y
Truth table for NAND gate

x Y Z= (x.y)’
0 0 1
0 1 1
1 0 1
1 1 0

NOR gate The NOR gate is formed by the combination of NOT-OR implies and OR
function with an inverted output. The logical operation of the NOR gate is such that the
output is HIGH (1) only when all the inputs are LOW (0).

Algebraic notation: (X+Y)’ X Z= (X+Y)’

Logic symbol of NOR gate: Y

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Truth table for NOR gate

X Y Z= (x+y)’
0 0 1
0 1 0
1 0 0
1 1 0

Exclusive-OR (XOR) gate: This gate is usually formed from the combination of the
other logic gates. The exclusive-OR is an ‘inequality’ function and the output is HIGH
(1), when the inputs are not equal to each other.
Algebraic notation: (X + Y)
Logic symbol of XOR gate:

Truth table for XOR gate

x Y Z
0 0 0
0 1 1
1 0 1
1 1 0

Exclusive-NOR (XNOR) gate: This gate is usually formed from the combination of the
other logic gates. The exclusive-NOR is an ‘equality’ function and the output is HIGH
(1), when the inputs are equal to each other.
Algebraic notation: (X . Y)
Logic symbol of XNOR gate

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Truth table for XNOR gate
x Y Z
0 0 1
0 1 0
1 0 0
1 1 1

Note:
1. X + Y= X.Y’ + X’.Y

2. X . Y= X.Y + X’.Y’
Typically, not all gates are used in implementation. Design and fabrication are simpler if
only one or two types of gates are used. Thus it is important to identify functionally
complete set of gates. This means that Boolean function can be implemented using only
the gates in the set. AND, OR and NOT gates constitute functionally complete set
because they represent the three operation of Boolean algebra. If there are any
functionally complete sets of gates, they should synthesize these sets of Boolean
operators.
List of functionally complete set of gates:
 AND, OR, NOT
 AND, NOT
 OR, NOT
 NAND
 NOR
It is preferable to construct circuitry system using only NAND or NOR gates.
EXERCISES:
1. Show that, all these are functionally complete set of gates.
2. Construct XOR gate using only NAND gate.
3. Construct XOR gate using only NOR gate.

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1.3 Boolean algebra
The digital circuitry in digital computers and other digital systems is designed, and its
behavior is analyzed, with the use of mathematical discipline known as Boolean algebra.
The name is in honor of an English mathematician George Boole, who proposed the basic
principles of this algebra in 1854.
This Boolean algebra becomes very convenient in two areas:
 Analysis: It is an economical way of describing the function of digital circuitry.
 Design: given a desired function, Boolean algebra can be applied to develop a
simplified implementation of that function.
As any algebra, it makes use of logical variables, which will have a value true or false (1
or 0), and logical operations.
A Boolean function is described as follows:

F: X Y where X and Y are set of 0’s and 1’s

A Boolean function with n input variables could operate on 2n possible combinations.

There are 3 basic Boolean operators NOT, AND, OR (-, .,+)
Complex logic circuits can be constructed using the basic logic circuits. Any logic circuit
can be represented by a Boolean function and vice versa. Generally, before constructing
any logical circuit, it has to be simplified based on the rules of Boolean equations in order
to minimize the number of required logical gates.
Rules of the Boolean (Equation) Operators
x. x = x x+x=x Idempotent
x. x’ = 0 x + x’=1 Inverse
x. 1 =x x + 0 =x Identity
x(x +y)=x x + x .y = x Absorbtion
x .y =y .x x+y=y+x Commutative
(x .y) .z =x.(y. z) (x + y) + z = x + (y + z) Associative

A(Ã +B) = AB A + ÃB = A + B Absorbition

x.(y +z) = x. y + x. z (x +y) (x + z) =x + y z Distributive

x .y = x + y x + y = x. y DeMorgan’s

X =x x =x Double Negative

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To construct the logic circuit of a Boolean equation, first we have to simplify the Boolean
function using the rules of the operators (theorems)
Even though we have different types of gates for construction we use some basic gates,
and the rest can be constructed using the basic gates. The NAND or NOR gates can be
used to construct the other gates.
The NOT using NAND

X X’

AND using NAND

X
X.Y

OR using NAND

X
X+Y

The NOT using NOR

X X’

AND using NOR

X.Y
Y

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OR using NOR

X
Y X+Y

The XOR can be derived from the AND, NOT and OR operations

i. e x + y = x. y’ + x. y’ (draw the circuit)

1.4 Construction of Logical Circuit from Logical Function and Truth

Table
Any Boolean function can be implemented in electronic form as a network of gates. If
you have the truth table you can generate the Boolean function and you can also use the
Boolean function to construct the logical circuit. The reverse is also possible.
1.4.1 Construction of Logical Circuit from Logical Function
To construct the logic circuit of a Boolean equation first we have to simplify the Boolean
function using the rules of the operators (theorems)
Example: Construct the logic circuit of:
F = A’BC’ + A’BC + ABC’

Algebraic Simplification
Algebraic simplification involves the application of the identities to reduce the Boolean
expression to one with fewer elements.

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Example: Simplify: 1. F = A’BC’ + A’BC + ABC’
Sol:
F = A’BC’ + A’BC + ABC’
= A’B(C’+C) + ABC’ Distributive property
= A’B(1) + ABC’ Complement property
= A’B + ABC’ Identity property
= B(A’ + AC’) Distributive property
= B(A’ + C’) Absorbtion property

Fig. Simplified implementation of F

2. F=A’BC + AB’C + ABC’ + ABC
Soln:
F= A’BC + AB’C + ABC’ + ABC
= A’BC + AB’C + AB(C’ +C) Distributive property
= A’BC + AB’C + AB(1) Complement property
= A’BC + AB’C + AB Identity property
= A’BC + A(B’C + B) Distributive property
= A’BC + A(C + B) Absorbtion
= A’BC + AC + AB Distributive property
= B(A’C + A) + AC Distributive property
= B(C + A) + AC Absorbtion
Ex: Draw circuit diagram for the reduced function F.
1.4.2 Construction Boolean of Function/Logic Circuit from Truth Table
Minterms and Maxterms
Any boolean expression may be expressed in terms of either minterms or maxterms. To
do this we must first define the concept of a literal. A literal is a single variable within a

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term which may or may not be complemented. For an expression with N variables,
minterms and maxterms are defined as follows:
Minterms
For a Boolean function of n variables , a product term in which each of the
n variables appears once (in either its complemented or un-complemented form) is called
a minterm. Thus, a minterm is a logical expression of n variables that employs only the
complement operator and the conjunction operator.
There are 2n minterms of n variables, since a variable in the minterm expression can be in
either its direct or its complemented form--two choices per n variables.
In general, one assigns each minterm an index based on a conventional binary encoding
of the complementation pattern of the variables. This convention assigns the value 1 to
the direct form (xi) and 0 to the complemented form (x'i). For example, we assign the
index 6 to the minterm abc' (110) and denote that minterm as m6. Similarly, m0 of the
same three variables is a'b'c' (000), and m7 is abc (111).
 A minterm is the product of N distinct literals which results in 1 where each literal
occurs exactly once.
Maxterms
For a Boolean function of n variables , a sum term in which each of the n
variables appears once (in either its complemented or un-complemented form) is called a
maxterm. Thus, a maxterm is a logical expression of n variables that employs only the
complement operator and the disjunction operator. Instead of using ANDs and
complements, we use ORs and complements and proceed similarly.
For example, the following are two of the eight maxterms of three variables:
a + b' + c
a' + b + c
There are again 2n maxterms of n variables, since a variable in the maxterm expression
can also be in either its direct or its complemented form--two choices per n variables.
Each maxterm is assigned an index based on the opposite conventional binary encoding
used for minterms. The maxterm convention assigns the value 0 to the direct form (xi)
and 1 to the complemented form (x'i). For example, we assign the index 6 to the maxterm

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a' + b' + c (110) and denote that maxterm as M6. Similarly M0 of these three variables is a
+ b + c (000) and M7 is a' + b' + c' (111).
 A maxterm is the sum of N distinct literals results in 0 where each literal occurs
exactly once.

For a two-variable expression, the minterms and maxterms are as follows

X Y Minterm Maxterm
0 0 X'.Y' X+Y
0 1 X'.Y X+Y'
1 0 X.Y' X'+Y
1 1 X.Y X'+Y'
For a three-variable expression, the minterms and maxterms are as follows
X Y Z Minterm Maxterm
0 0 0 X'.Y'.Z' X+Y+Z
0 0 1 X'.Y'.Z X+Y+Z'
0 1 0 X'.Y.Z' X+Y'+Z
0 1 1 X'.Y.Z X+Y'+Z'
1 0 0 X.Y'.Z' X'+Y+Z
1 0 1 X.Y'.Z X'+Y+Z'
1 1 0 X.Y.Z' X'+Y'+Z
1 1 1 X.Y.Z X'+Y'+Z'

This allows us to represent expressions in either Sum of Products or Product of Sums

forms
I. SOP (Sum of Product method)
It expresses that the output is 1 if any of the input combinations that produce 1 is true. i.e.
 Insert a column for the inverse of all the variables
 Find the rows with functional value 1 and variable value one then use them as
an input for an AND operator
 Connect each of them using the OR gate.
II. POS (Product of Sum)
It expresses that the output is 1 if none of the input combinations that produce 0 is 1. i.e.
 Insert a column for the inverse of all the variables

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  Find the rows with functional value 0 and variable value 0 then use them as an
input for an OR operator
 Connect each of them using the AND gate.

Example
Construct the Boolean function for the following truth table:
Row# A B C F MinTer MaxTerm
m
1 0 0 0 0 A+B+C
2 0 0 1 0 A+B+C’
3 0 1 0 1 A’BC’
4 0 1 1 1 A’BC
5 1 0 0 0 A+B’+C’
6 1 0 1 0 A’+B+C’
7 1 1 0 1 ABC’
8 1 1 1 0 A’+B’+C’

SOP considers row 3, 4, and 7 with out put equals 1

F(A,B,C) = A’ B C’ + A’BC +ABC’
POS considers row 1, 2,5,6,8
F (A, B, C) = (A+B+C) (A+B+C) (A+B+C) (A+B+C) (A+ B+ C )
 To construct the logic circuit first simplify the given Boolean function and
construct the network as required using the Boolean function.
Exercise: which method SOP or POS require less number of logical gate to construct
logic circuit?

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1.5 Types of Circuit
There are two types of circuits in designing logical circuits: Combinational circuits and
sequential circuits.
Combinational circuits are circuits that constitute interconnection of sets of gates whose
output at any time is a function of only the input at that time. In general terms, a
combinational circuit consists of n binary inputs and m binary outputs.
Combinational circuits implement the essential functions of a digital computer. However,
except for the special case ROM, they provide no memory or state information.
Examples: ADDER, ROM, PLA (Programmable Logic Array), Decoder, Multiplexers,
etc.
Sequential circuits are circuits which are designed to have a memory or state
information (i.e. the current out put of sequential circuit depends on the current input and
the current state of that circuit).
Examples: Flip-Flop, Registers, Counters, etc.
1.5.1 Adders (Half Adder and Full Adder)
I. Half adders
The simplest form of electronic binary arithmetic is performed in a half adder circuit. A
half adder circuit adds 2 bits and generates sum and carry output bits.
The half adder is an example of a simple, functional digital circuit built from two logic
gates. The half adder adds two one-bit binary numbers (AB). The output is the sum of
the two bits (S) and the carry (C).
Binary addition differs from Boolean algebra in that the result includes a carry term.

A B S Co
0 0 0 0
0 1 1 0
1 0 141 0
1 1 0 1
S= A’B + AB’= A + B – sum output

Co = AB – carry output

The digital circuit of a half adder is shown below:

A
S
B

Co

II. Full-Adders

We are not interested in performing addition on just a single pair of bits. Rather we wish
to add two n bit numbers. This can be done, by putting together a set of adders so that the
carry from one adder is provided as input to the next. The circuitry that can perform
complete binary addition is called full adder.
It accepts three separate inputs bits, the two bits to be added and a carry in.
A B Ci Carry Sum
0 0 0 0 0
0 0 1 0 1
0 1 0 0 1
0 1 1 1 0
1 0 0 0 1
1 0 1 1 0
1 1 0 1 0
1 1 1 1 1

Sum = A’B’Ci+ A’BCi’ + AB’Ci’ +ABCi

Carry = AB + AC + BC

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Construct the logic circuit for Sum and Carry of full adder

Fig. Implementation of Full Adder

Exercise Construct a binary adder of

4-bits

Eg. 1001 A3A2A1A0

1011 B3B2B1A0
10100 C4S3S2S1S0

Fig: Bit Adder

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Flip Flops
Combinational circuits implement the essential functions of a digital computer. However,
except for the special case of ROM, they provide no memory or state information. To
store state information, a more complex form of digital circuit is used: the sequential
circuit. The current output of a sequential circuit depends not only on the current input,
but also on the past history of inputs. The current output of a sequential circuit depends
on the current input and the current state of that circuit.
The simplest form of sequential circuit is the flip-flop. There are a variety of flip-flops,
all of which share two properties:
 A flip-flop is a bi-stable device. It exists in one of two states, and in the absence
of input remains in that state. Thus, the flip-flop can function as a 1-bit memory.
 The flip-flop has two outputs, which are always the complements of each other.
These are generally labeled Q and Q’.
Flip flops are the building blocks of sequential circuits. They are used to construct
memories and registers. There are different types of flip flops. The simplest flip flop is
the SR-latch (S-set and R-Reset) type of the SR-latch can store 1-bit of information.
The S-R Latch
The figure below shows configuration known as the S-R flip-flop or S-R latch. The
circuit has two inputs, S (Set) and R (Reset), and two outputs, Q and Q’ and consists of
two NOR gates hooked together in a feedback arrangement.
Set-sets to one
Reset-sets to zero
RS latch using NOR

Fig. S-R Latch Logic Diagram Implemented with NOR Gates

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 R Q

S Q’
Q
Fig. S-R Latch Block Diagram.
Table a): Characteristics table
Current Current state Next State
inputs
S R Qn Qn+1 Comment
0 0 0 0 Previous output is stored
0 0 1 1 Previous output is stored
0 1 0 0 Reset
0 1 1 0 Reset
1 0 0 1 Set
1 0 1 1 Set
1 1 0 - Must be prevented
1 1 1 - Must be prevented

Table b): Simplified characteristics table

R S Q
0 0 NC
0 1 1
1 0 0
1 1 *

From the truth table we can see that when R= S= 0, Q = NC .That means there will not be
any change that can occur in the output. That is the circuit remains latched in the last
state.
When R= 0 and S = 1, the circuit sets the Q output to 1. On the other hand, if R= 1 and
S= 0 the Q output resets to 0. R= S=1 is never used because it leads to unpredictable
operation.

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