III B.

Tech –II Semester- UR20 Syllabus

VI SEMESTER ( III Year - II Semester)

Contac
S.N Course Course Code Course Title L T P
t
C
o. Category Hrs./W
k
Microprocessor and
PCC UR20PCEC601 3 0 0 3 3
1 Microcontrollers

PCC UR20PCEC602 VLSI Design 3 0 0 3 3

2
PCC UR20PCEC603 Digital Signal Processing 3 0 0 3 3
3
UR20PEEC604
PEC Internet of Things 3 0 0 3 3
B

OEC UR20OECS60 Computer Networks 3 0 0 3 3

5
5F
Microprocessor and
PCC UR20PCEC611 0 0 3 1.5
6 Microcontrollers - Lab 3

PCC UR20PCEC612 VLSI Design Lab 0 0 3 1.5

7 3
Digital Signal Processing
PCC UR20PCEC613 0 0 3 1.5
8 Lab 3

ARM based/Aurdino based

SOC UR20SOEC614 1 0 2 2
9 Programming/IoT 3

Total 16 0 11 27 21.5
Mandatory Course
MC UR20MC600C Constitution of India 0 0 0 0
10 2
Minor Course
3 1 0 4 4
(The hours distribution can be 3-0-2 or 3-1-0 also)
Industrial/Research Internship (Mandatory) 2 Months during summer vacation
 COURSE CODE: UR20PCEC601
B.Tech. VI Semester L T P C
3 0 0 3
MICROPROCESSOR AND MICROCONTROLLERS
Internal Marks: 30
External Marks: 70
COURSE OBJECTIVES:
1. To acquire knowledge on microprocessors and microcontrollers.
2. To select processors based on requirements.
3. To acquire the knowledge on interfacing various peripherals, configure
and develop programs to interface peripherals/sensors.
4. To develop programs efficiently on ARM Cortex processors and debug.
UNIT - I:
INTRODUCTION: Basic Microprocessor architecture, Harvard and Von
Neumann architectures with examples, Microprocessor Unit versus
Microcontroller Unit, CISC and RISC architectures.
8086 ARCHITECTURE: Main features, pin diagram/description, 8086
microprocessor family, internal architecture, bus interfacing unit, execution
unit, interrupts and interrupt response, 8086 system timing, minimum
mode and maximum mode configuration.
UNIT - II:
8086 PROGRAMMING: Program development steps, instructions,
addressing modes, assembler directives, writing simple programs with an
assembler, assembly language program development tools.
UNIT – III:
8086 INTERFACING: Semiconductor memories interfacing (RAM, ROM),
Intel 8255 programmable peripheral interface, Interfacing switches and
LEDS, Interfacing seven segment displays, software and hardware interrupt
applications, Intel 8251 USART architecture and interfacing, Intel 8237a
DMA controller, Intel 8257 DMA controller, stepper motor, A/D and D/A
converters, Need for 8259 programmable interrupt controllers.
UNIT – IV:
INTEL 8051 MICROCONTROLLER: Architecture, Hardware concepts,
Input/output ports and circuits, external memory, counters/timers, serial
data input/output, interrupts. Assembly language programming:
Instructions, addressing modes, simple programs. Interfacing to 8051: A/D
and D/A Convertors, Stepper motor interface, keyboard, LCD Interfacing,
Traffic light controls.
UNIT - V:
ARM ARCHITECTURES AND PROCESSORS: ARM Architecture, ARM
Processors Families, ARM Cortex-M Series Family, ARM Cortex-M3
Processor Functional Description, functions and interfaces, Programmers
Models, ARM Cortext-M3 programming – Software delay, Programming
techniques, Loops, Stack and Stack pointer, subroutines and parameter
passing, parallel I/O, Nested Vectored Interrupt Controller – functional
description and NVIC programmers’ model.
TEXT BOOKS:
1. A.K Ray, K.M.Bhurchandhi, Advanced Microprocessor and Peripherals‖,
Tata McGraw Hill Publications, 2000.
2. The 8051 Microcontrollers and Embedded systems Using Assembly and
C, Muhammad Ali Mazidi and Janice Gillespie Mazidi and Rollin D.
McKinlay; Pearson 2-Edition, 2011.
3. The Definitive Guide to ARM Cortex-M3 and Cortex-M4 Processors by
Joseph Liu.
REFERENCE BOOKS:
1. Embedded Systems Fundamentals with Arm Cortex-M based
Microcontrollers: A Practical Approach in English, by Dr. Alexander G.
Dean, Published by Arm Education Media, 2017.
2. Microprocessors and Interfacing – Programming and Hardware by
Douglas V Hall, SSSP Rao, Tata McGraw Hill Education Private Limited,
3rd Edition, 1994.
3. Cortex -M3 Technical Reference Manual.
E – RESOURCE:
1. https://nptel.ac.in/courses/111/107/111107105/
2. https://nptel.ac.in/courses/111/105/111105123/
COURSE OUTCOMES:
At the end of the Course, Student will be able to:
1. Understand the internal architecture, organization and assembly
language programming of 8086 processors.
2. Design the internal architecture, organization and assembly language
programming of 8051controllers.
3. Know the I/O and Memory Interface of 8051 based systems.
4. Understand the Serial Communication and Bus Interface of 8086/8051
based systems.
5. Familiarize the internal architecture of ARM processors.
6. Realize the basic concepts of advanced ARM processors.
B.Tech. VI Semester COURSE CODE: UR20PCEC602 L T P C
3 0 0 3
VLSI DESIGN
Internal Marks: 30
External Marks: 70
COURSE OBJECTIVES:
1. Give exposure to different steps involved in the fabrication of ICs.
2. Explain electrical properties of MOS and BiCMOS devices to analyse the
behaviour of inverters with various loads.
3. Give exposure to the design rules to be followed to draw the layout of any
logic circuit.
4. Provide design concepts to design building blocks of data path of any
system using gates.
UNIT - I:
MOS CIRCUITS: VLSI Design Flow, Introduction to IC technology,
Fabrication process: NMOS, PMOS and CMOS. Ids versus VDS
Relationships, Aspects of MOS transistor Threshold Voltage, MOS transistor
Trans, Output Conductance and Figure of Merit. NMOS Inverter, Pull-up to
Pull-down Ratio for NMOS inverter driven by another NMOS inverter, and
through one or more pass transistors. Alternative forms of pull-up, The
CMOS Inverter, Latch-up in CMOS circuits, Bi-CMOS Inverter, Comparison
between CMOS and BICMOS technology, MOS Layers, Stick Diagrams,
Design Rules and Layout, Layout Diagrams for MOS circuits.
UNIT - II:
CONCEPTS OF BASIC CIRCUITS: Sheet Resistance, Sheet Resistance concept
applied to MOS transistors and Inverters, Area Capacitance of Layers, Standard
unit of capacitance, some area Capacitance Calculations, The Delay Unit, Inverter
Delays, driving large capacitive loads, Propagation Delays, Wiring Capacitances,
Choice of layers.
SCALING OF MOS CIRCUITS: Scaling models and scaling factors, Scaling
factors for device parameters, Limitations of scaling, Limits due to sub
threshold currents, Limits on logic levels and supply voltage due to noise
and current density. Switch logic, Gate logic.
UNIT - III:
BASIC BUILDING BLOCKS OF ANALOG IC DESIGN: Regions of operation of
MOSFET, Modelling of transistor, body bias effect, biasing styles, single stage
amplifier with resistive load, single stage amplifier with diode connected load,
Common Source amplifier, Common Drain amplifier, Common Gate amplifier,
current sources and sinks.
UNIT - IV:
CMOS COMBINATIONAL AND SEQUENTIAL LOGIC CIRCUIT DESIGN:
static CMOS design: complementary CMOS, rationed logic, pass-transistor
logic.
DYNAMIC CMOS DESIGN: Dynamic Logic-Basic Principles, Speed and
Power Dissipation of Dynamic Logic, Choosing a Logic Style, Gate Design in
the Ultra Deep-Submicron Era, Latch Versus Register, Latch based design,
timing decimation, positive feedback, in stability, Meta stability, multiplexer
based latches, clock to q delay, setup time, hold time, reduced clock load
master slave registers, Clocked CMOS register. Storage mechanism,
pipelining.
UNIT - V:
FPGA DESIGN: FPGA design flow, Basic FPGA architecture, FPGA
Technologies, Introduction to FPGA Families.
INTRODUCTION TO ADVANCED TECHNOLOGIES: Giga-scale dilemma,
Short channel effects, High–k, Metal Gate Technology, Fin-FET, TFET.
TEXT BOOKS:
1. Essentials of VLSI Circuits and Systems – Kamran Eshraghian, Douglas
andA. Pucknell and SholehEshraghian, Prentice-Hall of India Private
Limited, 2005 Edition.
2. Design of Analog CMOS Integrated Circuits by BehzadRazavi, McGraw
Hill, 2003.
3. Digital Integrated Circuits, Jan M.Rabaey, Anantha Chandra kasanand
Borivoje Nikolic, 2nd edition, 2016.
REFERENCE BOOKS:
1. ―Introduction to VLSI Circuits and Systems‖, John P.Uyemura, John
Wiley & Sons, reprint 2009.
2. Integrated Nano electronics: Nano scale CMOS, Post-CMOS and Allied
Nano technologies Vinod Kumar Khanna, Springer India, 1stedition,
2016.
3. Fin-FETs and other multi-gate transistors, Colinge JP, Editor NewYork,
Springer, 2008.
E – RESOURCE:
1. https://nptel.ac.in/courses/111/107/111107105/
2. https://nptel.ac.in/courses/111/105/111105123/
COURSE OUTCOMES:
At the end of the Course, Student will be able to:
1. Demonstrate a clear understanding of CMOS fabrication flow and
technology scaling.
2. Apply the design Rules and draw layout of a given logic circuit.
3. Design basic building blocks in Analog IC design.
4. Analyse the behaviour of amplifier circuits with various loads.
5. Design various CMOS logic circuits for design of Combinational logic
circuits.
6. Design various applications using FPGA.
B.Tech. VI Semester COURSE CODE: UR20PCEC603 L T P C
3 0 0 3
DIGITAL SIGNAL PROCESSING
Internal Marks: 30
External Marks: 70
COURSE OBJECTIVES:
1. To provide background and fundamental concepts for the analysis and
processing of digital signals.
2. To understand the fast computation of DFS and DFT.
3. To design digital filters and their realization structures.
4. To acquaint in Multi-rate signal processing techniques and finite word
length effects.
UNIT – I:
INTRODUCTION: Introduction to Digital Signal Processing: Discrete time
signals & sequences, Classification of Discrete time systems , stability of LTI
systems, Invertability, Response of LTI systems to arbitrary inputs. Solution
of Linear constant coefficient difference equations, Frequency domain
representation of discrete time signals and systems, Review of Z-transforms,
solution of difference equations using Z-transforms, System function.
UNIT – II:
DISCRETE FOURIER SERIES &FOURIER TRANSFORMS: Properties of
discrete Fourier series, DFS representation of periodic sequences, Discrete
Fourier transforms: Properties of DFT, linear filtering methods based on
DFT, Fast Fourier transforms (FFT) - Radix-2 decimation in time and
decimation in frequency FFT Algorithms, Inverse FFT and FFT with General
Radix-N.
UNIT – III:
DESIGN OF IIR DIGITAL FILTERS& REALIZATIONS: Analog filter
approximations – Butter worth and Chebyshev, Design of IIR Digital filters
from analog filters, Design Examples, Analog and Digital frequency
transformations. Basic structures of IIR systems, Transposed forms.
UNIT – IV:
DESIGN OF FIR DIGITAL FILTERS & REALIZATIONS: Characteristics of
FIR Digital Filters, frequency response. Design of FIR Digital Filters using
Window Techniques and Frequency Sampling technique, Comparison of IIR
& FIR filters, Basic structures of FIR systems, Lattice structures, Lattice-
ladder structures.
UNIT – V:
INTRODUCTION TO DSP PROCESSORS: Introduction to programmable
DSPs: Multiplier and Multiplier Accumulator, Modified bus structures and
memory access schemes in P-DSPs ,Multiple Access Memory, Multi ported
memory, VLIW architecture, Pipelining, Special addressing modes, On-Chip
Peripherals.
ARCHITECTURE OF TMS320C5X: Introduction, Bus Structure, Central
Arithmetic Logic Unit, Auxiliary Register ALU, Index Register, Block Move
Address Register, Parallel Logic Unit, Memory mapped registers, program
controller, some flags in the status registers, On- chip memory, On-chip
peripherals.
TEXT BOOKS:
1. Digital Signal Processing, Principles, Algorithms, and Applications: John
G. Proakis, DimitrisG.Manolakis, Pearson Education / PHI, 2007.
2. Discrete Time Signal Processing – A.V.Oppenheim and R.W. Schaffer, PHI
3. Digital Signal Processing – Tarun Kumar Rawat , Oxford University Press
India,2015.
REFERENCE BOOKS:
1. Digital Signal Processing: Andreas Antoniou, TATA McGraw Hill , 2006.
2. DSP Primer - C. Britton Rorabaugh, Tata McGraw Hill, 2005.
3. Digital Signal Processors – Architecture, Programming and Applications,
B.Venkataramani, M.Bhaskar, TATA McGraw Hill, 2002.
E – RESOURCE:
1. https://nptel.ac.in/courses/111/107/111107105/
2. https://nptel.ac.in/courses/111/105/111105123/
COURSE OUTCOMES:
At the end of the Course, Student will be able to:
1. Apply the difference equations concept in the analysis of Discrete time
Systems.
2. Use the FFT algorithm for solving the DFT of a given signal.
3. Design a Digital filter (FIR&IIR) from the given specifications.
4. Realize the FIR and IIR structures from the designed digital filter.
5. Use the Multi rate processing concepts in various applications (Eg:
Design of phase shifters, interfacing of digital systems.
6. Apply the signal processing concepts on DSP Processor.
 COURSE CODE: UR20PEEC604B
B.Tech. VI Semester L T P C
3 0 0 3
INTERNET OF THINGS
(PE-2)
Internal Marks: 30
External Marks: 70
COURSE OBJECTIVES:
1. To understand about the fundamentals of internet of things and its
building blocks along with their characteristics.
2. To understand the recent application domains of IOT in everyday life.
3. To understand the protocols and standards designed for IOT and the
current research on it.
4. To understand the other associated technologies like cloud and fog
computing in the domain of IOT.
UNIT - I:
INTRODUCTION TO IOT: Introduction to IOT Architectural Overview,
Design principles and needed capabilities, Basics of Networking, M2M and
IoT Technology Fundamentals- Devices and gateways, Data management,
Business processes in IoT, Everything as a Service (XaaS), Role of Cloud in
IoT, Security aspects in IoT.
UNIT - II:
ELEMENTS OF IOT HARDWARE COMPONENTS: Computing- Arduino,
Raspberry Pi, ARM Cortex-A class processor, Embedded Devices – ARM
Cortex-M class processor, Arm Cortex-M0 Processor Architecture, Block
Diagram, Cortex-M0 Processor Instruction Set, ARM and Thumb Instruction
Set.
UNIT - III:
IoT Application Development Communication, IoT Applications, Sensing,
Actuation, I/O interfaces. Software Components- Programming API‟s (using
Python/Node.js/Arduino) for Communication Protocols-MQTT, ZigBee,
CoAP, UDP, TCP, Bluetooth. Bluetooth Smart Connectivity Bluetooth
overview, Bluetooth Key Versions, Bluetooth Low Energy (BLE) Protocol,
Bluetooth, Low Energy Architecture, PSoC4 BLE architecture and
Component Overview.
UNIT - IV:
Solution framework for IoT applications Implementation of Device
integration, Data acquisition and integration, Device data storage
Unstructured data storage on cloud/local server, Authentication,
authorization of devices.
UNIT - V:
IoT Case Studies IoT case studies and mini projects based on Industrial
automation, Transportation, Agriculture, Healthcare, Home Automation.
Cloud Analytics for IoT Application: Introduction to cloud computing,
Difference between Cloud Computing and Fog Computing: The Next
Evolution of Cloud Computing, Role of Cloud Computing in IoT, Connecting
IoT to cloud, Cloud Storage for IoT Challenge in integration of IoT with
Cloud.
TEXT BOOKS:
1. Raj Kamal, ―Internet of Things: Architecture and Design Principles‖, 1st
Edition, McGraw Hill Education, 2017.
2. The Definitive Guide to the ARM Cortex-M0 by Joseph Yiu,2011.
3. Vijay Madisetti, ArshdeepBahga, Internet of Things, ―A Hands on
Approach‖, University Press, 2015.
REFERENCE BOOKS:
1. Cypress Semiconductor/PSoC4 BLE (Bluetooth Low Energy) Product
Training Modules.
2. Pethuru Raj and Anupama C. Raman, ―The Internet of Things: Enabling
Technologies, Platforms, and Use Cases‖, CRC Press, 2017.
E – RESOURCES:
1. https://nptel.ac.in/courses/111/107/111107105/
2. https://nptel.ac.in/courses/111/105/111105123/
COURSE OUTCOMES:
At the end of the Course, Student will be able to
1. Understand internet of Things and its hardware and software
components.
2. IOT application development communication.
3. Interface I/O devices, sensors & communication modules.
4. Remotely monitor data and control devices.
5. Design real time IoT based applications.
6. Data acquisition and integration.
VI Semester COURSE CODE: UR20OECS605F LTPC
3003
COMPUTER NETWORKS
(Open Elective-II)
Internal marks: 30
External Marks: 70
Course Objectives:
• To provide insight about networks, topologies, and the key concepts.
• To gain comprehensive knowledge about the layered communication
architectures (OSI and TCP/IP) and its functionalities.
• To understand the principles, key protocols, design issues, and
significance of each layers in ISO and TCP/IP.
• To know the basic concepts of network services and various network
applications.

UNIT I:
Introduction: Network Types, LAN, MAN, WAN, Network Topologies
Reference models- The OSI Reference Model- the TCP/IP Reference Model -
A Comparison of the OSI and TCP/IP Reference Models, OSI Vs TCP/IP,
Lack of OSI models success, Internet History.
Physical Layer –Introduction to Guided Media- Twisted-pair cable, Coaxial
cable, and Fiber optic cable and unguided media: Wireless-Radio waves,
microwaves, infrared.

UNIT II:
Data link layer: Design issues, Framing: fixed size framing, variable size
framing, flow control, error control, error detection and correction codes,
CRC, Checksum: idea, one’s complement internet checksum, services
provided to Network Layer, Elementary Data Link Layer protocols:
simplex protocol, Simplex stop and wait, Simplex protocol for Noisy
Channel.
Sliding window protocol: One bit, Go back N, Selective repeat-Stop and
wait protocol, Data link layer in HDLC: configuration and transfer modes,
frames, control field, point to point protocol (PPP): framing transition phase,
multiplexing, multi link PPP.

UNIT – III:
Media Access Control: Random Access: ALOHA, Carrier sense multiple
access (CSMA), CSMA with Collision Detection, CSMA with Collision
Avoidance, Controlled Access: Reservation, Polling, Token Passing,
Channelization: frequency division multiple Access(FDMA), time division
multiple access(TDMA), code division multiple access(CDMA).
Wired LANs: Ethernet, Ethernet Protocol, Standard Ethernet, Fast
Ethernet(100 Mbps), Gigabit Ethernet.

UNIT – IV:
The Network Layer Design Issues – Store and Forward Packet Switching-
Services Provided to the Transport layer- Implementation of Connectionless
Service-Implementation of Connection Oriented Service- Comparison of
Virtual Circuit and Datagram Networks, Routing Algorithms-The Optimality
principle-Shortest path, Flooding, Distance vector, Link state, Hierarchical,
Congestion Control algorithms-General principles of congestion control,
Congestion prevention polices, Approaches to Congestion Control-Traffic
Aware Routing- Admission Control-Traffic Throttling-Load Shedding. Traffic
Control Algorithm-Leaky bucket & Token bucket.
Internet Working: How networks differ- How networks can be connected-
Tunnelling, internetwork routing-, Fragmentation, network layer in the
internet – IP protocols-IP Version 4 protocol-IPV4 Header Format, IP
addresses, Class full Addressing, CIDR, NAT-, Subnets-IP Version 6-The
main IPV6 header, Transition from IPV4 to IPV6, Comparision of IPV4 &
IPV6- Internet control protocols- ICMP-ARP-DHCP

UNIT –V:
The Transport Layer: Transport layer protocols: Introduction-services- port
number-User data gram protocol-User datagram-UDP services-UDP
applications-Transmission control protocol: TCP services- TCP features-
Segment- A TCP connection- windows in TCP- flow control-Error control,
Congestion control in TCP.
Application Layer –- World Wide Web: HTTP, Electronic mail-Architecture-
web based mail- email security- TELENET-local versus remote Logging-
Domain Name System: Name Space, DNS in Internet ,- Resolution-Caching-
Resource Records- DNS messages- Registrars-security of DNS Name
Servers, SNMP.

Text Books:
1. Computer Networks — Andrew S Tanenbaum, Fifth Edition. Pearson
Education/PHI
2. Data Communications and Networks – Behrouz A. Forouzan, Fifth Edition
TMH.

Reference Books:
1. Data Communications and Networks- Achut S Godbole, AtulKahate
2. Computer Networks, Mayank Dave, CENGAGE

Course Outcomes:
By the end of the course, the student will be able to
CO1: Demonstrate different network models for networking links OSI, TCP/IP, B-
ISDN, N-BISDN and get knowledge about various communication techniques,
Methods and protocol standards.
CO2: Analyze MAC layer protocols and LAN technologies
CO3: Discuss different transmission media and different switching networks.
CO4: Analyze data link layer services, functions and protocols like HDLC and PPP.
CO5: Compare and Classify medium access control protocols like ALOHA, CSMA,
CSMA/CD, CSMA/CA, Polling, Token passing, FDMA, TDMA, CDMA protocols
CO6: Determine application layer services and client server protocols working with
the client server paradigms like WWW, HTTP, FTP, e-mail and SNMP etc.
 COURSE CODE: UR20PCEC611
B.Tech. VI Semester L T P C
0 0 3 1.5
MICROPROCESSOR AND MICROCONTROLLERS LAB
Internal Marks: 15
External Marks: 35
COURSE OBJECTIVES:
1. This course introduces the assembly language programming of 8086 and
8051 microcontroller.
2. It gives a practical training of interfacing the peripheral devices with the
8086 microprocessor.
3. The course objective is to introduce the basic concepts of microprocessor
and to develop in the student the assembly language programming skills
and real time applications of microprocessor as well as microcontroller.
LIST OF EXPERIMENTS:
PART- A: (Minimum of 5 Experiments has to be performed) 8086 Assembly
Language Programming and Interfacing
1. Programs for 16 -bit arithmetic operations (using Various Addressing
Modes).
a. Addition of n-BCD numbers.
b. Multiplication and Division operations.
2. Program for sorting an array.
3. Program for Factorial of given n-numbers.
4. Interfacing ADC to8086.
5. Interfacing DAC to8086.
6. Interfacing stepper motor to8086.
PART-B: (Minimum of 5 Experiments has to be performed) 8051 Assembly
Language Programming and Interfacing
1. Finding number of 1’s and number of 0’s in a given 8-bit number.
2. Average of n-numbers.
3. Program and verify Timer/ Counter in8051.
4. Interfacing Traffic Light Controller to8051.
5. UART operation in8051.
6. Interfacing LCD to8051.
PART – C: (Minimum of 2 Experiments has to be performed) Conduct the
following experiments using ARM CORTEX M3 PROCESSOR USING KEIL
MDK ARM
1. Write an assembly program to multiply of 2 16-bit binary numbers.
2. Write an assembly program to find the sum of first 10 integer’s numbers.
3. Write a program to toggle LED every second using timer interrupt.
EQUIPMENT REQUIRED:
1. Regulated Power supplies.
2. Analog/Digital Storage Oscilloscopes.
3. 8086 Microprocessor kits.
4. 8051 microcontroller kits.
 5. ADC module, DAC module.
6. Stepper motor module.
7. Key board module.
8. LED, 7-SegemtUnits.
9. Digital Multi-meters.
10. ROM/RAM Interface module.
11. Bread Board etc.
12. ARM CORTEX M3.
13. KEIL MDKARM, Digital Multi-meters.
NOTE: Minimum 12 experiments of duration 3 periods must be completed
for the eligibility to appear for the semester end examinations. In case if the
student fails to get eligibility for semester end exams in the current
semester, he has to take the permission of HOD and complete the required
number of experiments and appear for semester end exam as and when
conducted.
E – RESOURCE:
1. https://nptel.ac.in/courses/111/107/111107105/
2. https://nptel.ac.in/courses/111/105/111105123/
COURSE OUTCOMES:
At the end of the Course, Student will be able to:
1. Understand and apply the fundamentals assembly level programming of
microprocessors and microcontroller.
2. Work with standard microprocessor real time interfaces including GPJO
serial ports, digital – to – analog converts and analog - to - digital
converts.
3. Troubleshoot interactions between software and hardware.
4. Analyse abstract problems and apply a combination of hardware and
software to address and problem.
5. Use standard test and measurement equipment to evaluate digital
interfaces.
6. To programme the timers and counters by using 8051.
 COURSE CODE: UR20PCEC612
B.Tech. VI Semester L T P C
0 0 3 1.5
VLSI DESIGN LAB
Internal Marks: 15
External Marks: 35
COURSE OBJECTIVES:
1. Apply the concepts of basic combinational logic circuits, sequential
circuit elements and programmable logic in the laboratory setting.
2. To develop familiarity and confidence with designing. Building and
testing digital circuits including the use of CAD tools.
3. Behavioural register transfer logic and physical – level structured VLSI
design using CAD tools and hardware description language.
LIST OF EXPERIMENTS:
PART (A):
FPGA LEVEL IMPLEMENTATION (ANY SEVEN EXPERIMENTS)
NOTE 1: The students need to develop Verilog /VHDL Source code, perform
simulation using relevant simulator and analyze the obtained simulation
results using necessary Synthesizer.
NOTE 2: All the experiments need to be implemented on the latest
FPGA/CPLD Hardware in the Laboratory.
DESIGN AND IMPLEMENTATION OF THE FOLLOWING:
1. Realization of Logic gates.
2. 4-bit ripple carry and carry look ahead adder using behavioural, dataflow
and structural modelling.
3. a.) 16:1 MUX through 4:1 MUX.
b.) 3:8 decoder realization through 2:4 decoder
4. 8:3 encoder
5. 8-bit parity generator and checker
6. Flip-Flops
7. 8-bit synchronous up-down counter
8. 4-bit sequence detector through Mealy and Moore state machines.
EDA TOOLS/HARDWARE REQUIRED:
 EDA Tool that supports FPGA programming including Xilinx Vivado
/Altera (Intel)/ Cypress/Equivalent Industry standard tool along with
corresponding FPGA hardware.
 Desktop computer with appropriate Operating System that supports the
EDA tools.
PART (B):
BACK-END LEVEL DESIGN AND IMPLEMENTATION (ANY FIVE
EXPERIMENTS):
NOTE: The students need to design the following experiments at schematic
level using CMOS logic and verify the functionality. Further students need to
draw the corresponding layout and verify the functionality including
parasites. Available state of the art technology libraries can be used while
simulating the designs using Industry standard EDA Tools.
DESIGN AND IMPLEMENTATION OF THE FOLLOWING:
1. Universal Gates.
2. An Inverter
3. Full Adder
4. Full Subtractor
5. Decoder
6. D-Flip-flop
EDA TOOLS/HARDWARE REQUIRED:
 Mentor Graphics Software / Cadence/Synopsys/Tanner or Equivalent
Industry Standard/CAD Tool.
 Desktop computer with appropriate Operating System that supports the
EDA tools.
NOTE: Minimum 12 experiments of duration 3 periods must be completed
for the eligibility to appear for the semester end examinations. In case if the
student fails to get eligibility for semester end exams in the current
semester, he has to take the permission of HOD and complete the required
number of experiments and appear for semester end exam as and when
conducted.
E – RESOURCE:
1. https://nptel.ac.in/courses/111/107/111107105/
2. https://nptel.ac.in/courses/111/105/111105123/
COURSE OUTCOMES:
At the end of the Course, Student will be able to:
1. Write HDL code for basic as well as advanced digital integrated circuits.
2. Import the logic modules into FPGA Boards.
3. Ability to design the logic circuits.
4. Synthesize, place and Route the digital IP’s.
5. Design, implement and simulate circuits using VHDL.
6. Design, simulate and extract the layouts of anlaog IC blocks using EDA
tools.
 COURSE CODE: UR20PCEC613
B.Tech. VI Semester L T P C
0 0 3 1.5
DIGITAL SIGNAL PROCESSING LAB
Internal Marks: 15
External Marks: 35
COURSE OBJECTIVES:
1. To implement linear and circular convolution.
2. To implement FIR and IIR filters.
3. To study the architecture of DSP processor.
(NOTE: Students have to perform at least FOUR experiments from each
part.)
PART - A:
LIST OF EXPERIMENTS
1. Generation of DT signals.
2. Verify the Linear Convolution of two DT signals
a) Using MATLAB
b) Using Code Composer Studio (CCS)
3. Verify the Circular Convolution of two DT signals
a) Using MATLAB
b) Using Code Composer Studio (CCS)
4. Find the sum of DT sinusoidal signals.
5. Computation of Discrete Fourier Transform (DFT) and Inverse. Discrete
Fourier Transform (IDFT)
a) Using MATLAB.
b) Using Code Composer Studio (CCS)
6. Transfer Function Stability Analysis: using pole-zero plot, bode Plot and
Nyquist plot.
PART - B:
Following Experiments are to be done using a TIDSP Starter Kit.
7. Generation of a sinusoidal signal.
8. Linear and circular convolution of DT sequences.
9. Compute N-point DFT of a given DT sequence.
10. Design and implementation of FIR filters.
11. Design and implementation of IIR filters.
PART - C:
Following Experiments are to be done using Cypress FM 4 Starter Kit.
12. Verification of sampling theorem.
13. Implementation of FFT algorithm.
14. Implementation of FIR filters.
15. Implementation of IIR filters.
NOTE: Minimum 12 experiments of duration 3 periods must be completed
for the eligibility to appear for the semester end examinations. In case if the
student fails to get eligibility for semester end exams in the current
semester, he has to take the permission of HOD and complete the required
number of experiments and appear for semester end exam as and when
conducted.
E – RESOURCE:
1. https://nptel.ac.in/courses/111/107/111107105/
2. https://nptel.ac.in/courses/111/105/111105123/
COURSE OUTCOME:
At the end of the Course, Student will be able to:
1. Experiment concepts of DSP and its application using mat lab software.
2. To understand about the basic signal generation.
3. To learn Fourier transforms concepts.
4. To design FIR filters.
5. To design IIR filters.
6. Demonstrate their abilities towards DSP processor based implementation
of DSP system.
 COURSE CODE: UR20SOEC614
B.Tech. VI Semester L T P C
1 0 2 2
ARM BASED/ ARDUINO BASED PROGRAMMING/IoT
(Skill Oriented Course)

Internal Marks: 0
External Marks: 50
COURSE OBJECTIVES:
1. An embedded system is a combination of hardware and software provided
that both should be synchronized with each other.
2. Some examples are as follows: industrial machines, automobiles, medical
equipment, cameras, household applications, airplanes, vending
machines etc.
3. The aurdino is an open – source computer hardware/software platform
for building devices and interactive objects that can sense and control
the physical world around them.
4. In this course students will learn how the Arduino platform works in
terms of the physical board and libraries and IDE (Integrated
development environment).
5. The course will also cover programming the Arduino using C code and
accessing the pins on the board via the software to control external
devices.
LIST OF EXPERIMENTS:
1. Introduction to Raspberry Pi Board/ Arduino/Node MCU.
2. Familiarization with ARM keil MDK for programming and debugging an
application on the PSoC 4 BLE chip and perform necessary software
installation.
3. Measure Analog signal from Temperature Sensor.
4. Generate PWM output.
5. Drive single character generation on Hyper Terminal.
6. Drive a given string on Hyper Terminal.
7. Full duplex Link establishment using Hyper terminal.
8. Drive a given value on a 8 bit DAC consisting of SPI.
9. Drive Stepper motor using Analog GPIOs.
10. Drive Accelerometer and Display the readings on Hyper Terminal.
11. Automatic street light control to control the street light (Turn on and off
based on the light) using Arduino.
12. Detecting obstacle with IR Sensor and Arduino.
13. Write an Arduino program for interfacing Arduino board with the
Ultrasonic sound sensor.
14. To interface DC motor using Arduino.
COMPONENTS/ BOARDS:
1. Arduino Duemilanove Board.
2. Arduino Software IDE.

NOTE:
1. Skill Oriented Course will be evaluated at the end of the semester for 50
marks (record -15 marks and viva voce -35 marks) along with laboratory
end examinations in the presence of external (Appointed by the Principal
) and internal examiner(course instructor or mentor).There are no
internal marks for the job oriented skill courses.
2. Minimum 12 experiments must be completed for the eligibility to appear
for the semester end examinations. In case if the student fails to get
eligibility for semester end exams in the current semester, he has to take
the permission of HOD and complete the required number of experiments
and appear for semester end exam as and when conducted.
E – RESOURCE:
1. https://nptel.ac.in/courses/111/107/111107105/
2. https://nptel.ac.in/courses/111/105/111105085/
COURSE OUTCOMES:
At the end of the Course, Student will be able to:
1. Comprehend Microcontroller-Transducers Interface techniques.
2. Establish Serial Communication link with Arduino.
3. Analyse basics of SPI interface.
4. Interface Stepper Motor with Arduino.
5. Analyse Accelerometer interface techniques.
6. Measuring the temperature values from sensors
 COURSE CODE: UR20MC600C
B.Tech. VI Semester L T P C
0 0 0 0
CONSTITUTION OF INDIA
Internal Marks: 30
External Marks:00
End Semester Marks: 70
COURSE OBJECTIVES:
1. To enable the student to understand the importance of constitution.
2. To understand the structure of executive, legislature and judiciary.
3. To understand philosophy of fundamental rights and duties.
4. To understand the autonomous nature of constitutional bodies like
Supreme Court and high court controller and auditor general of India
and election commission of India.
5. To understand the central and state relation financial and
administrative.
UNIT - I:
Introduction to Indian Constitution: Constitution meaning of the term,
Indian Constitution - Sources and constitutional history, Features -
Citizenship, Preamble, Fundamental Rights and Duties, Directive Principles
of State Policy.
UNIT - II:
Union Government and its Administration Structure of the Indian Union:
Federalism, Centre- State relationship, President: Role, power and position,
PM and Council of ministers, Cabinet and Central Secretariat, LokSabha,
Rajya Sabha, The Supreme Court and High Court: Powers and Functions;
UNIT - III:
State Government and its Administration Governor - Role and Position - CM
and Council of ministers, State Secretariat: Organisation, Structure and
Functions
UNIT - IV:
Local Administration - District’s Administration Head - Role and
Importance, Municipalities – Mayor and role of Elected Representative - CEO
of Municipal Corporation PachayatiRaj: FunctionsPRI: ZilaPanchayat,
Elected officials and their roles, CEO ZilaPanchayat: Block level
Organizational Hierarchy - (Different departments), Village level - Role of
Elected and Appointed officials – Importance of grass root democracy
UNIT - V:
Election Commission: Election Commission- Role of Chief Election
Commissioner and Election Commissionerate State Election Commission:,
Functions of Commissions for the welfare of SC/ST/OBC and women.
TEXT BOOKS:
1. Durga Das Basu, Introduction to the Constitution of India, Prentice –
Hall of India Pvt.Ltd..NewDelhi.
2. SubashKashyap, Indian Constitution, National Book Trust.
3. J.A. Siwach, Dynamics of Indian Government & Politics
REFERENCE BOOKS:
1. D.C. Gupta, Indian Government and Politics.
2. H.M.Sreevai, Constitutional Law of India, 4th edition in 3 volumes
(Universal Law Publication).
3. J.C. Johari, Indian Government and Politics Hans.
4. J. Raj Indian Government and Politics.
5. M.V. Pylee, Indian Constitution Durga Das Basu, Human Rights in
Constitutional Law, Prentice – Hall of India Pvt. Ltd.. New Delhi.
6. Noorani, A.G., (South Asia Human Rights Documentation Centre),
Challenges to Civil Right), Challenges to Civil Rights Guarantees in India,
Oxford University Press 2012
E – RESOURCES:
1. www.nptel.ac.in/courses/109104074/8
2. www.nptel.ac.in/courses/109104045/
3. www.nptel.ac.in/courses/101104065/
4. www.hss.iitb.ac.in/en/lecture-details
5. www.iitb.ac.in/en/event/2nd-lecture-institute-lecture-series-indian-
constitution
COURSE OUTCOMES:
At the end of the course students will be able to
1. Understand historical background of the constitution making and its
importance for building a democratic India.
2. Understand the functioning of three wings of the government i.e.,
executive, legislative and judiciary.
3. Understand the value of the fundamental rights and duties for becoming
good citizen of India.
4. Analyse the decentralization of power between central, state and local
self-government.
5. Apply the knowledge in strengthening of the constitutional institutions
like CAG, Election Commission and UPSC for sustaining democracy.
6. Know the sources, features and principles of Indian Constitution.