Electronic Devices Test 4

Number of Questions: 25 Time: 60 min.

Directions for questions 1 to 25: Select the correct alterna- 10. Consider the transistor circuit shown in figure
tive from the given choices. Vcc
1. Silicon dioxide (Sio2) is used in ICs
(A) because it facilitates the penetration of diffusants. Rc
(B) to control the location of diffusion and to protect VBB RB
and insulate the silicon surface.
(C) because of its high heat conduction 5V
(D) to control the concentration of diffusants.
2. In an n channel MOSFET I D( ) = 0.3 mA
sat

VDS = 0.9V, VTn = 0.8V and VDS(sat) = 4V. If the Base current IB = 3 mA, then the value of RB
The gate voltage is would be ________.
(A) 3.8 V (B) 4.2 V (Consider VBE = 0.7 V and ‘ a ’ = 0.985)
(C) 4.8 V (D) 3.2 V
(A) 1.7 k Ω (B) 1.66 k Ω
3. A MOS capacitor has oxide thickness tox of 70 nm. The (C) 1.9 k Ω (D) 1.43 k Ω
capacitance is
(A) 0.49 mF/m2 (B) 0.49 mF/m2 11. Purpose of metallization in IC fabrication process is
(C) 0.39 mF/m 2
(D) 0.39 mF/m2 (A) to act as a heat sink
(B) to supply a bonding surface for mounting the chip.
4. In a n channel enhancement mode MOSFET, VTn= 1.6V,
(C) to interconnect the various circuit elements
Kn = 0.28 mA/V2.
(D) to protect the chip from oxidation.
If VGS = 5V and VDS = 6V then ID is
(A) 2.34 mA (B) 1.36 mA 12. For the zener voltage regulator shown in the figure
(C) 2.36 mA (D) 0.672 mA 0.5 kΩ
5. Compared to junction isolation, oxide isolation is +
R
(A) better because it causes less disruption in the Si +
crystalline structure. Vin 12 V RL 2.5 kΩ
(B) worse because it eliminates conducting paths IZ –
needed for current flow into the substrate. –
(C) better because it eliminates parasitic junction
capacitances. If the maximum zener current does not exceeds 25 mA.
(D) None of these Then the ratio between the Vin max to Vin min is ________.
6. Silicon dioxide layer is used in IC chips for (A) 1.64 (B) 2
(A) providing contacts (C) 1.52 (D) 2.2
(B) diffusing elements
13. Calculate the resistance of a diffused resistor that is 45
(C) providing mechanical strength to the chip
µm long and 10 µm wide. A 80 µm thick Si wafer has
(D) providing mask against diffusion
been doped uniformly with boron of the concentration
7. A JFET has IDSS = 18mA and VP = - 6 volts, VGS = -2 V 1016 cm3.
the value of drain current is (A) 7.3 Ω (B) 82 Ω
(A) 4 mA (B) 6 mA (C) 820 Ω (D) 703 Ω
(C) 7.9 mA (D) 8.3 mA
14. A thin film capacitor has a silicon dioxide thickness of
8. The threshold voltage of an n channel MOSFET can be
18 Ao. If the relative dielectric constant of Sio2 is 3.9.
increased by
Calculate the capacitance per unit Area in µF/cm2.
(A) reducing channel dopant concentration
(A) 1.73 (B) 1.91
(B) reducing the channel length
(C) 0.78 (D) 2.32
(C) increasing the channel dopant concentration
(D) reducing the gate oxide thickness. 15. For an n-channel silicon FET with a = 3×10-4 cm and ND =
9. A JFET has Vp = -8.5 V, IDSS = 20 mA and ID = 3.5 mA 1017 electrons/cm3. The pinch off voltage VP is _______.
determine its transonductence (Consider εs = εo εr = 12 εo).
(A) 2.22 mA/V (B) 1.99 mA/V (A) 6.77 V (B) 6.23 V
(C) 3.6 mA/V (D) 4.2 mA/V (C) 5.2 V (D) 4.7 V
 Electronic Devices Test 4 | 3.135

16. Consider the MOSFET circuit shown in figure it has (µn = 1300 cm2/V.sec)
W  (A) 5.34 × 1019 (B) 6.5 × 1022
VT = 1V, and µnCox   = 1.5 mA/V2. (C) 1.6 × 1023 (D) 5.3 × 1021
 L
20. A doped silicon semiconductor square bar with resis-
VDD = 3.5 V
tivity 250 kΩ –cm is placed in transverse magnetic field
of 0.5 wb/m2 and width = 8 mm. The hall voltage and
ID RD = 1 kΩ
current measured are 55 mV and 8 m A respectively.
Find the mobility of carriers.
(A) 1400 cm2/V.sec (B) 1800 cm2/V.sec
(C) 440 cm /V.sec
2
(D) 350 cm2/V.sec
21. Silicon is doped with acceptor concentration of 5 × 1014
2V atom/cm3. Assume the intrinsic carrier concentration of
The drain current ID will be ________ silicon to be 1.2 × 1010 cm-3 at VT = 28 mV. Compared
(A) 0.52 mA (B) 1.25 mA to intrinsic silicon, the shift in position Fermi level of
(C) 1.5 mA (D) 0.75 mA extrinsic silicon is
(A) 0.325 eV (B) 0.297 eV
17. An NMOS transistor has Vto = 1 V, 2Φf = 0.7 V, and the (C) 0.423 eV (D) 0.79 eV
fabrication process parameter g = 0.4 V1/2. The value
22. For a silicon P-N junction diode, the doping concentra-
of threshold voltage (Vt), when VB = 3.3 V is _______.
tions are NA = 1018 cm-3, ND = 1019 cm-3, ni = 1.5 × 1015 cm-3.
(A) 1.46 V (B) 1.32 V
If the cross sectional area of junction is 10 mm2, and
(C) 1.21 V (D) 0.782 V
junction is reverse biased at 6.5V, find the transition
18. Consider the n-channel MOSFET circuit shown in capacitance.
1W (εr = 12, εo = 8.85 × 1012 F/m)
figure. It has Vt = 1.5V, K n = 0.25 mA/V2, and
L (A) 0.2 nF (B) 0.1 pF
VA = 50 V. (C) 0.1 nF (D) 0.2 pF
VDD = 3 V 23. A silicon diode operates at forward bias voltage of 0.7V,
(η = 2 for silicon) calculate the factor by which the cur-
rent get multiplied when the temperature is increased
from 27o to 107oC.
Vo
(A) 19 (B) 17.2
RL (C) 715.4 (D) 256
2.5 V 24. A diode with forward bias voltage of 0.695 volts is car-
rying 1.95 mA of current at room temperature. If η = 1,
for this diode, the dynamic resistance of the diode is?
The output resistance ro is ______ (A) 356 Ω (B) 13.3 Ω
(A) 57 kΩ (B) 400 kΩ (C) 26.6 Ω (D) 712 Ω
(C) 200 kΩ (D) 125 kΩ 25. In an asymmetrical silicon diode, the mean life time
19. A 1.8 kΩ resistor has to be fabricated using an n-type of holes is 12 ns at room temperature, and η = 2. If the
silicon bar with 5 mm thick, 40 µm wide and 400 µm forward current of 0.2 mA is flowing in the diode, find
long, the required donor concentration is _______ the diffusion capacitance.
atoms/m3. (A) 38.5 pF (B) 42.5 m F
(C) 46.15 F m (D) 52.25 pF

Answer Keys
1. B 2. C 3. A 4. D 5. C 6. D 7. C 8. A 9. B 10. D
11. C 12. A 13. D 14. B 15. A 16. D 17. A 18. B 19. A 20. C
21. B 22. C 23. A 24. B 25. C
3.136 | Electronic Devices Test 4

Hints and Explanations

1. Choice (B) ∴ Vin min = 0.5 × 103 × 4.8 × 10–3 + 12
2. VDS(sat) = VGS - VTn = 2.4 + 12 = 16.4V
4 = VGS - 0.8 When zener diode curent max IR = Izm + IL
VGS = 4.8 V. Choice (C) = 25 mA + 4.8 mA = 29.8 mA
Vin max = 500 × 29.8 × 10–3 + 12 = 26.9 V
e
3. tox = ox = esx = 3.9 e0 Vin max 26.9
C ox = = 1.64 Choice (A)
Vin min 16.4
3.9 × 8.85 × 10 −12
Cox = = 0.49 mF/m2. Choice (A) r 
70 × 10 −9 13. R = = Rs Ω
y.w w
4. VDS(sat) = VGS - VTn = 5 - 1.6 = 3.4V
VDS <VDS(sat), biased in non saturation region.
w


K
ID = n 2 (VGS − VTn )VDS − VDS
y
2

2
= [2(5 - 1.6)6 - 62] = 0.672 mA. Choice (D)
5. Choice (C) I
6. Choice (D) A=y

 VGS 
2
 
R= =
7. ID = Ι DSS 1 −  s. y.w N A m p .q. y.w
 VP 
2 45 × 10 -4
−3   −2   R=
= 18 × 10 1 −    1016 × 500 × 1.6 × 10 -19 × 10 × 10 -4 × 80 × 10 -4
  −6  
2
R = 7.03 × 10–5 × 107 = 703 Ω Choice (D)
−3   1 
= 18 × 10 1 −    eA
  3  14. The capacitance C =
d
= 18 × 10-3 × 0.44 = 7.9 mA Choice (C) C e e e
8. Choice (A) = Capacitance per unit area = = o r
A d d
−2Ι DSS  VGS  3.9 × 8.85 × 10 -14
9. gm = 1 −  = F cm 2
VP  VP  18 × 10 -8

 ΙD  = 1.91 × 10–6 F/cm2 = 1.91 µF/cm2 Choice (B)

VGS = V p 1 − 
 Ι DSS  q. N D .a 2

15. |Vp| =
2es
 3.5 
= −8.5 1 −  = -4.911
1.6 × 10 −19 × 1017 × (3 × 10 −4 )
2
 20 
|Vp| =
−2 × 20 mA  −4.9  2 × 12 × 8.85 × 10 −12
gm = 1−
−8.5  −8.5  = 0.0677 × 102 = 6.77 V Choice (A)
40mA 1.99mA 16. From the given data
= = V Choice (B)
8.5 VG = 2V at VS = 0
∴ VGS = 2V
10. Applying KVL to the input loop:
VDD = 3.5V, VT = 1V
VBB – RB.IB – VBE = 0
VGS – VT = 1V {∴ VGS > VT}
VBB − VBE 5 − 0.7 So Transistor is in ON state
RB = = kΩ
IB 3 Let it is in saturation.
RB = 1.433 kΩ Choice (D) mn Cox w
ID = (VGS – VT)2
11. Choice (C) 2L
12. V = VL = 12 1
= × 1.5 × 1 × 10–3 = 0.75 mA
12 2
IL = 2.5 mA = 4.8 mA
 Electronic Devices Test 4 | 3.137

Apply KVL at o/p loop: 21. Acceptor concentration = 5 × 1014/cm2, it is a p-type

3.5 – ID RD – VDS = 0 impurity. So Fermi level goes down
3.5 – 0.75 = VDS KT N 
VDS = 2.75 V Shift in Femi level = ∆EF = .ln  A  eV
q  ni 
∴ VDS > VGS – VT
So transistor is in saturation mode, so assumption  5 × 1014 
is correct. Choice (D) ∆EF = 28 × 10 ln  10  eV
-3
 1.2 × 10 
17. Vt = Vto + g  2 j f + VSB − 2j f  = 0.2978 eV Choice (B)
22. NA = 10 cm , ND = 10 cm , ni = 1.5 × 1015 cm–3
18 –3 19 –3
= 1 + 0.4  0.7 + 3.3 − 0.7  = 1 + 0.4[2 – 0.8366]
A = 10 mm2 Reverse bias = 6.5V
Vt = 1.465 volts Choice (A) eA
CT =
VA W
18. We know ro = I 1
D
 2eV  1 1  2
From the given data W = i  +   (∵ Vj = V + Vo)
W  q  Na Nd  
Vt = 1.5V, µn Cox = 0.25 mA/V2
L  Na ND 
Contact potential VO = VT ln  2 
VGS = 2.5V  ni 
Let us assume transistor is in saturation mode
VGS > VT → ON  1018 × 1019 
Vo = 26 × 10 ln  –3  = 0.3979V
1 1W  (1.5 × 1015 ) 
2

IDsat = k n [VGS – VT]2  

2 L
Vj = 6.5 + 0.3979 = 6.8979V
1
= × 0.25 × 10–3 × 1 = 0.125 mA 1
2  2 × eo er × 6.8979  1 1  2
W=  + 19   = 1 × 10–5 cm
Check:- Saturation mode  1.6 × 10
−19
10
18
10  
Apply KVL in o/p loop. CT = εr εo A = 1.06 × 10 = 0.106 nF
-10
Choice (C)
3 – 1.5 × 0.125 – VDS = 0
VDS = 2.81825V 23. I = Io e
V
( hVT
−1 )
VDS ≥ VGS – VT T
So it is in saturation mode V = 0.7, η = 2, VT =
50 11,600
∴ O/p resistance ro = kΩ
0.125 27 + 273
VT at 27oc = = 0.02586 V
ro = 400 k Ω Choice (B) 11,600
r  107 + 273
19. R = = VT at 107oc = = 0.032758 V
A sA 11,600
For n type σ = ND.q. µn
  I 27 I o(27) e
=
(
0.7 2 × 0.02586

. 0.7 2 × 0.032
−1 )
⇒ ND =
R=
( N D .q. mn ) × A R.q. mn × A I107 I o(107) e ( −1 )
400 × 10 −6 I o(27)
= 2(
27 -107) 10
= = 2-8
1.8 × 10 × 1.6 × 10 × 0.13 × 5 × 10 −3 × 40 × 10 −6
3 −19
I o(107)
ND = 5.34 × 1019 atoms per m3 Choice (A) I107 = 19.07 I27 Choice (A)
RH
20. Mobility µ = σ.RH = 24. Dynamic resistance of the diode
r h VT 1 × 26 × 10 −3
r= = = 13.3 Ω
−3
VH .W 55 × 10 × 8 × 10
−3
 A − sec 
−1
I 1.95 × 10 −3
RH = = = 110 
BZ . I x 0.5 × 8 × 10 −6  m3  VT = 26 mV at room temperature Choice (B)
R 110 t I 12 × 10 × 0.2 × 10 −3
−9
m= H = = 0.044 m2/V.sec 25. Diffusion capacitance CD = =
r 2.5 × 103 h VT 2 × 26 × 10 −3
= 440 cm2/V.sec Choice (C) = 46.15 µ F Choice (C)