Assignment 1

ELL 760
Switched Mode Power Conversion

SIXTH SEMESTER (2024-25)

by

Jairam G.
Roll No: 2022ES11206

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Contents
1 INTRODUCTION 4

2 DESIGN ANALYSIS 4

3 Component Stress Analysis 5

4 MATLAB Simulation 5

5 State Space Modeling 6

6 Controller Design 8

7 Results 10

8 Conclusion 14

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List of Figures
1 Schematic diagram of a buck converter. . . . . . . . . . . . . . . . . . . . . . 4
2 Inductor current waveform of the buck converter. . . . . . . . . . . . . . . . . 6
3 Capacitor voltage waveform of the buck converter. . . . . . . . . . . . . . . . 6
4 Bode plot for transfer function of inductor current and duty. . . . . . . . . . . . 8
5 Bode plot for transfer function of Output voltage and duty. . . . . . . . . . . . 8
6 Bode plot of compensated Inductor current by duty. . . . . . . . . . . . . . . . 9
7 Bode plot of compensated output voltage by duty. . . . . . . . . . . . . . . . . 10
8 Schematic of closed loop controlled Buck converter. . . . . . . . . . . . . . . . 10
9 Inductor current when load is changed from full rated load to half rated load. . 11
10 Output current when load is changed from full rated load to half rated load. . . 11
11 Output voltage when load is changed from full rated load to half rated load. . . 11
12 voltage controller output when load is changed from full rated load to half rated
load. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
13 Inductor current when load is changed from half rated load to full rated load. . 12
14 Output current when load is changed from half rated load to full rated load. . . 12
15 Output voltage when load is changed from half rated load to full rated load. . . 13
16 voltage controller output when load is changed from half rated load to full rated
load. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
17 Output voltage when perturbations are given in voltage reference. . . . . . . . 13

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1 INTRODUCTION
A buck converter is a DC-DC power converter that steps down voltage from its input to its
output. This report details the design, analysis, and simulation of a buck converter with the
following specifications:
Input Voltage (Vin ): 72 V
Output Voltage (Vout ): 48 V
Output Power: 1 kW
Switching Frequency (fsw ): 30 kHz

Figure 1: Schematic diagram of a buck converter.

2 DESIGN ANALYSIS
The output current (Iout ) is calculated as:

Pout 1000 W
Iout = = ≈ 20.83 A
Vout 48 V
Assuming CCM, IL ¿
∆IL
2
The duty cycle (D) is:

Vout 48 V
D= = = 0.6667
Vin 72 V
Assuming an inductor current ripple (∆IL ) of 10% of Iout :

∆IL = 0.1 × 20.83 A ≈ 2.08 A

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The inductor value (L) is calculated using:

Vout × (1 − D) 48 V × (1 − 0.6667)
L= = ≈ 0.256 mH
∆IL × fsw 2.08 A × 30 kHz
Assuming an output voltage ripple (∆Vout ) of 1% of Vout :

∆Vout = 0.01 × 48 V = 0.48 V

The output capacitor (Cout ) is:

∆IL 2.08 A
Cout = = ≈ 18.08 µF
8 × fsw × ∆Vout 8 × 30 kHz × 0.48 V

3 Component Stress Analysis

MOSFET in the buck converter experiences voltage stress equal to the input voltage when it’s
off. The switch conducts the full inductor current when on. The peak current includes both the
maximum load current and half the ripple current.
The diode experiences a reverse voltage stress equal to the input voltage when the switch is on,
and when MOSFET is off it conducts the peak inductor current.

• Voltage Stress: The switches must withstand the input voltage, Vin = 72 V.

∆IL
• Current Stress: The peak current is Iout + 2
= 20.83 A + 1.042 A = 21.872 A.

4 MATLAB Simulation
A MATLAB/Simulink model was developed to simulate the buck converter’s performance.
The simulation results showed an output voltage of 48 V with a ripple of approximately 0.339
V, and an inductor current ripple of about 2.09 A, which are close to the design the design
calculations.

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 Figure 2: Inductor current waveform of the buck converter.

Figure 3: Capacitor voltage waveform of the buck converter.

5 State Space Modeling

ON state:       
d  iL − RL − L1 iL Vin
= L   + L
dt vC 1 1
− RC vC 0
C

OFF state:    
  
d  iL − RL − L1 0 iL
= L   +  
dt vC 1 1
− RC vC 0
C

Where RL is the inductor’s parasitic resistance

Averaging the equations over one switching period:
 
    
RL 1 V
d  iL  − L − L   iL   Lin 
= + d
dt vC 1
− 1
v C 0
C RC

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Where d is the duty cycle.
Applying perturbations and linearizing around the operating point:

iL = IL + i˜L ;

vC = VC + v˜C ;

vin = Vin + ṽin ;

˜
d = D + d;
      
d  i˜L − RL − L1 i˜L Vin
= L   + L d˜
dt v˜C 1 1
− RC v˜C 0
C

Assuming an ideal converter RL = 0

Output voltage to duty transfer function:

V˜C (s) Vin R

=
D̃(s) L(RCs)2 + Ls + R

V˜C (s) 165.6

= −13 2
D̃(s) 4.43 × 10 s + 0.000256s + 2.3
Inductor current to duty transfer function:

I˜L (s) Vin (RCs + 1)

=
D̃(s) L(RCs)2 + Ls + R

I˜L (s) 72(4.1593 × 10−5 s + 1)

=
D̃(s) 4.43 × 10−13 s2 + 0.000256s + 2.3

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6 Controller Design

Figure 4: Bode plot for transfer function of inductor current and duty.

Figure 5: Bode plot for transfer function of Output voltage and duty.

For the inner current controller, we need,

• Zero steady-state error.

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 • Phase margin of around 70◦ .

• Bandwidth of around 3 kHz (10% of fsw ).

To achieve these, we use a PI controller with general transfer function,

Ki
Gc (s) = Kp + (1)
s
We put Kp = 0.00004 and Ki = 160

Figure 6: Bode plot of compensated Inductor current by duty.

For the voltage controller, we need the same as above, but the bandwidth of the voltage
controller should be less than that of the inductor current controller.
We put Kp = 0.0001 and Ki = 150

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 Figure 7: Bode plot of compensated output voltage by duty.

Figure 8: Schematic of closed loop controlled Buck converter.

The ”PWM Generator” block is used to drive the MOSFET from duty cycle output. The
current controller saturation limits are set between 0 and 1, while the voltage controller
saturation range is from 0 to 20.833 A.

7 Results
To show the working of the controller we change the load after 0.2 seconds.

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Figure 9: Inductor current when load is changed from full rated load to half rated load.

Figure 10: Output current when load is changed from full rated load to half rated load.

Figure 11: Output voltage when load is changed from full rated load to half rated load.

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Figure 12: voltage controller output when load is changed from full rated load to half rated load.

Figure 13: Inductor current when load is changed from half rated load to full rated load.

Figure 14: Output current when load is changed from half rated load to full rated load.

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 Figure 15: Output voltage when load is changed from half rated load to full rated load.

Figure 16: voltage controller output when load is changed from half rated load to full rated load.

When we change the voltage reference from 48 volts to 48 + 2 sin(ωt), where ω = 2π × 50

Hz, the controller is able to track the reference voltage and maintain calculated average and
ripple voltage.

Figure 17: Output voltage when perturbations are given in voltage reference.

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8 Conclusion
From the bode plots and waveforms attached to the report, we can conclude that we have
simulated a closed-loop controlled buck converter for the given specifications.

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