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CMPE 261project - Draft - 3

The Fall 2024 CMPE 261 Digital Logic Design project requires students to design a sequence counter using 'Logisim Evolution' that iterates over a specific set of eight sequences and performs designated logic operations. Students must implement a system that initializes an accumulator, generates sequence values, applies shift and logic/arithmetic actions, and displays results in hexadecimal format. The project report must include problem statements, hand-written operations, detailed designs, logic schematics, and simulation snapshots.

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13 views4 pages

CMPE 261project - Draft - 3

The Fall 2024 CMPE 261 Digital Logic Design project requires students to design a sequence counter using 'Logisim Evolution' that iterates over a specific set of eight sequences and performs designated logic operations. Students must implement a system that initializes an accumulator, generates sequence values, applies shift and logic/arithmetic actions, and displays results in hexadecimal format. The project report must include problem statements, hand-written operations, detailed designs, logic schematics, and simulation snapshots.

Uploaded by

jassim091
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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FALL 2024 CMPE 261 Digital Logic Design Project

Week 8 Offering
Week 13 Wednesday Delivery

Project Problem Statement:


Using the 'Logisim Evolution' package, design and develop a sequence counter that
iterates over the eight sequences given below. First, extract your group’s assigned
sequence counts along with the corresponding logic operations. Then, implement a
machine that performs the required operations exclusively on your group’s sequence
counts. The following are the steps to complete your design.
Figure 1. The schematic of the project

A schematic diagram of the project is shown in Figure 1. The following describes the
steps of the system that each student group should implement:
1. The student starts the sequence count by pushing a START button. This should
initialize the accumulator to zero before generating the first value in the sequence.
2. Sequences will be produced according to the 8 sequence values given for the group.
The sequence range would be from 0000 (0) to 1111 (15). For every clock tick, the
next value among the 8 values defined in the given sequence will be generated, and
after 8 sequence values are generated, the state machine should freeze, until a start
button initiates it again.
3. After each produced sequence value, perform the corresponding shift and
logic/arithmetic actions defined in the given sequence assigned to your group. The
following lists the possible actions:
Shift Actions Logic/Arithmetic Actions
• Left logical shift • ADD the number
• Right logical shift • SUBTRACT the number
• No shift • OR the number
• AND the number

Therefore, the following operations are applied for every sequence value generated:
ACC = Shifted (New Sequence Value) +/−/OR/AND [ACC]
4. Every generated sequence value must be displayed on a HEX display in hexadecimal
format.
5. After eight sequence values, display the accumulation on an 8-bit hex display in
hexadecimal format.
6. Use 8-bit 2’s complement representation for negative numbers in the accumulator.

Example Sequence: 4, 10, 15, 13, 12, 6, 14, 8


Example of eight operations using the above sequence:

Sequence Shift Logic- Operation Accumulator (Hex)


Value (Ni Operation Arith
in Dec)
Initially — — — 00
4 → OR ACC = ACC .OR. (N2) 02
10 NO OR ACC = ACC .OR. (N2) 0A
15  − ACC = ACC -  (N3) FC
13  AND ACC = ACC .AND.  (N4) 18
12 NO + ACC = ACC + (N5) 24
6 NO − ACC = ACC - (N6) 1E
14 → + ACC = ACC + → (N7) 25
8 → − ACC = ACC - → (N8) 21

Where:  = Left Shift, → = Right shift, and NO = No Shift

Pay Attention To:

• It is not permitted to use a traditional counter that feeds the count to memory. No
memories are permitted.
• Students should know how to use hardware operations like shift, ADD,
subtraction, OR, and AND for each sequence.
• Students must use one of the provided Flip Flop SR or JK. See chapter 11.
• Design sequence counters following the processes outlined in Chapter
12.3.
• Design of an accumulator chapter 12.2
• It is required to include the design steps in the report.
• Use Multiplexers and Decoders (if needed) outlined in chapter 9.2, 9.3, and
9.4.
• Logic OR and logic AND outlined in chapters 2.
• Chapter 4.7 describes the ADDERs and the SUBTRACTORs.
• Students must select the appropriate sequences as assigned to their group
• Students must select the appropriate addition (+), subtraction (-), AND, and OR
for each sequence as assigned to their group.
• The 8 Ns emerging from the state sequencer machine should be 4-bit wide each,
while the Accumulator should be 8-bit wide.
• Students are required to present a table that clearly shows the step-by-step
outcomes of 8 operations in order to showcase the end result of their simulation.

Project Report Delivery Requirement:


• Problem statement showing all sequences and logical operations needed from
your group.
• A hand-written operations showing all your 8 sequences and operations done on
them with last results, done manually. It is needed to approve the project’s last
output.
• A detailed design for the 8 number sequences using FF (5 stages).
• A logic schematic for the 4-bit sequence counters.
• A logic schematic for the ADD, SUB, AND, and OR circuits.
• Snapshots for the 8 sequences with the 8 accumulations emerging.
• Submit report and the “Logisim Evolution” file.

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